* readelf.c (get_mips_symbol_other): New function.
(get_symbol_other): New function.
(process_symbol_table): Call get_symbol_other() to get a description of the
st_other field if it contains more information than just the visibility.
* elfxx-mips.c (mips_elf_calculate_relocation): Ignore an undefined symbol if
it is optional.
(_bfd_mips_elf_merge_symbol_attribute): Make sure that the optional flag is
merged as well as the visibility.
* elfxx-mips.h (_bfd_mips_elf_merge_symbol_attribute): Prototype.
(elf_backend_merge_symbol_attribute): Define.
* mips.h (STO_OPTIONAL): Define.
(ELF_MIPS_IS_OPTIONAL): Define.
* readelf.c (read_and_display_attr_value): Handle a DW_AT_encoding
value of DW_ATE_decimal_float instead of DW_ATE_GNU_decimal_float.
include/elf/
* dwarf2.h (enum dwarf_type): Remove DW_AT_GNU_decimal_float.
Replace with DW_ATE_decimal_float (now in DWARF 3).
2005-07-14 Jim Blandy <jimb@redhat.com>
* configure.in: Add cases for Renesas m32c.
* configure: Regenerated.
bfd/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for m32c-*-elf (Renesas m32c and m16c).
* Makefile.am (ALL_MACHINES): Add cpu-m32c.lo.
(ALL_MACHINES_CFILES): Add cpu-m32c.c.
(BFD32_BACKENDS): Add elf32-m32c.lo.
(BFD32_BACKENDS_CFILES): Add elf32-m32c.c.
(cpu-m32c.lo, elf32-m32c.lo): New rules, generated by 'make dep-am'.
* Makefile.in: Regenerated.
* archures.c (bfd_arch_m32c, bfd_mach_m16c, bfd_mach_m32c): New
arch and mach codes.
(bfd_m32c_arch): New arch info object.
(bfd_archures_list): List bfd_m32c_arch.
* bfd-in2.h: Regenerated.
* config.bfd: Add case for the m32c.
* configure.in: Add case for the m32c.
* configure: Regenerated.
* cpu-m32c.c, elf32-m32c.c: New files.
* libbfd.h: Regenerated.
* targets.c (bfd_elf32_m32c_vec): Declare.
(_bfd_target_vector): List bfd_elf32_m32c_vec.
binutils/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* readelf.c: #include "elf/m32c.h"
(guess_is_rela, dump_relocations, get_machine_name): Add cases for
EM_M32C.
* Makefile.am (readelf.o): Update dependencies.
* Makefile.in: Regenerated.
cpu/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
gas/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C.
* Makefile.am (CPU_TYPES): List m32c.
(TARGET_CPU_CFILES): List config/tc-m32c.c.
(TARGET_CPU_HFILES): List config/tc-m32c.h.
* configure.in: Add case for m32c.
* configure.tgt: Add cases for m32c and m32c-*-elf.
* configure: Regenerated.
* config/tc-m32c.c, config/tc-m32c.h: New files.
* doc/Makefile.am (CPU_DOCS): Add c-m32c.texi.
* doc/Makefile.in: Regenerated.
* doc/all.texi: Set M32C.
* doc/as.texinfo: Add text for the M32C-specific options and line
comment characters, and refer to c-m32c.texi.
* doc/c-m32c.texi: New file.
include/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
* dis-asm.h (print_insn_m32c): New declaration.
include/elf/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for Renesas M32C and M16C.
* common.h (EM_M32C): New machine number.
* m32c.h: New file.
ld/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C and M16C.
* Makefile.am (ALL_EMULATIONS): Add eelf32m32c.o.
(eelf32m32c.c): New target.
* Makefile.in: Regenerated.
* configure.tgt: Add case for m32c-*-elf.
* emulparams/elf32m32c.sh: New file.
opcodes/ChangeLog:
2005-07-14 Jim Blandy <jimb@redhat.com>
Add support for the Renesas M32C and M16C.
* m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c: New.
* m32c-desc.h, m32c-opc.h: New.
* Makefile.am (HFILES): List m32c-desc.h and m32c-opc.h.
(CFILES): List m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c,
m32c-opc.c.
(ALL_MACHINES): List m32c-asm.lo, m32c-desc.lo, m32c-dis.lo,
m32c-ibld.lo, m32c-opc.lo.
(CLEANFILES): List stamp-m32c.
(M32C_DEPS): List stamp-m32c, if CGEN_MAINT.
(CGEN_CPUS): Add m32c.
(m32c-asm.c, m32c-desc.c, m32c-dis.c, m32c-ibld.c, m32c-opc.c)
(m32c-desc.h, m32c-opc.h): Depend on M32C_DEPS.
(m32c_opc_h): New variable.
(stamp-m32c, m32c-asm.lo, m32c-desc.lo, m32c-dis.lo, m32c-ibld.lo)
(m32c-opc.lo): New rules.
* Makefile.in: Regenerated.
* configure.in: Add case for bfd_m32c_arch.
* configure: Regenerated.
* disassemble.c (ARCH_m32c): New.
[ARCH_m32c]: #include "m32c-desc.h".
(disassembler) [ARCH_m32c]: Add case for bfd_arch_m32c.
(disassemble_init_for_target) [ARCH_m32c]: Same.
* cgen-ops.h, cgen-types.h: New files.
* Makefile.am (HFILES): List them.
* Makefile.in: Regenerated.
2005-06-17 Jan Beulich <jbeulich@novell.com>
* bfd-in2.h (elf_x86_64_reloc_type): Add BFD_RELOC_X86_64_GOTOFF64
and BFD_RELOC_X86_64_GOTPC32.
* libbfd.h (bfd_reloc_code_real_names): Likewise.
* elf64-x86-64.c (x86_64_elf_howto_table): Add entries for
R_X86_64_PC64, R_X86_64_GOTOFF64, and R_X86_64_GOTPC32.
(x86_64_reloc_map): Add entries for R_X86_64_PC64, R_X86_64_GOTOFF64,
and R_X86_64_GOTPC32.
(elf64_x86_64_info_to_howto): Adjust bounding relocation type.
(elf64_x86_64_check_relocs): Also handle R_X86_64_PC64,
R_X86_64_GOTOFF64, and R_X86_64_GOTPC32.
(elf64_x86_64_relocate_section): Likewise.
(elf64_x86_64_gc_sweep_hook): Also handle R_X86_64_PC64.
gas/
2005-06-17 Jan Beulich <jbeulich@novell.com>
* config/tc-i386.c (reloc): Also handle BFD_RELOC_64_PCREL.
(tc_i386_fix_adjustable): Include BFD_RELOC_X86_64_GOTOFF64,
BFD_RELOC_X86_64_DTPOFF64, and BFD_RELOC_X86_64_TPOFF64.
(output_disp): Do GOTPC conversion also for BFD_RELOC_X86_64_32S
and BFD_RELOC_32_PCREL. Use BFD_RELOC_X86_64_GOTPC32 instead of
aborting.
(output_imm): Do GOTPC conversion also for BFD_RELOC_X86_64_32S.
Use BFD_RELOC_X86_64_GOTPC32 instead of aborting.
(tc_gen_reloc): Do GOTPC conversion also for BFD_RELOC_32_PCREL.
Use BFD_RELOC_X86_64_GOTPC32 instead of aborting. Also handle
BFD_RELOC_X86_64_GOTOFF64, BFD_RELOC_X86_64_GOTPC32,
BFD_RELOC_X86_64_DTPOFF64, and BFD_RELOC_X86_64_TPOFF64. Also
convert 8-byte pc-relative relocations.
(lex_got): Use BFD_RELOC_X86_64_GOTOFF64 for 64-bit @gotoff.
(i386_validate_fix): Likewise.
(x86_cons): Also handle quad values in 64-bit mode.
(i386_displacement): Also handle BFD_RELOC_X86_64_GOTOFF64.
(md_apply_fix): Include BFD_RELOC_X86_64_DTPOFF64 and
BFD_RELOC_X86_64_TPOFF64 in the TLS check. Also convert BFD_RELOC_64
to pc-relative variant. Also check for BFD_RELOC_64_PCREL.
gas/testsuite/
2005-06-17 Jan Beulich <jbeulich@novell.com>
* gas/i386/x86-64-pcrel.s: Add insn requiring 64-bit pc-relative
relocation. Add insns for all widths of non-pc-relative relocations.
* gas/i386/x86-64-pcrel.d: Adjust.
include/elf/
2005-06-17 Jan Beulich <jbeulich@novell.com>
* x86-64.h (elf_x86_64_reloc_type): Adjust comment for
R_X86_64_GOTPCREL. Add R_X86_64_PC64, R_X86_64_GOTOFF64, and
R_X86_64_GOTPC32.
* readelf.c (read_and_display_attr_value): Handle a DW_AT_encoding
value of DW_ATE_GNU_decimal_float.
include/elf/ChangeLog
* dwarf2.h (enum dwarf_type): Assign DW_ATE_GNU_decimal_float from
the user-defined encoding space pending inclusion in the standard.
* arm.h: Import complete list of official relocation names
and numbers from AAELF. Define FAKE_RELOCs for old names.
Remove a few old names no longer used anywhere.
bfd:
* elf32-arm.c: Wherever possible, use official reloc names
from AAELF.
(elf32_arm_howto_table, elf32_arm_tls_gd32_howto)
(elf32_arm_tls_ldo32_howto, elf32_arm_tls_ldm32_howto)
(elf32_arm_tls_le32_howto, elf32_arm_tls_ie32_howto)
(elf32_arm_vtinherit_howto, elf32_arm_vtentry_howto)
(elf32_arm_pc11_howto, elf32_arm_thm_pc9_howto, elf32_arm_got_prel)
(elf32_arm_r_howto): Replace with elf32_arm_howto_table_1,
elf32_arm_howto_table_2, and elf32_arm_howto_table_3.
Add many new relocations from AAELF.
(elf32_arm_howto_from_type): Update to match.
(elf32_arm_reloc_map): Add entries for R_ARM_THM_JUMP24,
R_ARM_THM_JUMP11, R_ARM_THM_JUMP19, R_ARM_THM_JUMP8,
R_ARM_THM_JUMP6, R_ARM_GNU_VTINHERIT, and R_ARM_GNU_VTENTRY.
(elf32_arm_reloc_type_lookup): Use elf32_arm_howto_from_type.
(elf32_arm_final_link_relocate): Add support for
R_ARM_THM_JUMP24, R_ARM_THM_JUMP19, R_ARM_THM_JUMP6. Remove
case entries redundant with default.
* reloc.c: Reorganize ARM relocations. Add Thumb
assembler-internal relocations BFD_RELOC_ARM_T32_OFFSET_U8,
BFD_RELOC_ARM_T32_OFFSET_IMM, BFD_RELOC_ARM_T32_IMMEDIATE.
Add visible relocations BFD_RELOC_THUMB_PCREL_BRANCH7,
BFD_RELOC_THUMB_BRANCH20, BFD_RELOC_THUMB_BRANCH25.
Delete unused relocations BFD_RELOC_ARM_GOT12, BFD_RELOC_ARM_COPY.
* bfd-in2.h, libbfd.h: Regenerate.
opcodes:
* arm-dis.c (thumb_opcodes): Add disassembly for V6T2 16-bit
instructions. Adjust disassembly of some opcodes to match
unified syntax.
(thumb32_opcodes): New table.
(print_insn_thumb): Rename print_insn_thumb16; don't handle
two-halfword branches here.
(print_insn_thumb32): New function.
(print_insn): Choose among print_insn_arm, print_insn_thumb16,
and print_insn_thumb32. Be consistent about order of
halfwords when printing 32-bit instructions.
gas:
* hash.c (hash_lookup): Add len parameter. All callers changed.
(hash_find_n): New interface.
* hash.h: Prototype hash_find_n.
* sb.c: Include as.h.
(scrub_from_sb, sb_to_scrub, scrub_position): New statics.
(sb_scrub_and_add_sb): New interface.
* sb.h: Prototype sb_scrub_and_add_sb.
* input-scrub.c (input_scrub_include_sb): Use sb_scrub_and_add_sb.
* config/tc-arm.h (TC_FORCE_RELOCATION_LOCAL): Remove
reference to BFD_RELOC_ARM_GOT12 which is never generated.
* config/tc-arm.c: Rewrite, adding Thumb-2 support.
gas/testsuite:
* gas/arm/arm.exp: Convert all existing "gas_test" tests to
"run_dump_test" tests. Run more tests unconditionally. Run new tests.
* gas/arm/arch4t.s, gas/arm/arch6zk.s, gas/arm/arm3.s, gas/arm/arm6.s
* gas/arm/arm7dm.s, gas/arm/bignum1.s, gas/arm/float.s
* gas/arm/immed.s, gas/arm/iwmmxt.s, gas/arm/offset.s, gas/arm/thumb.s:
Adjust to work as a dump test.
* gas/arm/arch4t.d, gas/arm/arch6zk.d, gas/arm/arm3.d, gas/arm/arm6.d
* gas/arm/arm7dm.d, gas/arm/bignum1.d, gas/arm/float.d
* gas/arm/immed.d, gas/arm/iwmmxt.d, gas/arm/offset.d, gas/arm/thumb.d:
New files.
* gas/arm/armv1-bad.l, gas/arm/armv1-bad.s: Remove tests for
diagnostics that don't happen in the first pass anymore.
* gas/arm/iwmmxt-bad.l, gas/arm/r15-bad.l, gas/arm/req.l
* gas/arm/vfp-bad.l:
Update expected diagnostics.
* gas/arm/pic.d: Update expected reloc name.
* gas/arm/thumbv6.d: CPY no longer appears in disassembly.
* gas/arm/r15-bad.s: Avoid two-argument mul.
* gas/arm/req.s: Adjust comments.
* gas/arm/maverick.d, gas/arm/maverick.s: Avoid inappropriate
use of PC.
* gas/arm/macro-1.d, gas/arm/macro1.s
* gas/arm/t16-bad.l, gas/arm/t16-bad.s
* gas/arm/tcompat.d, gas/arm/tcompat.s
* gas/arm/tcompat2.d, gas/arm/tcompat2.s
* gas/arm/thumb32.d, gas/arm/thumb32.s
New test pair.
ld/testsuite:
* ld-arm/mixed-app.d: Adjust expected disassembly a little.
2005-02-15 Nigel Stephens <nigel@mips.com>
Maciej W. Rozycki <macro@mips.com>
* elf32-mips.c (elf_mips16_howto_table_rel): New array for MIPS16
reloc howtos. Add R_MIPS16_HI16 and R_MIPS16_LO16 relocs and
R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders.
(elf_mips16_jump_howto): Move into elf_mips16_howto_table_rel.
(elf_mips16_gprel_howto): Likewise. Redefine src_mask and
dst_mask.
(mips16_gprel_reloc): Remove bit shuffling; call
_bfd_mips16_elf_reloc_unshuffle(), _bfd_mips_elf_gprel16_with_gp()
and _bfd_mips16_elf_reloc_shuffle() instead.
(mips16_reloc_map): New reloc map for MIPS16 relocs.
(bfd_elf32_bfd_reloc_type_lookup): Use mips16_reloc_map for MIPS16
relocs.
(mips_elf32_rtype_to_howto): Fetch MIPS16 howtos from
elf_mips16_howto_table_rel.
* elf64-mips.c (mips16_elf64_howto_table_rel): New array for
MIPS16 REL reloc howtos. Add R_MIPS16_HI16 and R_MIPS16_LO16
relocs and R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders.
(elf_mips16_jump_howto): Move into mips16_elf64_howto_table_rel.
(elf_mips16_gprel_howto): Likewise. Redefine src_mask and
dst_mask.
(mips16_elf64_howto_table_rela): New array for MIPS16 RELA
reloc howtos. Add R_MIPS16_26, R_MIPS16_GPREL, R_MIPS16_HI16 and
R_MIPS16_LO16 relocs and R_MIPS16_GOT16 and R_MIPS16_CALL16
placeholders.
(mips16_gprel_reloc): Remove bit shuffling; call
_bfd_mips16_elf_reloc_unshuffle(), _bfd_mips_elf_gprel16_with_gp()
and _bfd_mips16_elf_reloc_shuffle() instead.
(mips16_reloc_map): New reloc map for MIPS16 relocs.
(bfd_elf64_bfd_reloc_type_lookup): Use mips16_reloc_map for MIPS16
relocs.
(mips_elf64_rtype_to_howto): Fetch MIPS16 howtos from
mips16_elf64_howto_table_rela or mips16_elf64_howto_table_rel.
* elfn32-mips.c (elf_mips16_howto_table_rel): New array for MIPS16
REL reloc howtos. Add R_MIPS16_HI16 and R_MIPS16_LO16 relocs and
R_MIPS16_GOT16 and R_MIPS16_CALL16 placeholders.
(elf_mips16_jump_howto): Move into elf_mips16_howto_table_rel.
(elf_mips16_gprel_howto): Likewise. Redefine src_mask and
dst_mask.
(mips16_gprel_reloc): Remove bit shuffling; call
_bfd_mips16_elf_reloc_unshuffle(), _bfd_mips_elf_gprel16_with_gp()
and _bfd_mips16_elf_reloc_shuffle() instead.
(mips16_reloc_map): New reloc map for MIPS16 relocs.
(bfd_elf32_bfd_reloc_type_lookup): Use mips16_reloc_map for MIPS16
relocs.
(mips_elf_n32_rtype_to_howto): Fetch MIPS16 howtos from
elf_mips16_howto_table_rela or elf_mips16_howto_table_rel.
* elfxx-mips.c (_bfd_mips16_elf_reloc_unshuffle): New function to
handle bit shuffling for MIPS16 relocs.
(_bfd_mips16_elf_reloc_shuffle): Likewise.
(_bfd_mips_elf_lo16_reloc): Use _bfd_mips16_elf_reloc_unshuffle()
and _bfd_mips16_elf_reloc_shuffle().
(_bfd_mips_elf_generic_reloc): Likewise.
(mips_elf_calculate_relocation): Likewise. Handle R_MIPS16_HI16
and R_MIPS16_LO16.
(mips_elf_obtain_contents): Remove bit shuffling.
(mips_elf_perform_relocation): Likewise; call
_bfd_mips16_elf_reloc_unshuffle() and _bfd_mips16_elf_reloc_shuffle()
instead.
(_bfd_mips_elf_relocate_section): Likewise. Handle R_MIPS16_HI16
and R_MIPS16_LO16.
* elfxx-mips.h (_bfd_mips16_elf_reloc_unshuffle): Declare.
(_bfd_mips16_elf_reloc_shuffle): Likewise.
* reloc.c (BFD_RELOC_MIPS16_HI16): New reloc.
(BFD_RELOC_MIPS16_HI16_S): Likewise.
(BFD_RELOC_MIPS16_LO16): Likewise.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
gas/:
2005-02-15 Nigel Stephens <nigel@mips.com>
Maciej W. Rozycki <macro@mips.com>
* config/tc-mips.c (reloc_needs_lo_p): Handle
BFD_RELOC_MIPS16_HI16_S.
(fixup_has_matching_lo_p): Handle BFD_RELOC_MIPS16_LO16.
(append_insn): Add BFD_RELOC_MIPS16_GPREL, BFD_RELOC_MIPS16_HI16_S
and BFD_RELOC_MIPS16_LO16 to relocs to suppress overflow
complaints on.
(mips16_ip): Resolve BFD_RELOC_MIPS16_HI16_S,
BFD_RELOC_MIPS16_HI16 and BFD_RELOC_MIPS16_LO16 for constants.
Call my_getSmallExpression() to parse percent operators.
(percent_op_match, mips_percent_op): Separate definitions.
(mips16_percent_op): Define percent operators for the MIPS16 mode.
(parse_relocation): Handle the MIPS16 mode using
mips16_percent_op.
(md_apply_fix3): Handle BFD_RELOC_MIPS16_HI16,
BFD_RELOC_MIPS16_HI16_S and BFD_RELOC_MIPS16_LO16.
gas/testsuite/:
2005-02-15 Nigel Stephens <nigel@mips.com>
Maciej W. Rozycki <macro@mips.com>
* gas/mips/mips16-hilo.d: New test for the R_MIPS16_HI16 and
R_MIPS16_LO16 relocs.
* gas/mips/mips16-hilo-n32.d: Likewise, for the n32 ABI.
* gas/mips/mips16-hilo.s: Source for the new tests.
* gas/mips/mips.exp: Run the new tests.
include/:
2005-02-15 Nigel Stephens <nigel@mips.com>
Maciej W. Rozycki <macro@mips.com>
* elf/mips.h (R_MIPS16_GOT16): New reloc code.
(R_MIPS16_CALL16): Likewise.
(R_MIPS16_HI16): Likewise.
(R_MIPS16_LO16): Likewise.
(R_MIPS16_min): New fake reloc code.
(R_MIPS16_max): Likewise.
ld/testsuite/:
2005-02-15 Nigel Stephens <nigel@mips.com>
Maciej W. Rozycki <macro@mips.com>
* ld-mips-elf/mips16-hilo.d: New test for the R_MIPS16_HI16 and
R_MIPS16_LO16 relocs.
* ld-mips-elf/mips16-hilo-n32.d: Likewise, for the n32 ABI.
* ld-mips-elf/mips16-hilo.s: Auxiliary source for the new tests.
* ld-mips-elf/mips-elf.exp: Run the new tests.
* v850.h (R_V850_LO16_SPLIT_OFFSET): New reloc.
bfd/
* reloc.c (BFD_RELOC_V850_LO16_SPLIT_OFFSET): New bfd_reloc_code_type.
* elf32-v850.c (v850_elf_howto_table): Add entry for
R_V850_LO16_SPLIT_OFFSET.
(v850_elf_reloc_map): Map it to BFD_RELOC_V850_LO16_SPLIT_OFFSET.
(v850_elf_perform_lo16_relocation): New function, extracted from...
(v850_elf_perform_relocation): ...here. Use it to handle
R_V850_LO16_SPLIT_OFFSET.
(v850_elf_check_relocs, v850_elf_final_link_relocate): Handle
R_V850_LO16_SPLIT_OFFSET.
* libbfd.h, bfd-in2.h: Regenerate.
gas/
* config/tc-v850.c (handle_lo16): New function.
(v850_reloc_prefix): Use it to check lo().
(md_assemble, md_apply_fix3): Handle BFD_RELOC_V850_LO16_SPLIT_OFFSET.
gas/testsuite/
* gas/v850/split-lo16.{s,d}: New test.
* gas/v850/v850.exp: Run it.
ld/testsuite/
* ld-v850: New directory.
2004-06-14 Chris Demetriou <cgd@broadcom.com>
* elf32-mips.c (elf_mips_gnu_pcrel32): Add (undoing 2004-04-24
removal) with updated comment.
(bfd_elf32_bfd_reloc_type_lookup): Add back case for
BFD_RELOC_32_PCREL.
(mips_elf32_rtype_to_howto): Add back case for R_MIPS_PC32.
* elfxx-mips.c (mips_elf_calculate_relocation): Likewise.
[ include/elf/ChangeLog ]
2004-06-14 Chris Demetriou <cgd@broadcom.com>
* mips.h (R_MIPS_PC32): Add back (undoing removal on 2004-04-24),
with an updated comment.
bfd:
* Makefile.am: Regenerate dependencies.
* Makefile.in: Regenerate.
* archures.c: Add bfd_mach_sh3_nommu .
* bfd-in2.h: Regenerate.
* cpu-sh.c: Add sh3-nommu architecture.
(bfd_to_arch_table): Create new table.
(sh_get_arch_from_bfd_mach): Create new function.
(sh_get_arch_up_from_bfd_mach): Create new function.
(sh_merge_bfd_arch): Create new function.
* elf32-sh.c (sh_ef_bfd_table): Add table.
(sh_elf_check_relocs): Replace switch statement with
use of sh_ef_bfd_table .
(sh_elf_get_flags_from_mach): Add new function.
(sh_find_elf_flags): Likewise.
(sh_elf_copy_private_data): Replace most of non-elf contents
with a call to sh_merge_bfd_arch() .
gas:
* Makefile.am: Regenerate dependecies.
* Makefile.in: Regenerate.
* config/tc-sh.c (valid_arch): Make unsigned.
(preset_target_arch): Likewise.
(md_begin): Use new architecture flags system.
(get_specific): Likewise.
(assemble_ppi): Likewise.
(md_assemble): Likewise. Also fix error check for bad opcodes.
(md_parse_option): Likewise. Also generate -isa values according
to the table in bfd/cpu-sh.c instead of just constants. Also
allow <arch>-up ISA variants.
(sh_elf_final_processing): Replace if-else chain with a call to
sh_find_elf_flags().
* testsuite/gas/sh/arch: New directory.
* testsuite/gas/sh/arch/arch.exp: New test script.
* testsuite/gas/sh/arch/arch_expected.txt: New file.
* testsuite/gas/sh/arch/sh.s: New file.
* testsuite/gas/sh/arch/sh2.s: New file.
* testsuite/gas/sh/arch/sh-dsp.s: New file.
* testsuite/gas/sh/arch/sh2e.s: New file.
* testsuite/gas/sh/arch/sh3-nommu.s: New file.
* testsuite/gas/sh/arch/sh3.s: New file.
* testsuite/gas/sh/arch/sh3-dsp.s: New file.
* testsuite/gas/sh/arch/sh3e.s: New file.
* testsuite/gas/sh/arch/sh4-nommu-nofpu.s: New file.
* testsuite/gas/sh/arch/sh4-nofpu.s: New file.
* testsuite/gas/sh/arch/sh4.s: New file.
* testsuite/gas/sh/arch/sh4a-nofpu.s: New file.
* testsuite/gas/sh/arch/sh4al-dsp.s: New file.
* testsuite/gas/sh/arch/sh4a.s: New file.
include/elf:
* sh.h (EF_SH_HAS_DSP): Remove.
(EF_SH_HAS_FP): Remove.
(EF_SH_MERGE_MACH): Remove.
(EF_SH4_NOFPU): Convert to decimal.
(EF_SH4A_NOFPU): Likewise.
(EF_SH4_NOMMU_NOFPU): Likewise.
(EF_SH3_NOMMU): Add new macro.
(EF_SH_BFD_TABLE): Likewise.
(sh_find_elf_flags): Add prototype.
(sh_elf_get_flags_from_mach): Likewise.
opcodes:
* sh-dis.c (target_arch): Make unsigned.
(print_insn_sh): Replace (most of) switch with a call to
sh_get_arch_from_bfd_mach(). Also use new architecture flags system.
* sh-opc.h: Redefine architecture flags values.
Add sh3-nommu architecture.
Reorganise <arch>_up macros so they make more visual sense.
(SH_MERGE_ARCH_SET): Define new macro.
(SH_VALID_BASE_ARCH_SET): Likewise.
(SH_VALID_MMU_ARCH_SET): Likewise.
(SH_VALID_CO_ARCH_SET): Likewise.
(SH_VALID_ARCH_SET): Likewise.
(SH_MERGE_ARCH_SET_VALID): Likewise.
(SH_ARCH_SET_HAS_FPU): Likewise.
(SH_ARCH_SET_HAS_DSP): Likewise.
(SH_ARCH_UNKNOWN_ARCH): Likewise.
(sh_get_arch_from_bfd_mach): Add prototype.
(sh_get_arch_up_from_bfd_mach): Likewise.
(sh_get_bfd_mach_from_arch_set): Likewise.
(sh_merge_bfd_arc): Likewise.
ld:
* testsuite/ld-sh/arch/arch.exp: New test script.
* testsuite/ld-sh/arch/arch_expected.txt: New file.
* testsuite/ld-sh/arch/sh.s: New file.
* testsuite/ld-sh/arch/sh2.s: New file.
* testsuite/ld-sh/arch/sh-dsp.s: New file.
* testsuite/ld-sh/arch/sh2e.s: New file.
* testsuite/ld-sh/arch/sh3-nommu.s: New file.
* testsuite/ld-sh/arch/sh3.s: New file.
* testsuite/ld-sh/arch/sh3-dsp.s: New file.
* testsuite/ld-sh/arch/sh3e.s: New file.
* testsuite/ld-sh/arch/sh4-nommu-nofpu.s: New file.
* testsuite/ld-sh/arch/sh4-nofpu.s: New file.
* testsuite/ld-sh/arch/sh4.s: New file.
* testsuite/ld-sh/arch/sh4a-nofpu.s: New file.
* testsuite/ld-sh/arch/sh4al-dsp.s: New file.
* testsuite/ld-sh/arch/sh4a.s: New file.
opcodes:
* sh-dis.c (print_insn_sh): Don't disassemble fp instructions in
nofpu mode. Add BFD type bfd_mach_sh4_nommu_nofpu.
* sh-opc.h: Add sh4_nommu_nofpu architecture and adjust instructions
accordingly.
bfd:
* archures.c: Add bfd_mach_sh4_nommu_nofpu.
* cpu-sh.c: Ditto.
* elf32-sh.c: Ditto.
* bfd-in2.h: Regenerate.
include/elf:
* sh.h: Add EF_SH4_NOMMU_NOFPU.
gas:
* config/tc-sh.c (md_parse_option): Add -isa=sh4-nofpu and
-isa=sh4-nommu-nofpu options. Adjust help messages accordingly.
(sh_elf_final_processing): Output BFD type sh4_nofpu if that is
the most general type or the user specifically requested it.
(md_assemble): Add a new error message for when an instruction
is understood, but is not allowed due to an -isa option.
(_bfd_mmix_before_linker_allocation): Rename from
_bfd_mmix_prepare_linker_allocated_gregs.
(_bfd_mmix_after_linker_allocation): Rename from
_bfd_mmix_finalize_linker_allocated_gregs.
* elf32-ppc.c (R_PPC_RELAX32): New relocation.
(ppc_elf_install_value): New function.
(ppc_elf_sort_rela): Remove.
(ppc_elf_relax_section): Rewrite. Remove old relaxation
and replace with out of range branch stubs.
(ppc_elf_relocate_section): Handle R_PPC_RELAX32.
2003-07-28 Eric Christopher <echristo@redhat.com>
* ppc.h (R_PPC_RELAX32): New. Fake relocation.
gcc:
* config/sh/sh.h (EXTRA_SPECS): Add subtarget_asm_relax_spec and
subtarget_asm_isa_spec.
(SUBTARGET_ASM_RELAX_SPEC, SUBTARGET_ASM_ISA_SPEC): Define.
(ASM_SPEC): Define as SH_ASM_SPEC.
(SH_ASM_SPEC): New; take the role of ASM_SPEC, but safe from svr4.h.
Use subtarget_asm_relax_spec and subtarget_asm_isa_spec.
* config/sh/elf.h (ASM_SPEC): Use SH_ASM_SPEC.
(SUBTARGET_ASM_ISA_SPEC): Undef / define.
gcc/testsuite:
gcc.dg/sh-relax.c: New test.
include/elf:
* sh.h (EF_SH_MERGE_MACH): Make sure SH2E & SH3/SH3E merge to SH3E,
and SH2E & SH4 merge to SH4, not SH2E.
gas:
* config/tc-sh.c (sh_dsp): Replace with preset_target_arch.
(md_begin): Use preset_target_arch.
(md_longopts): Make isa option unconditional.
(md_parse_option): Make OPTION_DSP and OPTION_ISA sh4 / any
set preset_target_arch.
(md_apply_fix3): If BFD_ASSEMBLER, adjust SWITCH_TABLE fixups
by -S_GET_VALUE (fixP->fx_subsy).
(tc_gen_reloc): For SWITCH_TABLE fixups, the symbol is fixp->fx_subsy,
and the addend is 0.
Adjust addend of R_SH_IND12W relocations by fixp->fx_offset - 4.
* config/tc-sh.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define.
bfd:
elf32-sh.c (sh_elf_howto_tab): Make R_SH_IND12W into an ordinary
relocation (no special function), and make it non-partial_inplace.
(sh_elf_relax_section): When creating a bsr, use a consistent value
no matter if the symbol is extern or not; set addend to -4.
Don't swap load / non-load instructions for SH4.
(sh_elf_relax_delete_bytes): In R_SH_IND12W case, check the offset
rather than if the symbol is external to determine if adjusting the
offset makes sense. Adjust the addend too if appropriate.
(sh_elf_relocate_section): In R_SH_IND12W, don't fiddle with the
relocation.
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case.
* archures.c (bfd_mach_mipsisa32r2): New define.
* bfd-in2.h: Regenerate.
* cpu-mips.c (I_mipsisa32r2): New enum value.
(arch_info_struct): Add entry for I_mipsisa32r2.
* elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach)
(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2.
(_bfd_mips_elf_final_write_processing): Add
bfd_mach_mipsisa32r2 case.
(_bfd_mips_elf_merge_private_bfd_data): Handle merging of
binaries marked as using MIPS32 Release 2.
[ binutils/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register)
changes in MIPS -M options.
[ gas/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* configure.in: Recognize mipsisa32r2, mipsisa32r2el, and
CPU variants.
* configure: Regenerate.
* config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines.
(macro_build): Handle "K" operand.
(macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where
CPU_HAS_DROR and CPU_HAS_ROR are currently used.
(mips_ip): New variable "lastpos", and implement "+A", "+B",
and "+C" operands for MIPS32 Release 2 ins/ext instructions.
Implement "K" operand for MIPS32 Release 2 rdhwr instruction.
(validate_mips_insn): Implement "+" as a way to extend the
allowed operands, and implement "K", "+A", "+B", and "+C"
operands.
(OPTION_MIPS32R2): New define.
(md_longopts): Add entry for OPTION_MIPS32R2.
(OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2.
(md_parse_option): Handle OPTION_MIPS32R2.
(s_mipsset): Reimplement handling of ".set mipsN" options
and add support for ".set mips32r2".
(mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2).
(md_show_usage): Document "-mips32r2" option.
* doc/as.texinfo: Document "-mips32r2" option.
* doc/c-mips.texi: Likewise.
[ gas/testsuite/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0-names-mips32r2.d: New test.
* gas/mips/hwr-names-mips32r2.d: New test.
* gas/mips/hwr-names-numeric.d: New test.
* gas/mips/hwr-names.s: New test source file.
* gas/mips/mips32r2.d: New test.
* gas/mips/mips32r2.s: New test source file.
* gas/mips/mips32r2-ill.l: New test.
* gas/mips/mips32r2-ill.s: New test source file.
* gas/mips/mips.exp: Add mips32r2 architecture data array
entry. Run new tests mentioned above.
[ include/elf/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips.h (E_MIPS_ARCH_32R2): New define.
[ include/opcode/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips.h: Document "+" as the start of two-character operand
type names, and add new "K", "+A", "+B", and "+C" operand types.
(OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
(OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
defines.
[ opcodes/ChangeLog ]
2002-12-30 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric)
(mips_hwr_names_mips3264r2): New arrays.
(mips_arch_choice): New "hwr_names" member.
(mips_arch_choices): Adjust for structure change, and add a new
entry for "mips32r2" ISA.
(mips_hwr_names): New variable.
(set_default_mips_dis_options): Set mips_hwr_names.
(parse_mips_dis_option): New "hwr-names" option which sets
mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names.
(print_insn_arg): Change return type to "int"
and use that to indicate number of characters consumed.
Add support for "+" operand extension character, "+A", "+B",
"+C", and "K" operands.
(print_insn_mips): Adjust for changes to print_insn_arg.
(print_mips_disassembler_options): Adjust for "hwr-names"
addition and "reg-names" change.
* mips-opc (I33): New define (shorthand for INSN_ISA32R2).
(mips_builtin_opcodes): Note that "nop" and "ssnop" are special
forms of "sll". Add new MIPS32 Release 2 instructions: ehb,
di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2,
rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh.
Note that hardware rotate instructions (ror, rorv) can be
used on MIPS32 Release 2, and add the official mnemonics
for them (rotr, rotrv) and the similar "rotl" mnemonic for
left-rotate.
EF_M68HC11_ABI): Define for ABI specification.
(STO_M68HC12_FAR, STO_M68HC12_INTERRUPT): Symbol flags for
linker and debugger.
(R_M68HC11_24, R_M68HC11_LO16, R_M68HC11_PAGE): New relocs.
(R_M68HC11_RL_JUMP, R_M68HC11_RL_GROUP): New reloc for linker
relaxation.
2002-07-01 Matt Thomas <matt@3am-software.com>
* Rename EF_* to EF_VAX_*.
bfd:
2002-07-01 Matt Thomas <matt@3am-software.com>
* elf32-vax.c (elf32_vax_print_private_bfd_data): Change EF_*
to EF_VAX_*.
binutils:
2002-07-01 Matt Thomas <matt@3am-software.com>
* readelf.c: Include "elf/vax.h".
(guess_is_rela): Move EM_VAX from unknown to RELA case.
(dump_relocations): Handle VAX relocations.
(get_machine_flags): Handle VAX machine flags.
2002-02-13 Matt Fredette <fredette@netbsd.org>
* elf32-m68k.c (elf32_m68k_print_private_bfd_data): Recognize
EF_M68000.
bintuls:
2002-02-13 Matt Fredette <fredette@netbsd.org>
* readelf.c (get_machine_flags): Recognize EF_M68000.
gas:
2002-02-13 Matt Fredette <fredette@netbsd.org>
* config/tc-m68k.c (md_show_usage): No longer display a
hard-coded "68020" for the default CPU, instead display the
canonical name of the true, configured default CPU.
(m68k_elf_final_processing): Mark objects for sub-68020
CPUs with the new EF_M68000 flag.
include/elf:
2002-02-13 Matt Fredette <fredette@netbsd.org>
* m68k.h (EF_M68000): Define.
* common.h: Update copyright years.
(NT_NETBSDCORE_PROCINFO): Define.
(NT_NETBSDCORE_FIRSTMACH): Define.
bfd:
* elf.c: Update copyright years.
(elfcore_grok_netbsd_note): Use NT_NETBSDCORE_PROCINFO
and NT_NETBSDCORE_FIRSTMACH. Improve a comment.
bintuils:
* readelf.c (get_netbsd_elfcore_note_type): Use
NT_NETBSDCORE_PROCINFO and NT_NETBSDCORE_FIRSTMACH.
include/elf/ChangeLog
* external.h (Elf_External_Sym_Shndx): Declare.
* internal.h (struct elf_internal_sym <st_shndx>): Make it an
unsigned int.
* common.h (SHN_BAD): Define.
bfd/ChangeLog
* configure.in: Bump bfd version.
* configure: Regenerate.
* elf-bfd.h (elf_size_info <swap_symbol_out>): Add shndx param.
(bfd_elf32_swap_symbol_in): Likewise.
(bfd_elf32_swap_symbol_out): Likewise.
(bfd_elf64_swap_symbol_in): Likewise.
(bfd_elf64_swap_symbol_out): Likewise.
(elf_reloc_cookie): Add locsym_shndx field. Make locsyms a PTR.
(elf_obj_tdata): Add num_elf_sections, symtab_shndx_hdr and
symtab_shndx_section.
(elf_numsections): Define.
(elf_symtab_shndx): Define.
* elf.c (setup_group): Use elf_numsections rather than header e_shnum.
(bfd_elf_find_section): Likewise.
(bfd_section_from_elf_index): Likewise.
(bfd_section_from_shdr): Likewise. Handle SHT_SYMTAB_SHNDX.
(bfd_section_from_r_symndx): Read symbol shndx extension, and
translate st_shndx for > SHN_HIRESERVE.
(assign_section_numbers): Skip reserved sections. Assign
symtab_shndx_section and elf_numsections. Exclude reserved
sections from e_shnum. Set up symtab_shndx_hdr.
(_bfd_elf_compute_section_file_positions): Handle symtab_shndx_hdr.
(map_sections_to_segments): Don't map eh_frame_hdr unless required.
(assign_file_positions_except_relocs): Use elf_numsections rather
than header e_shnum. Skip reserved sections and symtab_shndx_section.
(prep_headers): Set name for symtab_shndx_hdr.
(_bfd_elf_assign_file_positions_for_relocs): Use elf_numsections.
(_bfd_elf_write_object_contents): Likewise. Skip reserved sections.
(_bfd_elf_section_from_bfd_section): Check bfd_{abs,com,und}_section
first. Use elf_section_data if available. Use elf_numsections.
Start scan at index 1.
(copy_private_bfd_data ): Comment fixes.
(MAP_ONESYMTAB): Define above SHN_HIOS.
(MAP_DYNSYMTAB): Likewise.
(MAP_STRTAB): Likewise.
(MAP_SHSTRTAB): Likewise.
(MAP_SYM_SHNDX): New define.
(_bfd_elf_copy_private_symbol_data): Handle symtab_shndx_section.
(swap_out_syms): Swap out SHT_SYMTAB_SHNDX section too.
* elfcode.h (elf_swap_symbol_in): Add shndx param, and handle shndx
extension.
(elf_swap_symbol_out): Likewise.
(elf_object_p): Set elf_numsections, and use instead of e_shnum.
Initialialise reserved elf_elfsections to point at shdr[0]. Remove
redundant bfd_release calls.
(elf_slurp_symbol_table): Read symbol shndx extension, and use with
elf_swap_symbol_in. Translate st_shndx for > SHN_HIRESERVE too.
* elflink.h (elf_link_is_defined_archive_symbol): Read symbol shndx
extension, and use with elf_swap_symbol_in.
(elf_link_record_local_dynamic_symbol): Likewise.
(elf_link_add_object_symbols): Likewise. Also translate st_shndx
for elf sections > SHN_HIRESERVE.
(NAME(bfd_elf,size_dynamic_sections)): Adjust elf_swap_symbol_out
call.
(struct elf_final_link_info): Add locsym_shndx and symshndxbuf.
(elf_bfd_final_link): Allocate the above, and tidy code allocating
other buffers. Use elf_numsections instead of e_shnum. Adjust
elf_swap_symbol_out calls.
(elf_link_output_sym): Swap out symbol shndx extension too.
(elf_link_flush_output_syms): And flush them to disk.
(elf_link_output_extsym): Use SHN_BAD. Adjust elf_swap_symbol_out
calls.
(elf_gc_mark): Read symbol shndx extension, and use with
elf_swap_symbol_in.
(elf_link_input_bfd): Likewise, Translate st_shndx for elf sections
> SHN_HIRESERVE too. Use SHN_BAD.
(elf_reloc_symbol_deleted_p): Use symbol shndx extensions with
elf_swap_symbol_in. Translate st_shndx > SHN_HIRESERVE too.
(elf_bfd_discard_info): Read symbol shndx extension. Don't attempt
to continue after a bfd error.
* elf-m10200.c (mn10200_elf_relax_section): Only read local syms.
Stash them immediately to symtab_hdr->contents rather than later
in multiple places. Clean up afterwards. Read symbol shndx
extension, and use with swap_symbol_in. Translate SHN_UNDEF,
SHN_ABS, SHN_COMMON and elf sections > SHN_HIRESERVE to bfd
sections too. Remove dead code.
(mn10200_elf_relax_delete_bytes): Use symbol shndx extension
when swapping in symbols. Tidy code adjusting global syms.
Don't swap in global syms.
(mn10200_elf_symbol_address_p): Likewise. Remove extsyms param.
(mn10200_elf_get_relocated_section_contents): Read symbol shndx
extension, and use with swap_symbol_in. Rename "size" -> "amt"
to maximize code in common with other files. Translate st_shndx
for > SHN_HIRESERVE too. Remove dead code.
* elf-m10300.c (mn10300_elf_relax_section): Only read local syms.
Stash them immediately to symtab_hdr->contents rather than later
in multiple places. Clean up afterwards. Read symbol shndx
extension, and use with swap_symbol_in. Remove dead code.
(mn10300_elf_relax_delete_bytes): As for elf-m10200.c.
(mn10300_elf_symbol_address_p): Likewise.
(mn10300_elf_get_relocated_section_contents): Likewise.
* elf32-h8300.c (elf32_h8_relax_section): As for elf-m10300.c.
(elf32_h8_relax_delete_bytes): Likewise.
(elf32_h8_symbol_address_p): Likewise.
(elf32_h8_get_relocated_section_contents): Likewise.
* elf32-hppa.c (elf32_hppa_size_stubs): Read symbol shndx
extension, and use with swap_symbol_in.
* elf64-hppa.c (elf64_hppa_check_relocs): Likewise.
* elf32-i370.c (i370_elf_finish_dynamic_sections): Adjust call to
bfd_elf32_swap_symbol_out.
* elf32-m32r.c (m32r_elf_get_relocated_section_contents): Translate
elf sections > SHN_HIRESERVE too.
* elf32-m68k.c (bfd_m68k_elf32_create_embedded_relocs): Only read
local syms. Read symbol shndx extension, and use with swap_symbol_in.
* elf32-mips.c (_bfd_mips_elf_final_write_processing): Use
elf_numsections rather than header e_shnum.
* elf32-sh.c (sh_elf_relax_section): As for elf-m10300.c.
(sh_elf_relax_delete_bytes): Likewise.
(sh_elf_get_relocated_section_contents): Likewise. Only read local
symbols.
* elf32-v850.c (v850_elf_symbol_processing): Use an unsigned int to
hold section index. Use elf_numsections rather than e_shnum.
Rename "index" -> "indx" to avoid shadowing warning.
(v850_elf_add_symbol_hook): Likewise.
* elf64-alpha.c (elf64_alpha_relax_section): Only read local syms.
Read symbol shndx extension, and use with swap_symbol_in.
* elf32-xstormy16.c (xstormy16_elf_relax_section): Likewise.
Translate SHN_COMMON and elf sections > SHN_HIRESERVE too.
* elfxx-ia64.c (elfNN_ia64_relax_section): Likewise.
(elfNN_ia64_aix_add_symbol_hook): Use elf_numsections.
* elf-m10300.c (mn10300_elf_gc_mark_hook): Remove unnecessary checks
before calling bfd_section_from_elf_index on local syms.
* elf32-arm.h (elf32_arm_gc_mark_hook): Likewise.
* elf32-avr.c (elf32_avr_gc_mark_hook): Likewise.
* elf32-cris.c (cris_elf_gc_mark_hook): Likewise.
* elf32-d10v.c (elf32_d10v_gc_mark_hook): Likewise.
* elf32-fr30.c (fr30_elf_gc_mark_hook): Likewise.
* elf32-hppa.c (elf32_hppa_gc_mark_hook): Likewise.
* elf32-i386.c (elf_i386_gc_mark_hook): Likewise.
* elf32-m32r.c (m32r_elf_gc_mark_hook): Likewise.
* elf32-m68k.c (elf_m68k_gc_mark_hook): Likewise.
* elf32-mcore.c (mcore_elf_gc_mark_hook): Likewise.
* elf32-mips.c (_bfd_mips_elf_gc_mark_hook): Likewise.
* elf32-openrisc.c (openrisc_elf_gc_mark_hook): Likewise.
* elf32-ppc.c (ppc_elf_gc_mark_hook): Likewise.
* elf32-s390.c (elf_s390_gc_mark_hook): Likewise.
* elf32-sh.c (sh_elf_gc_mark_hook): Likewise.
* elf32-sparc.c (elf32_sparc_gc_mark_hook): Likewise.
* elf32-v850.c (v850_elf_gc_mark_hook): Likewise.
* elf32-xstormy16.c (xstormy16_elf_gc_mark_hook): Likewise.
* elf64-mips.c (mips_elf64_gc_mark_hook): Likewise.
* elf64-mmix.c (mmix_elf_gc_mark_hook): Likewise.
* elf64-ppc.c (ppc64_elf_gc_mark_hook): Likewise.
* elf64-s390.c (elf_s390_gc_mark_hook): Likewise.
* elf64-x86-64.c (elf64_x86_64_gc_mark_hook): Likewise.
binutils/ChangeLog
* readelf.c (symtab_shndx_hdr): New global.
(SECTION_HEADER_INDEX): Define.
(SECTION_HEADER_NUM): Define.
(SECTION_HEADER): Define.
(GET_ELF_SYMBOLS): Pass two params rather than three.
(get_32bit_elf_symbols): Take file and section args. Read and
use SHT_SYMTAB_SHNDX.
(get_64bit_elf_symbols): Likewise.
(dump_relocations): Use SECTION_HEADER to index "section_headers".
(process_section_headers): Likewise. Use SECTION_HEADER_NUM too.
Remember symtab_shdx_hdr.
(process_program_headers): Scan from index 1 for segment map.
(slurp_ia64_unwind_table): Use SECTION_HEADER to index
"section_headers".
(process_relocs): Likewise. Also adjust call to GET_ELF_SYMBOLS.
(process_unwind): Likewise.
(process_version_sections): Likewise.
(process_symbol_table): Likewise.
(display_debug_info): Likewise.
(process_dynamic_segment): Fake up a symtab section for changed
GET_ELF_SYMBOLS.
(get_symbol_index_type): Check SHN_LOOS before SHN_LORESERVE.
(process_program_headers): Kill signed/unsigned warning.
(load_debug_str): Likewise.
(display_debug_info): Likewise.
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
Richard Henderson <rth@redhat.com>
Corinna Vinschen <vinschen@redhat.com>
* Makefile.am: Add support for xstormy16.
* archures.c: Add support for xstormy16.
* config.bfd: Add support for xstormy16.
* configure.in: Add support for xstormy16.
* reloc.c: Add support for xstormy16.
* targets.c: Add support for xstormy16.
* cpu-xstormy16.c: New file.
* elf32-xstormy16.c: New file.
* Makefile.in: Regenerated.
* bfd-in2.h: Regenerated.
* configure: Regenerated.
* libbfd.h: Regenerated.
Index: binutils/ChangeLog
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
* readelf.c (guess_is_rela): Add support for stormy16.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
Index: gas/ChangeLog
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
Richard Henderson <rth@redhat.com>
* configure.in: Add support for xstormy16.
* configure: Regenerated.
* Makefile.am: Add support for xstormy16.
* Makefile.in: Regenerated.
* config/tc-xstormy16.c: New file.
* config/tc-xstormy16.h: New file.
Index: gas/testsuite/ChangeLog
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
matthew green <mrg@redhat.com>
* gas/xstormy16/allinsn.d: New file.
* gas/xstormy16/allinsn.exp: New file.
* gas/xstormy16/allinsn.s: New file.
* gas/xstormy16/allinsn.sh: New file.
* gas/xstormy16/gcc.d: New file.
* gas/xstormy16/gcc.s: New file.
* gas/xstormy16/gcc.sh: New file.
* gas/xstormy16/reloc-1.d: New file.
* gas/xstormy16/reloc-1.s: New file.
* gas/xstormy16/reloc-2.d: New file.
* gas/xstormy16/reloc-2.s: New file.
Index: ld/ChangeLog
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
Richard Henderson <rth@redhat.com>
* Makefile.am: Add support for xstormy16.
* configure.tgt: Add support for xstormy16.
* Makefile.in: Regenerate.
* emulparams/elf32xstormy16.sh: New file.
* scripttempl/xstormy16.sc: New file.
Index: opcodes/ChangeLog
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
* Makefile.am: Add support for xstormy16.
* Makefile.in: Regenerate.
* configure.in: Add support for xstormy16.
* configure: Regenerate.
* disassemble.c: Add support for xstormy16.
* xstormy16-asm.c: New generated file.
* xstormy16-desc.c: New generated file.
* xstormy16-desc.h: New generated file.
* xstormy16-dis.c: New generated file.
* xstormy16-ibld.c: New generated file.
* xstormy16-opc.c: New generated file.
* xstormy16-opc.h: New generated file.
Index: include/ChangeLog
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
* dis-asm.h (print_insn_xstormy16): Declare.
Index: include/elf/ChangeLog
2001-12-07 Geoffrey Keating <geoffk@redhat.com>
Richard Henderson <rth@redhat.com>
* common.h (EM_XSTORMY16): Define.
* xstormy16.h: New file.
(EM_AVR): this, redefined as in the current ELF standard.
(EM_PJ_OLD): Renamed from...
(EM_PJ): this, redefined as in the current ELF standard.
(EM_R30, EM_D10V, EM_D30V, EM_V850, EM_M32R, EM_MN10300,
EM_MN10200, EM_OPENRISC, EM_ARC_A5, EM_XTENSA): Defined as in
the current ELF standard.
(EM_CYGNUS_ARC): Removed, unused for a long time.
EM_* constants are assigned. Move EM_PJ from official section to
ad-hoc section.
(EM_CRIS): Correct comment to match official description.
(EM_MMIX): Ditto.
R_SH_JMP_SLOT, R_SH_RELATIVE, R_SH_GOTOFF, R_SH_GOTPC): Change
numbers to the range from 160 to 167.
(R_SH_FIRST_INVALID_RELOC): Adjust.
(R_SH_FIRST_INVALID_RELOC_2, R_SH_LAST_INVALID_RELOC_2):
New relocs to fill in the gap.
bfd/
2000-08-14 Jim Wilson <wilson@cygnus.com>
* elf64-ia64.c (elf64_ia64_merge_private_bfd_data): Handle
EF_IA_64_REDUCEDFP, EF_IA_64_CONS_GP, and EF_IA_64_NOFUNCDESC_CONS_GP.
(elf64_ia64_print_private_bfd_data): Likewise. Also handle
EF_IA_64_ABSOLUTE.
gas/
2000-08-14 Jim Wilson <wilson@cygnus.com>
* config/tc-ia64.c (md_longopts): Add -mconstant-gp and -mauto-pic.
(md_parse_option): Add OPTION_MCONSTANT_GP and OPTION_MAUTO_PIC.
(md_begin): Change assignment to md.flag to OR in the new bit.
include/elf/
2000-08-14 Jim Wilson <wilson@cygnus.com>
* elf/ia64.h (EF_IA_64_REDUCEDFP, EF_IA_64_CONS_GP,
EF_IA_64_NOFUNCDESC_CONS_GP, EF_IA_64_ABSOLUTE): Define.
opcodes:
* sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4.
Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
(sh_arg_type): Add A_PC.
(sh_table): Update entries using immediates. Add repeat.
* sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4.
Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
gas:
* config/tc-sh.c (immediate): Delete.
(sh_operand_info): Add immediate member.
(parse_reg): Use A_PC for pc.
(parse_exp): Add second argument 'op'. All callers changed.
(parse_at): Expect pc to be coded as A_PC.
Use immediate field in *op.
(insert): Add fourth argument 'op'. All callers changed.
(build_relax): Add second argument 'op'. All callers changed.
(insert_loop_bounds): New function.
(build_Mytes): Remove DISP_4.
Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
(assemble_ppi): Use immediate field in *operand.
(sh_force_relocation): Handle BFD_RELOC_SH_LOOP_{START,END}.
(md_apply_fix): Likewise.
(tc_gen_reloc): Likewise. Check for a pcrel BFD_RELOC_SH_LABEL.
include/coff:
* sh.h (R_SH_LOOP_START, R_SH_LOOP_END): Define.
include/elf:
* sh.h (R_SH_LOOP_START, R_SH_LOOP_END): New RELOC_NUMBERs.
bfd:
* reloc.c (_bfd_relocate_contents): Add BFD_RELOC_SH_LOOP_START and
BFD_RELOC_SH_LOOP_END.
* elf32-sh.c (sh_elf_howto_tab): Change special_func to
sh_elf_ignore_reloc for all entries that sh_elf_reloc used to ignore.
Add entries for R_SH_LOOP_START and R_SH_LOOP_END.
(sh_elf_reloc_loop): New function.
(sh_elf_reloc): No need to test for always-to-be-ignored relocs
any more.
(sh_rel): Add entries for BFD_RELOC_SH_LOOP_{START,END}.
(sh_elf_relocate_section): Handle BFD_RELOC_SH_LOOP_{START,END}.
* bfd-in2.h, libbfd.h: Regenerate.
* elf32-mips.c (mips_elf_next_relocation): Rename from
mips_elf_next_lo16_relocation, and generalize to look
for any relocation type.
(elf_mips_howto_table): Make R_MIPS_PC16 pcrel_offset.
(elf_mips_gnu_rel_hi16): Howto for R_MIPS_GNU_REL_HI16.
(elf_mips_gnu_rel_lo16): Howto for R_MIPS_GNU_REL_LO16.
(elf_mips_gnu_rel16_s2): Howto for R_MIPS_GNU_REL16_S2.
(elf_mips_gnu_pcrel64): Howto for R_MIPS_PC64.
(elf_mips_gnu_pcrel32): Howto for R_MIPS_PC32.
(bfd_elf32_bfd_reloc_type_lookup): Add new relocs.
(mips_rtype_to_howto): Likewise.
(mips_elf_calculate_relocation): Handle new relocs.
(_bfd_mips_elf_relocate_section): REL_HI16/REL_LO16 relocs
are paired. The addend for R_MIPS_GNU_REL16_S2
is shifted right two bits.
In gas/:
* config/tc-mips.c (mips_ip): Don't put stuff in .rodata
when embedded-pic.
* config/tc-mips.c (SWITCH_TABLE): The ELF embedded-pic
implementation doesn't have special handling for switch
statements.
(macro_build): Allow for code in sections other than .text.
(macro): Likewise.
(mips_ip): Likewise.
(md_apply_fix): Do pc-relative relocation madness for MIPS ELF.
Don't perform relocs if we will be outputting them.
(tc_gen_reloc): For ELF, just use fx_addnumber for pc-relative
relocations. Allow BFD_RELOC_16_PCREL_S2 relocs when
embedded-pic.
In gas/testsuite/:
* gas/mips/empic.d: New file.
* gas/mips/empic.s: New file.
* gas/mips/mips16-e.d: New file.
* gas/mips/mips16-e.s: New file.
* gas/mips/mips16-f.d: New file.
* gas/mips/mips16-f.s: New file.
* gas/mips/mips.exp: Add empic, mips16-e. Add mips16-f as an
expected failure.
In include/elf:
* mips.h: Add R_MIPS_GNU_REL_HI16, R_MIPS_GNU_REL_LO16,
R_MIPS_GNU_REL16_S2, R_MIPS_PC64 and R_MIPS_PC32 relocation
numbers.
Reinstate bits of sh4 support that got accidentally deleted.
Add sh-dsp support.
bfd:
* archures.c (bfd_mach_sh2, bfd_mach_sh_dsp): New macros.
(bfd_mach_sh3_dsp): Likewise.
(bfd_mach_sh4): Reinstate.
(bfd_default_scan): Recognize 7410, 7708, 7729 and 7750.
* bfd-in2.h: Regenerate.
* coff-sh.c (struct sh_opcode): flags is no longer short.
(USESAS, USESAS_REG, USESR8, SETSAS, SETSAS_REG): New macros.
(sh_opcode41, sh_opcode42): Integrate as sh_opcode41.
(sh_opcode01, sh_opcode02, sh_opcode40): Add sh-dsp opcodes.
(sh_opcode41, sh_opcode4, sh_opcode80): Likewise.
(sh_opcodes): No longer const.
(sh_dsp_opcodef0, sh_dsp_opcodef): New arrays.
(sh_insn_uses_reg): Check for USESAS and USESR8.
(sh_insn_sets_reg, sh_insns_conflict): Check for SETSAS.
(_bfd_sh_align_load_span): Return early for SH4.
Modify sh_opcodes lookup table for sh-dsp / sh3-dsp.
Take into account that field b of a parallel processing insn
could be mistaken for a separate insn.
* cpu-sh.c (arch_info_struct): New array elements for
sh2, sh-dsp and sh3-dsp.
Reinstate element for sh4.
(SH2_NEXT, SH_DSP_NEXT, SH3_DSP_NEXT): New macros.
(SH4_NEXT): Reinstate.
(SH3_NEXT, SH3E_NEXT): Adjust.
* elf-bfd.h (_sh_elf_set_mach_from_flags): Declare.
* elf32-sh.c (sh_elf_set_private_flags): New function.
(sh_elf_copy_private_data, sh_elf_set_mach_from_flags): Likewise.
(sh_elf_merge_private_data): New function.
(elf_backend_object_p, bfd_elf32_bfd_set_private_bfd_flags): Define.
(bfd_elf32_bfd_copy_private_bfd_data): Define.
(bfd_elf32_bfd_merge_private_bfd_data): Change to
sh_elf_merge_private_data.
gas:
* config/tc-sh.c ("elf/sh.h"): Include.
(sh_dsp, valid_arch, reg_x, reg_y, reg_efg): New static variables.
(md.begin): Initialize target_arch.
Only include opcodes in has table that match selected architecture.
(parse_reg): Recognize register names for sh-dsp.
(parse_at): Recognize post-modify addressing.
(get_operands): The leading space is now optional.
(get_specific): Remove FDREG_N support. Add support for sh-dsp
arguments. Update valid_arch.
(build_Mytes): Add support for SDT_REG_N.
(find_cooked_opcode): New function, broken out of md_assemble.
(assemble_ppi, sh_elf_final_processing): New functions.
(md_assemble): Use find_cooked_opcode and assemble_ppi.
(md_longopts, md_parse_option): New option: -dsp.
* config/tc-sh.h (elf_tc_final_processing): Define.
(sh_elf_final_processing): Declare.
include/elf:
* sh.h: (EF_SH_MACH_MASK, EF_SH_UNKNOWN, EF_SH1, EF_SH2): New macros.
(EF_SH3, EF_SH_HAS_DSP, EF_SH_DSP, EF_SH3_DSP): Likewise.
(EF_SH_HAS_FP, EF_SH3E, EF_SH4, EF_SH_MERGE_MACH): Likewise.
opcodes:
* sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
(print_insn_ppi): Likewise.
(print_insn_shx): Use info->mach to select appropriate insn set.
Add support for sh-dsp. Remove FD_REG_N support.
* sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
(sh_arg_type): Likewise. Remove FD_REG_N.
(sh_dsp_reg_nums): New enum.
(arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
(arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
(arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
(arch_sh3_dsp_up): Likewise.
(sh_opcode_info): New field: arch.
(sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
D_REG_N. Fill in arch field. Add sh-dsp insns.
Ben Elliston
DJ Delorie
Nick Clifton
H.J. Lu
Nathan Sidwell
Alexandre Oliva
Paul Brook
Richard Earnshaw
John David Anglin
Jim Blandy
Jan Beulich
Aldy Hernandez
Richard Henderson
Zack Weinberg
Alan Modra
Daniel Jacobowitz
Mark Mitchell
Maciej W. Rozycki
Richard Sandiford
Ian Lance Taylor
Hans-Peter Nilsson
Eric Christopher
Chris Demetriou
Joern Rennecke
Roland McGrath
Mark Kettenis
Corinna Vinschen
Dave Brolley
Martin Schwidefsky
Andreas Jaeger
Michael Snyder
Stan Cox
Stephane Carrez
Kaz Kojima
Jason Thorpe
Elena Zannoni
Geoffrey Keating
Jeff Holcomb
Jeff Law
Per Bothner
Phil Blundell
Jim Wilson
Doug Evans
Ulrich Drepper
Andreas Schwab