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Add support for msp430.

This commit is contained in:
Nick Clifton 2002-12-30 19:25:12 +00:00
parent df73991943
commit 9f3255cee6
7 changed files with 187 additions and 0 deletions
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4
include/ChangeLog
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@ -1,3 +1,7 @@
2002-12-24 Dmitry Diky <diwil@mail.ru>
* dis-asm.h: Add msp430 disassembler prototype.
2002-12-27 Chris Demetriou <cgd@broadcom.com>
* dis-asm.h (print_mips_disassembler_options): Prototype.

1
include/dis-asm.h
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@ -217,6 +217,7 @@ extern int print_insn_mcore PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_mmix PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_mn10200 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_mn10300 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_msp430 PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_ns32k PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_openrisc PARAMS ((bfd_vma, disassemble_info*));
extern int print_insn_big_or32 PARAMS ((bfd_vma, disassemble_info*));

5
include/elf/ChangeLog
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@ -1,3 +1,8 @@
2002-12-24 Dmitry Diky <diwil@mail.ru>
* common.h: Define msp430 machine numbers.
* msp430.h: New file. Define msp430 relocs.
2002-12-20 DJ Delorie <dj@redhat.com>
* xstormy16.h: Add XSTORMY16_12.

7
include/elf/common.h
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@ -251,6 +251,13 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
/* Ubicom IP2xxx; no ABI */
#define EM_IP2K_OLD 0x8217
/* MSP430 magic number
Written in the absense everything. */
#define EM_MSP430_OLD 0x1059
/* TI msp430 micro controller. */
#define EM_MSP430 0x430
/* See the above comment before you add a new EM_* value here. */
/* Values for e_version. */

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include/elf/msp430.h Normal file
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@ -0,0 +1,55 @@
/* MSP430 ELF support for BFD.
Copyright (C) 2002 Free Software Foundation, Inc.
Contributed by Dmitry Diky <diwil@mail.ru>
This file is part of BFD, the Binary File Descriptor library.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software Foundation, Inc.,
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#ifndef _ELF_MSP430_H
#define _ELF_MSP430_H
#include "elf/reloc-macros.h"
/* Processor specific flags for the ELF header e_flags field. */
#define EF_MSP430_MACH 0xff
#define E_MSP430_MACH_MSP430x11x1 110
#define E_MSP430_MACH_MSP430x11 11
#define E_MSP430_MACH_MSP430x12 12
#define E_MSP430_MACH_MSP430x13 13
#define E_MSP430_MACH_MSP430x14 14
#define E_MSP430_MACH_MSP430x31 31
#define E_MSP430_MACH_MSP430x32 32
#define E_MSP430_MACH_MSP430x33 33
#define E_MSP430_MACH_MSP430x41 41
#define E_MSP430_MACH_MSP430x43 43
#define E_MSP430_MACH_MSP430x44 44
#define E_MSP430_MACH_MSP430x15 15
#define E_MSP430_MACH_MSP430x16 16
/* Relocations. */
START_RELOC_NUMBERS (elf_msp430_reloc_type)
RELOC_NUMBER (R_MSP430_NONE, 0)
RELOC_NUMBER (R_MSP430_32, 1)
RELOC_NUMBER (R_MSP430_10_PCREL, 2)
RELOC_NUMBER (R_MSP430_16, 3)
RELOC_NUMBER (R_MSP430_16_PCREL, 4)
RELOC_NUMBER (R_MSP430_16_BYTE, 5)
RELOC_NUMBER (R_MSP430_16_PCREL_BYTE, 6)
END_RELOC_NUMBERS (R_MSP430_max)
#endif /* _ELF_MSP430_H */

4
include/opcode/ChangeLog
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@ -1,3 +1,7 @@
2002-12-24 Dmitry Diky <diwil@mail.ru>
* msp430.h: New file. Defines msp430 opcodes.
2002-12-30 D.Venkatasubramanian <dvenkat@noida.hcltech.com>
* h8300.h: Added some more pseudo opcodes for system call

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include/opcode/msp430.h Normal file
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/* Opcode table for the TI MSP430 microcontrollers
Copyright 2002 Free Software Foundation, Inc.
Contributed by Dmitry Diky <diwil@mail.ru>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2, or (at your option)
any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#ifndef __MSP430_H_
#define __MSP430_H_
struct msp430_operand_s
{
int ol; /* Operand length words. */
int am; /* Addr mode. */
int reg; /* Register. */
int mode; /* Pperand mode. */
#define OP_REG 0
#define OP_EXP 1
#ifndef DASM_SECTION
expressionS exp;
#endif
};
#define BYTE_OPERATION (1 << 6) /* Byte operation flag for all instructions. */
struct msp430_opcode_s
{
char *name;
int fmt;
int insn_opnumb;
int bin_opcode;
int bin_mask;
};
#define MSP_INSN(name, size, numb, bin, mask) { #name, size, numb, bin, mask }
static struct msp430_opcode_s msp430_opcodes[] =
{
MSP_INSN (and, 1, 2, 0xf000, 0xf000),
MSP_INSN (inv, 0, 1, 0xe330, 0xfff0),
MSP_INSN (xor, 1, 2, 0xe000, 0xf000),
MSP_INSN (setz, 0, 0, 0xd322, 0xffff),
MSP_INSN (setc, 0, 0, 0xd312, 0xffff),
MSP_INSN (eint, 0, 0, 0xd232, 0xffff),
MSP_INSN (setn, 0, 0, 0xd222, 0xffff),
MSP_INSN (bis, 1, 2, 0xd000, 0xf000),
MSP_INSN (clrz, 0, 0, 0xc322, 0xffff),
MSP_INSN (clrc, 0, 0, 0xc312, 0xffff),
MSP_INSN (dint, 0, 0, 0xc232, 0xffff),
MSP_INSN (clrn, 0, 0, 0xc222, 0xffff),
MSP_INSN (bic, 1, 2, 0xc000, 0xf000),
MSP_INSN (bit, 1, 2, 0xb000, 0xf000),
MSP_INSN (dadc, 0, 1, 0xa300, 0xff30),
MSP_INSN (dadd, 1, 2, 0xa000, 0xf000),
MSP_INSN (tst, 0, 1, 0x9300, 0xff30),
MSP_INSN (cmp, 1, 2, 0x9000, 0xf000),
MSP_INSN (decd, 0, 1, 0x8320, 0xff30),
MSP_INSN (dec, 0, 1, 0x8310, 0xff30),
MSP_INSN (sub, 1, 2, 0x8000, 0xf000),
MSP_INSN (sbc, 0, 1, 0x7300, 0xff30),
MSP_INSN (subc, 1, 2, 0x7000, 0xf000),
MSP_INSN (adc, 0, 1, 0x6300, 0xff30),
MSP_INSN (rlc, 0, 2, 0x6000, 0xf000),
MSP_INSN (addc, 1, 2, 0x6000, 0xf000),
MSP_INSN (incd, 0, 1, 0x5320, 0xff30),
MSP_INSN (inc, 0, 1, 0x5310, 0xff30),
MSP_INSN (rla, 0, 2, 0x5000, 0xf000),
MSP_INSN (add, 1, 2, 0x5000, 0xf000),
MSP_INSN (nop, 0, 0, 0x4303, 0xffff),
MSP_INSN (clr, 0, 1, 0x4300, 0xff30),
MSP_INSN (ret, 0, 0, 0x4130, 0xff30),
MSP_INSN (pop, 0, 1, 0x4130, 0xff30),
MSP_INSN (br, 0, 3, 0x4000, 0xf000),
MSP_INSN (mov, 1, 2, 0x4000, 0xf000),
MSP_INSN (jmp, 3, 1, 0x3c00, 0xfc00),
MSP_INSN (jl, 3, 1, 0x3800, 0xfc00),
MSP_INSN (jge, 3, 1, 0x3400, 0xfc00),
MSP_INSN (jn, 3, 1, 0x3000, 0xfc00),
MSP_INSN (jc, 3, 1, 0x2c00, 0xfc00),
MSP_INSN (jhs, 3, 1, 0x2c00, 0xfc00),
MSP_INSN (jnc, 3, 1, 0x2800, 0xfc00),
MSP_INSN (jlo, 3, 1, 0x2800, 0xfc00),
MSP_INSN (jz, 3, 1, 0x2400, 0xfc00),
MSP_INSN (jeq, 3, 1, 0x2400, 0xfc00),
MSP_INSN (jnz, 3, 1, 0x2000, 0xfc00),
MSP_INSN (jne, 3, 1, 0x2000, 0xfc00),
MSP_INSN (reti, 2, 0, 0x1300, 0xffc0),
MSP_INSN (call, 2, 1, 0x1280, 0xffc0),
MSP_INSN (push, 2, 1, 0x1200, 0xff80),
MSP_INSN (sxt, 2, 1, 0x1180, 0xffc0),
MSP_INSN (rra, 2, 1, 0x1100, 0xff80),
MSP_INSN (swpb, 2, 1, 0x1080, 0xffc0),
MSP_INSN (rrc, 2, 1, 0x1000, 0xff80),
/* End of instruction set. */
{ NULL, 0, 0, 0, 0 }
};
#endif