mirror of
https://gitlab.com/octospacc/MultiSpaccSDK
synced 2025-06-05 22:09:21 +02:00
Add web build, unify screen update and frame wait function, update CI
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@ -8,34 +8,28 @@ MEMORY {
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ZP: start = $00, size = $100, type = rw, define = yes;
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# INES Cartridge Header
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HEADER: start = $0, size = $10, file = %O ,fill = yes;
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HEADER: start = $0, size = $10, file = %O, fill = yes;
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# 2 16K ROM Banks
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# - startup
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# - code
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# - rodata
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# - data (load)
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PRG: start = $8000, size = $7f00, file = %O ,fill = yes, define = yes;
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PRG: start = $8000, size = $7f00, file = %O, fill = yes, define = yes;
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# DPCM Samples at end of the ROM
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DMC: start = $ff00, size = $fa, file = %O, fill = yes;
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# Hardware Vectors at end of the ROM
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VECTORS: start = $fffa, size = $6, file = %O, fill = yes;
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# 1 8K CHR Bank
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CHR: start = $0000, size = $2000, file = %O, fill = yes;
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# standard 2K SRAM (-zeropage)
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# $0100 famitone, palette, cpu stack
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# $0200 oam buffer
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# $0300..$800 ca65 stack
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RAM: start = $0300, size = $0500, define = yes;
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# Use this definition instead if you going to use extra 8K RAM
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@ -43,20 +37,20 @@ MEMORY {
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}
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SEGMENTS {
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HEADER: load = HEADER, type = ro;
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STARTUP: load = PRG, type = ro, define = yes;
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LOWCODE: load = PRG, type = ro, optional = yes;
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ONCE: load = PRG, type = ro, optional = yes;
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INIT: load = PRG, type = ro, define = yes, optional = yes;
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CODE: load = PRG, type = ro, define = yes;
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RODATA: load = PRG, type = ro, define = yes;
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DATA: load = PRG, run = RAM, type = rw, define = yes;
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VECTORS: load = VECTORS, type = rw;
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SAMPLES: load = DMC, type = rw;
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CHARS: load = CHR, type = rw;
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BSS: load = RAM, type = bss, define = yes;
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HEAP: load = RAM, type = bss, optional = yes;
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ZEROPAGE: load = ZP, type = zp;
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HEADER: load = HEADER, type = ro;
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STARTUP: load = PRG, type = ro, define = yes;
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LOWCODE: load = PRG, type = ro, optional = yes;
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ONCE: load = PRG, type = ro, optional = yes;
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INIT: load = PRG, type = ro, define = yes, optional = yes;
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CODE: load = PRG, type = ro, define = yes;
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RODATA: load = PRG, type = ro, define = yes;
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DATA: load = PRG, run = RAM, type = rw, define = yes;
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VECTORS: load = VECTORS, type = rw;
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SAMPLES: load = DMC, type = rw;
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CHARS: load = CHR, type = rw;
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BSS: load = RAM, type = bss, define = yes;
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HEAP: load = RAM, type = bss, optional = yes;
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ZEROPAGE: load = ZP, type = zp;
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}
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FEATURES {
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