Pica: Implement vertex loading.
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@ -4,6 +4,7 @@
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#include "pica.h"
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#include "command_processor.h"
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#include "math.h"
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namespace Pica {
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@ -17,7 +18,85 @@ static inline void WritePicaReg(u32 id, u32 value) {
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registers[id] = value;
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switch(id) {
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// TODO: Perform actions for anything which requires special treatment here...
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// It seems like these trigger vertex rendering
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case PICA_REG_INDEX(trigger_draw):
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case PICA_REG_INDEX(trigger_draw_indexed):
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{
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const auto& attribute_config = registers.vertex_attributes;
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const u8* const base_address = Memory::GetPointer(attribute_config.GetBaseAddress());
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// Information about internal vertex attributes
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const u8* vertex_attribute_sources[16];
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u32 vertex_attribute_strides[16];
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u32 vertex_attribute_formats[16];
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u32 vertex_attribute_elements[16];
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u32 vertex_attribute_element_size[16];
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// Setup attribute data from loaders
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for (int loader = 0; loader < 12; ++loader) {
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const auto& loader_config = attribute_config.attribute_loaders[loader];
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const u8* load_address = base_address + loader_config.data_offset;
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// TODO: What happens if a loader overwrites a previous one's data?
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for (int component = 0; component < loader_config.component_count; ++component) {
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u32 attribute_index = loader_config.GetComponent(component);
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vertex_attribute_sources[attribute_index] = load_address;
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vertex_attribute_strides[attribute_index] = loader_config.byte_count;
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vertex_attribute_formats[attribute_index] = (u32)attribute_config.GetFormat(attribute_index);
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vertex_attribute_elements[attribute_index] = attribute_config.GetNumElements(attribute_index);
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vertex_attribute_element_size[attribute_index] = attribute_config.GetElementSizeInBytes(attribute_index);
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load_address += attribute_config.GetStride(attribute_index);
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}
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}
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// Load vertices
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bool is_indexed = (id == PICA_REG_INDEX(trigger_draw_indexed));
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const auto& index_info = registers.index_array;
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const u8* index_address_8 = (u8*)base_address + index_info.offset;
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const u16* index_address_16 = (u16*)index_address_8;
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bool index_u16 = (bool)index_info.format;
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for (int index = 0; index < registers.num_vertices; ++index)
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{
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int vertex = is_indexed ? (index_u16 ? index_address_16[index] : index_address_8[index]) : index;
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if (is_indexed) {
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// TODO: Implement some sort of vertex cache!
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}
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// Initialize data for the current vertex
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struct {
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Math::Vec4<float24> attr[16];
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} input;
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for (int i = 0; i < attribute_config.GetNumTotalAttributes(); ++i) {
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for (int comp = 0; comp < vertex_attribute_elements[i]; ++comp) {
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const u8* srcdata = vertex_attribute_sources[i] + vertex_attribute_strides[i] * vertex + comp * vertex_attribute_element_size[i];
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const float srcval = (vertex_attribute_formats[i] == 0) ? *(s8*)srcdata :
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(vertex_attribute_formats[i] == 1) ? *(u8*)srcdata :
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(vertex_attribute_formats[i] == 2) ? *(s16*)srcdata :
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*(float*)srcdata;
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input.attr[i][comp] = float24::FromFloat32(srcval);
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DEBUG_LOG(GPU, "Loaded component %x of attribute %x for vertex %x (index %x) from 0x%08x + 0x%08x + 0x%04x: %f",
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comp, i, vertex, index,
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attribute_config.GetBaseAddress(),
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vertex_attribute_sources[i] - base_address,
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srcdata - vertex_attribute_sources[i],
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input.attr[i][comp].ToFloat32());
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}
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}
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// TODO: Run vertex data through vertex shader
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if (is_indexed) {
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// TODO: Add processed vertex to vertex cache!
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}
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// TODO: Submit vertex to primitive assembly
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}
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break;
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}
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default:
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break;
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@ -64,7 +64,7 @@ struct Regs {
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inline u32 GetBaseAddress() const {
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// TODO: Ugly, should fix PhysicalToVirtualAddress instead
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return (base_address * 8) - Memory::FCRAM_PADDR + Memory::HEAP_GSP_VADDR;
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return DecodeAddressRegister(base_address) - Memory::FCRAM_PADDR + Memory::HEAP_GSP_VADDR;
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}
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// Descriptor for internal vertex attributes
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@ -110,12 +110,12 @@ struct Regs {
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}
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inline int GetNumElements(int n) const {
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int sizes[] = {
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u64 sizes[] = {
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size0, size1, size2, size3,
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size4, size5, size6, size7,
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size8, size9, size10, size11
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};
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return sizes[n]+1;
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return (int)sizes[n]+1;
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}
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inline int GetElementSizeInBytes(int n) const {
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@ -128,7 +128,7 @@ struct Regs {
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}
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inline int GetNumTotalAttributes() const {
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return num_extra_attributes+1;
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return (int)num_extra_attributes+1;
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}
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// Attribute loaders map the source vertex data to input attributes
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@ -158,12 +158,12 @@ struct Regs {
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};
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inline int GetComponent(int n) const {
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int components[] = {
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u64 components[] = {
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comp0, comp1, comp2, comp3,
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comp4, comp5, comp6, comp7,
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comp8, comp9, comp10, comp11
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};
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return components[n];
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return (int)components[n];
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}
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} attribute_loaders[12];
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} vertex_attributes;
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@ -180,7 +180,16 @@ struct Regs {
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};
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} index_array;
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INSERT_PADDING_WORDS(0xd8);
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// Number of vertices to render
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u32 num_vertices;
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INSERT_PADDING_WORDS(0x5);
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// These two trigger rendering of triangles
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u32 trigger_draw;
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u32 trigger_draw_indexed;
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INSERT_PADDING_WORDS(0xd0);
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#undef INSERT_PADDING_WORDS_HELPER1
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#undef INSERT_PADDING_WORDS_HELPER2
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@ -207,6 +216,9 @@ struct Regs {
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ADD_FIELD(viewport_size_y);
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ADD_FIELD(vertex_attributes);
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ADD_FIELD(index_array);
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ADD_FIELD(num_vertices);
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ADD_FIELD(trigger_draw);
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ADD_FIELD(trigger_draw_indexed);
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#undef ADD_FIELD
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#endif // _MSC_VER
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@ -249,6 +261,9 @@ ASSERT_REG_POSITION(viewport_size_x, 0x41);
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ASSERT_REG_POSITION(viewport_size_y, 0x43);
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ASSERT_REG_POSITION(vertex_attributes, 0x200);
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ASSERT_REG_POSITION(index_array, 0x227);
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ASSERT_REG_POSITION(num_vertices, 0x228);
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ASSERT_REG_POSITION(trigger_draw, 0x22e);
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ASSERT_REG_POSITION(trigger_draw_indexed, 0x22f);
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#undef ASSERT_REG_POSITION
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#endif // !defined(_MSC_VER)
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