Android 270

README.md

@@ -2,12 +2,11 @@
 |----|----|----|----|----|
 | [12461](https://github.com/yuzu-emu/yuzu//pull/12461) | [`a84e8e26f`](https://github.com/yuzu-emu/yuzu//pull/12461/files) | Rework Nvdec and VIC to fix out-of-order videos, and speed up decoding. | [Kelebek1](https://github.com/Kelebek1/) | Yes |
 | [12749](https://github.com/yuzu-emu/yuzu//pull/12749) | [`aad4b0d6f`](https://github.com/yuzu-emu/yuzu//pull/12749/files) | general: workarounds for SMMU syncing issues | [liamwhite](https://github.com/liamwhite/) | Yes |
-| [13018](https://github.com/yuzu-emu/yuzu//pull/13018) | [`01cbc638a`](https://github.com/yuzu-emu/yuzu//pull/13018/files) | am: rewrite part 2 | [liamwhite](https://github.com/liamwhite/) | Yes |
+| [13018](https://github.com/yuzu-emu/yuzu//pull/13018) | [`fffec12d3`](https://github.com/yuzu-emu/yuzu//pull/13018/files) | am: rewrite part 2 | [liamwhite](https://github.com/liamwhite/) | Yes |
 | [13096](https://github.com/yuzu-emu/yuzu//pull/13096) | [`0a8759057`](https://github.com/yuzu-emu/yuzu//pull/13096/files) | texture_cache: use two-pass collection for costly load resources | [liamwhite](https://github.com/liamwhite/) | Yes |
 | [13122](https://github.com/yuzu-emu/yuzu//pull/13122) | [`5dc08c7fe`](https://github.com/yuzu-emu/yuzu//pull/13122/files) | vk_rasterizer: flip scissor y on lower left origin mode | [liamwhite](https://github.com/liamwhite/) | Yes |
 | [13135](https://github.com/yuzu-emu/yuzu//pull/13135) | [`fc6a87bba`](https://github.com/yuzu-emu/yuzu//pull/13135/files) | service: hid: Migrate HidServer to new IPC | [german77](https://github.com/german77/) | Yes |
-| [13166](https://github.com/yuzu-emu/yuzu//pull/13166) | [`4eecad914`](https://github.com/yuzu-emu/yuzu//pull/13166/files) | buffer_cache: avoid overflow in usage tracker | [liamwhite](https://github.com/liamwhite/) | Yes |
-| [13171](https://github.com/yuzu-emu/yuzu//pull/13171) | [`fd9ed54f2`](https://github.com/yuzu-emu/yuzu//pull/13171/files) | texture_cache: do not track invalid addresses | [liamwhite](https://github.com/liamwhite/) | Yes |
+| [13159](https://github.com/yuzu-emu/yuzu//pull/13159) | [`dc50b95a4`](https://github.com/yuzu-emu/yuzu//pull/13159/files) | core: enable error applet, add stubs for web applet | [liamwhite](https://github.com/liamwhite/) | Yes |
 
 
 End of merge log. You can find the original README.md below the break.

src/common/settings.h

@@ -435,6 +435,8 @@ struct Values {
         linkage, false, "disable_shader_loop_safety_checks", Category::RendererDebug};
     Setting<bool> enable_renderdoc_hotkey{linkage, false, "renderdoc_hotkey",
                                           Category::RendererDebug};
+    // TODO: remove this once AMDVLK supports VK_EXT_depth_bias_control
+    bool renderer_amdvlk_depth_bias_workaround{};
     Setting<bool> disable_buffer_reorder{linkage, false, "disable_buffer_reorder",
                                          Category::RendererDebug};
 

src/core/core.cpp

@@ -394,6 +394,11 @@ struct System::Impl {
             room_member->SendGameInfo(game_info);
         }
 
+        // Workarounds:
+        // Activate this in Super Smash Brothers Ultimate, it only affects AMD cards using AMDVLK
+        Settings::values.renderer_amdvlk_depth_bias_workaround =
+            params.program_id == 0x1006A800016E000ULL;
+
         status = SystemResultStatus::Success;
         return status;
     }
@@ -452,6 +457,9 @@ struct System::Impl {
             room_member->SendGameInfo(game_info);
         }
 
+        // Workarounds
+        Settings::values.renderer_amdvlk_depth_bias_workaround = false;
+
         // Reset all glue registrations
         arp_manager.ResetAll();
 

src/core/hle/service/nvdrv/devices/nvhost_gpu.cpp

@@ -5,7 +5,6 @@
 #include "common/assert.h"
 #include "common/logging/log.h"
 #include "core/core.h"
-#include "core/hle/kernel/k_process.h"
 #include "core/hle/service/nvdrv/core/container.h"
 #include "core/hle/service/nvdrv/core/nvmap.h"
 #include "core/hle/service/nvdrv/core/syncpoint_manager.h"
@@ -76,7 +75,7 @@ NvResult nvhost_gpu::Ioctl1(DeviceFD fd, Ioctl command, std::span<const u8> inpu
         case 0xd:
             return WrapFixed(this, &nvhost_gpu::SetChannelPriority, input, output);
         case 0x1a:
-            return WrapFixed(this, &nvhost_gpu::AllocGPFIFOEx2, input, output, fd);
+            return WrapFixed(this, &nvhost_gpu::AllocGPFIFOEx2, input, output);
         case 0x1b:
             return WrapFixedVariable(this, &nvhost_gpu::SubmitGPFIFOBase1, input, output, true);
         case 0x1d:
@@ -121,13 +120,8 @@ NvResult nvhost_gpu::Ioctl3(DeviceFD fd, Ioctl command, std::span<const u8> inpu
     return NvResult::NotImplemented;
 }
 
-void nvhost_gpu::OnOpen(NvCore::SessionId session_id, DeviceFD fd) {
-    sessions[fd] = session_id;
-}
-
-void nvhost_gpu::OnClose(DeviceFD fd) {
-    sessions.erase(fd);
-}
+void nvhost_gpu::OnOpen(NvCore::SessionId session_id, DeviceFD fd) {}
+void nvhost_gpu::OnClose(DeviceFD fd) {}
 
 NvResult nvhost_gpu::SetNVMAPfd(IoctlSetNvmapFD& params) {
     LOG_DEBUG(Service_NVDRV, "called, fd={}", params.nvmap_fd);
@@ -167,7 +161,7 @@ NvResult nvhost_gpu::SetChannelPriority(IoctlChannelSetPriority& params) {
     return NvResult::Success;
 }
 
-NvResult nvhost_gpu::AllocGPFIFOEx2(IoctlAllocGpfifoEx2& params, DeviceFD fd) {
+NvResult nvhost_gpu::AllocGPFIFOEx2(IoctlAllocGpfifoEx2& params) {
     LOG_WARNING(Service_NVDRV,
                 "(STUBBED) called, num_entries={:X}, flags={:X}, unk0={:X}, "
                 "unk1={:X}, unk2={:X}, unk3={:X}",
@@ -179,12 +173,7 @@ NvResult nvhost_gpu::AllocGPFIFOEx2(IoctlAllocGpfifoEx2& params, DeviceFD fd) {
         return NvResult::AlreadyAllocated;
     }
 
-    u64 program_id{};
-    if (auto* const session = core.GetSession(sessions[fd]); session != nullptr) {
-        program_id = session->process->GetProgramId();
-    }
-
-    system.GPU().InitChannel(*channel_state, program_id);
+    system.GPU().InitChannel(*channel_state);
 
     params.fence_out = syncpoint_manager.GetSyncpointFence(channel_syncpoint);
 

src/core/hle/service/nvdrv/devices/nvhost_gpu.h

@@ -192,7 +192,7 @@ private:
     NvResult ZCullBind(IoctlZCullBind& params);
     NvResult SetErrorNotifier(IoctlSetErrorNotifier& params);
     NvResult SetChannelPriority(IoctlChannelSetPriority& params);
-    NvResult AllocGPFIFOEx2(IoctlAllocGpfifoEx2& params, DeviceFD fd);
+    NvResult AllocGPFIFOEx2(IoctlAllocGpfifoEx2& params);
     NvResult AllocateObjectContext(IoctlAllocObjCtx& params);
 
     NvResult SubmitGPFIFOImpl(IoctlSubmitGpfifo& params, Tegra::CommandList&& entries);
@@ -210,7 +210,6 @@ private:
     NvCore::SyncpointManager& syncpoint_manager;
     NvCore::NvMap& nvmap;
     std::shared_ptr<Tegra::Control::ChannelState> channel_state;
-    std::unordered_map<DeviceFD, NvCore::SessionId> sessions;
     u32 channel_syncpoint;
     std::mutex channel_mutex;
 

src/video_core/buffer_cache/usage_tracker.h

@@ -26,9 +26,6 @@ public:
     void Track(u64 offset, u64 size) noexcept {
         const size_t page = offset >> PAGE_SHIFT;
         const size_t page_end = (offset + size) >> PAGE_SHIFT;
-        if (page_end < page || page_end >= pages.size()) {
-            return;
-        }
         TrackPage(page, offset, size);
         if (page == page_end) {
             return;
@@ -44,9 +41,6 @@ public:
     [[nodiscard]] bool IsUsed(u64 offset, u64 size) const noexcept {
         const size_t page = offset >> PAGE_SHIFT;
         const size_t page_end = (offset + size) >> PAGE_SHIFT;
-        if (page_end < page || page_end >= pages.size()) {
-            return false;
-        }
         if (IsPageUsed(page, offset, size)) {
             return true;
         }

src/video_core/control/channel_state.cpp

@@ -16,9 +16,8 @@ namespace Tegra::Control {
 
 ChannelState::ChannelState(s32 bind_id_) : bind_id{bind_id_}, initialized{} {}
 
-void ChannelState::Init(Core::System& system, GPU& gpu, u64 program_id_) {
+void ChannelState::Init(Core::System& system, GPU& gpu) {
     ASSERT(memory_manager);
-    program_id = program_id_;
     dma_pusher = std::make_unique<Tegra::DmaPusher>(system, gpu, *memory_manager, *this);
     maxwell_3d = std::make_unique<Engines::Maxwell3D>(system, *memory_manager);
     fermi_2d = std::make_unique<Engines::Fermi2D>(*memory_manager);

src/video_core/control/channel_state.h

@@ -40,12 +40,11 @@ struct ChannelState {
     ChannelState(ChannelState&& other) noexcept = default;
     ChannelState& operator=(ChannelState&& other) noexcept = default;
 
-    void Init(Core::System& system, GPU& gpu, u64 program_id);
+    void Init(Core::System& system, GPU& gpu);
 
     void BindRasterizer(VideoCore::RasterizerInterface* rasterizer);
 
     s32 bind_id = -1;
-    u64 program_id = 0;
     /// 3D engine
     std::unique_ptr<Engines::Maxwell3D> maxwell_3d;
     /// 2D engine

src/video_core/control/channel_state_cache.cpp

@@ -7,7 +7,7 @@ namespace VideoCommon {
 
 ChannelInfo::ChannelInfo(Tegra::Control::ChannelState& channel_state)
     : maxwell3d{*channel_state.maxwell_3d}, kepler_compute{*channel_state.kepler_compute},
-      gpu_memory{*channel_state.memory_manager}, program_id{channel_state.program_id} {}
+      gpu_memory{*channel_state.memory_manager} {}
 
 template class VideoCommon::ChannelSetupCaches<VideoCommon::ChannelInfo>;
 

src/video_core/control/channel_state_cache.h

@@ -39,7 +39,6 @@ public:
     Tegra::Engines::Maxwell3D& maxwell3d;
     Tegra::Engines::KeplerCompute& kepler_compute;
     Tegra::MemoryManager& gpu_memory;
-    u64 program_id;
 };
 
 template <class P>
@@ -78,10 +77,9 @@ protected:
     P* channel_state;
     size_t current_channel_id{UNSET_CHANNEL};
     size_t current_address_space{};
-    Tegra::Engines::Maxwell3D* maxwell3d{};
-    Tegra::Engines::KeplerCompute* kepler_compute{};
-    Tegra::MemoryManager* gpu_memory{};
-    u64 program_id{};
+    Tegra::Engines::Maxwell3D* maxwell3d;
+    Tegra::Engines::KeplerCompute* kepler_compute;
+    Tegra::MemoryManager* gpu_memory;
 
     std::deque<P> channel_storage;
     std::deque<size_t> free_channel_ids;

src/video_core/control/channel_state_cache.inc

@@ -58,7 +58,6 @@ void ChannelSetupCaches<P>::BindToChannel(s32 id) {
     maxwell3d = &channel_state->maxwell3d;
     kepler_compute = &channel_state->kepler_compute;
     gpu_memory = &channel_state->gpu_memory;
-    program_id = channel_state->program_id;
     current_address_space = gpu_memory->GetID();
 }
 
@@ -77,7 +76,6 @@ void ChannelSetupCaches<P>::EraseChannel(s32 id) {
         maxwell3d = nullptr;
         kepler_compute = nullptr;
         gpu_memory = nullptr;
-        program_id = 0;
     } else if (current_channel_id != UNSET_CHANNEL) {
         channel_state = &channel_storage[current_channel_id];
     }

src/video_core/gpu.cpp

@@ -67,8 +67,8 @@ struct GPU::Impl {
         return CreateChannel(new_channel_id++);
     }
 
-    void InitChannel(Control::ChannelState& to_init, u64 program_id) {
-        to_init.Init(system, gpu, program_id);
+    void InitChannel(Control::ChannelState& to_init) {
+        to_init.Init(system, gpu);
         to_init.BindRasterizer(rasterizer);
         rasterizer->InitializeChannel(to_init);
     }
@@ -387,8 +387,8 @@ std::shared_ptr<Control::ChannelState> GPU::AllocateChannel() {
     return impl->AllocateChannel();
 }
 
-void GPU::InitChannel(Control::ChannelState& to_init, u64 program_id) {
-    impl->InitChannel(to_init, program_id);
+void GPU::InitChannel(Control::ChannelState& to_init) {
+    impl->InitChannel(to_init);
 }
 
 void GPU::BindChannel(s32 channel_id) {

src/video_core/gpu.h

@@ -149,7 +149,7 @@ public:
 
     std::shared_ptr<Control::ChannelState> AllocateChannel();
 
-    void InitChannel(Control::ChannelState& to_init, u64 program_id);
+    void InitChannel(Control::ChannelState& to_init);
 
     void BindChannel(s32 channel_id);
 

src/video_core/renderer_opengl/gl_shader_cache.cpp

@@ -215,7 +215,6 @@ ShaderCache::ShaderCache(Tegra::MaxwellDeviceMemoryManager& device_memory_,
           .support_gl_variable_aoffi = device.HasVariableAoffi(),
           .support_gl_sparse_textures = device.HasSparseTexture2(),
           .support_gl_derivative_control = device.HasDerivativeControl(),
-          .support_geometry_streams = true,
 
           .warp_size_potentially_larger_than_guest = device.IsWarpSizePotentiallyLargerThanGuest(),
 

src/video_core/renderer_vulkan/vk_rasterizer.cpp

@@ -1082,16 +1082,37 @@ void RasterizerVulkan::UpdateDepthBias(Tegra::Engines::Maxwell3D::Regs& regs) {
                         regs.zeta.format == Tegra::DepthFormat::X8Z24_UNORM ||
                         regs.zeta.format == Tegra::DepthFormat::S8Z24_UNORM ||
                         regs.zeta.format == Tegra::DepthFormat::V8Z24_UNORM;
-    if (is_d24 && !device.SupportsD24DepthBuffer() && program_id == 0x1006A800016E000ULL) {
-        // Only activate this in Super Smash Brothers Ultimate
+    bool force_unorm = ([&] {
+        if (!is_d24 || device.SupportsD24DepthBuffer()) {
+            return false;
+        }
+        if (device.IsExtDepthBiasControlSupported()) {
+            return true;
+        }
+        if (!Settings::values.renderer_amdvlk_depth_bias_workaround) {
+            return false;
+        }
         // the base formulas can be obtained from here:
         //   https://docs.microsoft.com/en-us/windows/win32/direct3d11/d3d10-graphics-programming-guide-output-merger-stage-depth-bias
         const double rescale_factor =
             static_cast<double>(1ULL << (32 - 24)) / (static_cast<double>(0x1.ep+127));
         units = static_cast<float>(static_cast<double>(units) * rescale_factor);
-    }
+        return false;
+    })();
     scheduler.Record([constant = units, clamp = regs.depth_bias_clamp,
-                      factor = regs.slope_scale_depth_bias](vk::CommandBuffer cmdbuf) {
+                      factor = regs.slope_scale_depth_bias, force_unorm,
+                      precise = device.HasExactDepthBiasControl()](vk::CommandBuffer cmdbuf) {
+        if (force_unorm) {
+            VkDepthBiasRepresentationInfoEXT info{
+                .sType = VK_STRUCTURE_TYPE_DEPTH_BIAS_REPRESENTATION_INFO_EXT,
+                .pNext = nullptr,
+                .depthBiasRepresentation =
+                    VK_DEPTH_BIAS_REPRESENTATION_LEAST_REPRESENTABLE_VALUE_FORCE_UNORM_EXT,
+                .depthBiasExact = precise ? VK_TRUE : VK_FALSE,
+            };
+            cmdbuf.SetDepthBias(constant, clamp, factor, &info);
+            return;
+        }
         cmdbuf.SetDepthBias(constant, clamp, factor);
     });
 }

src/video_core/texture_cache/texture_cache.h

@@ -2114,9 +2114,7 @@ void TextureCache<P>::TrackImage(ImageBase& image, ImageId image_id) {
     ASSERT(False(image.flags & ImageFlagBits::Tracked));
     image.flags |= ImageFlagBits::Tracked;
     if (False(image.flags & ImageFlagBits::Sparse)) {
-        if (image.cpu_addr < ~(1ULL << 40)) {
-            device_memory.UpdatePagesCachedCount(image.cpu_addr, image.guest_size_bytes, 1);
-        }
+        device_memory.UpdatePagesCachedCount(image.cpu_addr, image.guest_size_bytes, 1);
         return;
     }
     if (True(image.flags & ImageFlagBits::Registered)) {
@@ -2142,9 +2140,7 @@ void TextureCache<P>::UntrackImage(ImageBase& image, ImageId image_id) {
     ASSERT(True(image.flags & ImageFlagBits::Tracked));
     image.flags &= ~ImageFlagBits::Tracked;
     if (False(image.flags & ImageFlagBits::Sparse)) {
-        if (image.cpu_addr < ~(1ULL << 40)) {
-            device_memory.UpdatePagesCachedCount(image.cpu_addr, image.guest_size_bytes, -1);
-        }
+        device_memory.UpdatePagesCachedCount(image.cpu_addr, image.guest_size_bytes, -1);
         return;
     }
     ASSERT(True(image.flags & ImageFlagBits::Registered));