Compare commits
22 Commits
android-27
...
android-27
Author | SHA1 | Date | |
---|---|---|---|
dffc08bd15 | |||
597a1da426 | |||
4052ffb97b | |||
29fa1417fa | |||
54737ce166 | |||
cb64ec8b78 | |||
c4b57450a1 | |||
26c9d345a2 | |||
7375bf85b8 | |||
1bec420695 | |||
79edad2533 | |||
ce62fa6f7b | |||
a0e254e7c4 | |||
25c3bbba0e | |||
d66ca8b731 | |||
dc50b95a47 | |||
4050242cf3 | |||
fd718f350c | |||
f297e98a9e | |||
637c54e205 | |||
f045fa576b | |||
692ba0fa7d |
@ -2,11 +2,12 @@
|
|||||||
|----|----|----|----|----|
|
|----|----|----|----|----|
|
||||||
| [12461](https://github.com/yuzu-emu/yuzu//pull/12461) | [`a84e8e26f`](https://github.com/yuzu-emu/yuzu//pull/12461/files) | Rework Nvdec and VIC to fix out-of-order videos, and speed up decoding. | [Kelebek1](https://github.com/Kelebek1/) | Yes |
|
| [12461](https://github.com/yuzu-emu/yuzu//pull/12461) | [`a84e8e26f`](https://github.com/yuzu-emu/yuzu//pull/12461/files) | Rework Nvdec and VIC to fix out-of-order videos, and speed up decoding. | [Kelebek1](https://github.com/Kelebek1/) | Yes |
|
||||||
| [12749](https://github.com/yuzu-emu/yuzu//pull/12749) | [`aad4b0d6f`](https://github.com/yuzu-emu/yuzu//pull/12749/files) | general: workarounds for SMMU syncing issues | [liamwhite](https://github.com/liamwhite/) | Yes |
|
| [12749](https://github.com/yuzu-emu/yuzu//pull/12749) | [`aad4b0d6f`](https://github.com/yuzu-emu/yuzu//pull/12749/files) | general: workarounds for SMMU syncing issues | [liamwhite](https://github.com/liamwhite/) | Yes |
|
||||||
| [13018](https://github.com/yuzu-emu/yuzu//pull/13018) | [`fffec12d3`](https://github.com/yuzu-emu/yuzu//pull/13018/files) | am: rewrite part 2 | [liamwhite](https://github.com/liamwhite/) | Yes |
|
| [13018](https://github.com/yuzu-emu/yuzu//pull/13018) | [`01cbc638a`](https://github.com/yuzu-emu/yuzu//pull/13018/files) | am: rewrite part 2 | [liamwhite](https://github.com/liamwhite/) | Yes |
|
||||||
| [13096](https://github.com/yuzu-emu/yuzu//pull/13096) | [`0a8759057`](https://github.com/yuzu-emu/yuzu//pull/13096/files) | texture_cache: use two-pass collection for costly load resources | [liamwhite](https://github.com/liamwhite/) | Yes |
|
| [13096](https://github.com/yuzu-emu/yuzu//pull/13096) | [`0a8759057`](https://github.com/yuzu-emu/yuzu//pull/13096/files) | texture_cache: use two-pass collection for costly load resources | [liamwhite](https://github.com/liamwhite/) | Yes |
|
||||||
| [13122](https://github.com/yuzu-emu/yuzu//pull/13122) | [`5dc08c7fe`](https://github.com/yuzu-emu/yuzu//pull/13122/files) | vk_rasterizer: flip scissor y on lower left origin mode | [liamwhite](https://github.com/liamwhite/) | Yes |
|
| [13122](https://github.com/yuzu-emu/yuzu//pull/13122) | [`5dc08c7fe`](https://github.com/yuzu-emu/yuzu//pull/13122/files) | vk_rasterizer: flip scissor y on lower left origin mode | [liamwhite](https://github.com/liamwhite/) | Yes |
|
||||||
| [13135](https://github.com/yuzu-emu/yuzu//pull/13135) | [`fc6a87bba`](https://github.com/yuzu-emu/yuzu//pull/13135/files) | service: hid: Migrate HidServer to new IPC | [german77](https://github.com/german77/) | Yes |
|
| [13135](https://github.com/yuzu-emu/yuzu//pull/13135) | [`fc6a87bba`](https://github.com/yuzu-emu/yuzu//pull/13135/files) | service: hid: Migrate HidServer to new IPC | [german77](https://github.com/german77/) | Yes |
|
||||||
| [13159](https://github.com/yuzu-emu/yuzu//pull/13159) | [`dc50b95a4`](https://github.com/yuzu-emu/yuzu//pull/13159/files) | core: enable error applet, add stubs for web applet | [liamwhite](https://github.com/liamwhite/) | Yes |
|
| [13166](https://github.com/yuzu-emu/yuzu//pull/13166) | [`4eecad914`](https://github.com/yuzu-emu/yuzu//pull/13166/files) | buffer_cache: avoid overflow in usage tracker | [liamwhite](https://github.com/liamwhite/) | Yes |
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||||||
|
| [13171](https://github.com/yuzu-emu/yuzu//pull/13171) | [`fd9ed54f2`](https://github.com/yuzu-emu/yuzu//pull/13171/files) | texture_cache: do not track invalid addresses | [liamwhite](https://github.com/liamwhite/) | Yes |
|
||||||
|
|
||||||
|
|
||||||
End of merge log. You can find the original README.md below the break.
|
End of merge log. You can find the original README.md below the break.
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||||||
|
@ -435,8 +435,6 @@ struct Values {
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linkage, false, "disable_shader_loop_safety_checks", Category::RendererDebug};
|
linkage, false, "disable_shader_loop_safety_checks", Category::RendererDebug};
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Setting<bool> enable_renderdoc_hotkey{linkage, false, "renderdoc_hotkey",
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Setting<bool> enable_renderdoc_hotkey{linkage, false, "renderdoc_hotkey",
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Category::RendererDebug};
|
Category::RendererDebug};
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// TODO: remove this once AMDVLK supports VK_EXT_depth_bias_control
|
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bool renderer_amdvlk_depth_bias_workaround{};
|
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Setting<bool> disable_buffer_reorder{linkage, false, "disable_buffer_reorder",
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Setting<bool> disable_buffer_reorder{linkage, false, "disable_buffer_reorder",
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Category::RendererDebug};
|
Category::RendererDebug};
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|
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|
@ -394,11 +394,6 @@ struct System::Impl {
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room_member->SendGameInfo(game_info);
|
room_member->SendGameInfo(game_info);
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}
|
}
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||||||
|
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// Workarounds:
|
|
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// Activate this in Super Smash Brothers Ultimate, it only affects AMD cards using AMDVLK
|
|
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Settings::values.renderer_amdvlk_depth_bias_workaround =
|
|
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params.program_id == 0x1006A800016E000ULL;
|
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|
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status = SystemResultStatus::Success;
|
status = SystemResultStatus::Success;
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return status;
|
return status;
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||||||
}
|
}
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@ -457,9 +452,6 @@ struct System::Impl {
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room_member->SendGameInfo(game_info);
|
room_member->SendGameInfo(game_info);
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||||||
}
|
}
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||||||
|
|
||||||
// Workarounds
|
|
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Settings::values.renderer_amdvlk_depth_bias_workaround = false;
|
|
||||||
|
|
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// Reset all glue registrations
|
// Reset all glue registrations
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arp_manager.ResetAll();
|
arp_manager.ResetAll();
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|
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|
@ -5,6 +5,7 @@
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#include "common/assert.h"
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#include "common/assert.h"
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||||||
#include "common/logging/log.h"
|
#include "common/logging/log.h"
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||||||
#include "core/core.h"
|
#include "core/core.h"
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||||||
|
#include "core/hle/kernel/k_process.h"
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||||||
#include "core/hle/service/nvdrv/core/container.h"
|
#include "core/hle/service/nvdrv/core/container.h"
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||||||
#include "core/hle/service/nvdrv/core/nvmap.h"
|
#include "core/hle/service/nvdrv/core/nvmap.h"
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||||||
#include "core/hle/service/nvdrv/core/syncpoint_manager.h"
|
#include "core/hle/service/nvdrv/core/syncpoint_manager.h"
|
||||||
@ -75,7 +76,7 @@ NvResult nvhost_gpu::Ioctl1(DeviceFD fd, Ioctl command, std::span<const u8> inpu
|
|||||||
case 0xd:
|
case 0xd:
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||||||
return WrapFixed(this, &nvhost_gpu::SetChannelPriority, input, output);
|
return WrapFixed(this, &nvhost_gpu::SetChannelPriority, input, output);
|
||||||
case 0x1a:
|
case 0x1a:
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||||||
return WrapFixed(this, &nvhost_gpu::AllocGPFIFOEx2, input, output);
|
return WrapFixed(this, &nvhost_gpu::AllocGPFIFOEx2, input, output, fd);
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case 0x1b:
|
case 0x1b:
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||||||
return WrapFixedVariable(this, &nvhost_gpu::SubmitGPFIFOBase1, input, output, true);
|
return WrapFixedVariable(this, &nvhost_gpu::SubmitGPFIFOBase1, input, output, true);
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case 0x1d:
|
case 0x1d:
|
||||||
@ -120,8 +121,13 @@ NvResult nvhost_gpu::Ioctl3(DeviceFD fd, Ioctl command, std::span<const u8> inpu
|
|||||||
return NvResult::NotImplemented;
|
return NvResult::NotImplemented;
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||||||
}
|
}
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|
|
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void nvhost_gpu::OnOpen(NvCore::SessionId session_id, DeviceFD fd) {}
|
void nvhost_gpu::OnOpen(NvCore::SessionId session_id, DeviceFD fd) {
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void nvhost_gpu::OnClose(DeviceFD fd) {}
|
sessions[fd] = session_id;
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||||||
|
}
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||||||
|
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||||||
|
void nvhost_gpu::OnClose(DeviceFD fd) {
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|
sessions.erase(fd);
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||||||
|
}
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|
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NvResult nvhost_gpu::SetNVMAPfd(IoctlSetNvmapFD& params) {
|
NvResult nvhost_gpu::SetNVMAPfd(IoctlSetNvmapFD& params) {
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LOG_DEBUG(Service_NVDRV, "called, fd={}", params.nvmap_fd);
|
LOG_DEBUG(Service_NVDRV, "called, fd={}", params.nvmap_fd);
|
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@ -161,7 +167,7 @@ NvResult nvhost_gpu::SetChannelPriority(IoctlChannelSetPriority& params) {
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return NvResult::Success;
|
return NvResult::Success;
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||||||
}
|
}
|
||||||
|
|
||||||
NvResult nvhost_gpu::AllocGPFIFOEx2(IoctlAllocGpfifoEx2& params) {
|
NvResult nvhost_gpu::AllocGPFIFOEx2(IoctlAllocGpfifoEx2& params, DeviceFD fd) {
|
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LOG_WARNING(Service_NVDRV,
|
LOG_WARNING(Service_NVDRV,
|
||||||
"(STUBBED) called, num_entries={:X}, flags={:X}, unk0={:X}, "
|
"(STUBBED) called, num_entries={:X}, flags={:X}, unk0={:X}, "
|
||||||
"unk1={:X}, unk2={:X}, unk3={:X}",
|
"unk1={:X}, unk2={:X}, unk3={:X}",
|
||||||
@ -173,7 +179,12 @@ NvResult nvhost_gpu::AllocGPFIFOEx2(IoctlAllocGpfifoEx2& params) {
|
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return NvResult::AlreadyAllocated;
|
return NvResult::AlreadyAllocated;
|
||||||
}
|
}
|
||||||
|
|
||||||
system.GPU().InitChannel(*channel_state);
|
u64 program_id{};
|
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|
if (auto* const session = core.GetSession(sessions[fd]); session != nullptr) {
|
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|
program_id = session->process->GetProgramId();
|
||||||
|
}
|
||||||
|
|
||||||
|
system.GPU().InitChannel(*channel_state, program_id);
|
||||||
|
|
||||||
params.fence_out = syncpoint_manager.GetSyncpointFence(channel_syncpoint);
|
params.fence_out = syncpoint_manager.GetSyncpointFence(channel_syncpoint);
|
||||||
|
|
||||||
|
@ -192,7 +192,7 @@ private:
|
|||||||
NvResult ZCullBind(IoctlZCullBind& params);
|
NvResult ZCullBind(IoctlZCullBind& params);
|
||||||
NvResult SetErrorNotifier(IoctlSetErrorNotifier& params);
|
NvResult SetErrorNotifier(IoctlSetErrorNotifier& params);
|
||||||
NvResult SetChannelPriority(IoctlChannelSetPriority& params);
|
NvResult SetChannelPriority(IoctlChannelSetPriority& params);
|
||||||
NvResult AllocGPFIFOEx2(IoctlAllocGpfifoEx2& params);
|
NvResult AllocGPFIFOEx2(IoctlAllocGpfifoEx2& params, DeviceFD fd);
|
||||||
NvResult AllocateObjectContext(IoctlAllocObjCtx& params);
|
NvResult AllocateObjectContext(IoctlAllocObjCtx& params);
|
||||||
|
|
||||||
NvResult SubmitGPFIFOImpl(IoctlSubmitGpfifo& params, Tegra::CommandList&& entries);
|
NvResult SubmitGPFIFOImpl(IoctlSubmitGpfifo& params, Tegra::CommandList&& entries);
|
||||||
@ -210,6 +210,7 @@ private:
|
|||||||
NvCore::SyncpointManager& syncpoint_manager;
|
NvCore::SyncpointManager& syncpoint_manager;
|
||||||
NvCore::NvMap& nvmap;
|
NvCore::NvMap& nvmap;
|
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std::shared_ptr<Tegra::Control::ChannelState> channel_state;
|
std::shared_ptr<Tegra::Control::ChannelState> channel_state;
|
||||||
|
std::unordered_map<DeviceFD, NvCore::SessionId> sessions;
|
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u32 channel_syncpoint;
|
u32 channel_syncpoint;
|
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std::mutex channel_mutex;
|
std::mutex channel_mutex;
|
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|
|
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|
@ -26,6 +26,9 @@ public:
|
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void Track(u64 offset, u64 size) noexcept {
|
void Track(u64 offset, u64 size) noexcept {
|
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const size_t page = offset >> PAGE_SHIFT;
|
const size_t page = offset >> PAGE_SHIFT;
|
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const size_t page_end = (offset + size) >> PAGE_SHIFT;
|
const size_t page_end = (offset + size) >> PAGE_SHIFT;
|
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|
if (page_end < page || page_end >= pages.size()) {
|
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|
return;
|
||||||
|
}
|
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TrackPage(page, offset, size);
|
TrackPage(page, offset, size);
|
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if (page == page_end) {
|
if (page == page_end) {
|
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return;
|
return;
|
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@ -41,6 +44,9 @@ public:
|
|||||||
[[nodiscard]] bool IsUsed(u64 offset, u64 size) const noexcept {
|
[[nodiscard]] bool IsUsed(u64 offset, u64 size) const noexcept {
|
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const size_t page = offset >> PAGE_SHIFT;
|
const size_t page = offset >> PAGE_SHIFT;
|
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const size_t page_end = (offset + size) >> PAGE_SHIFT;
|
const size_t page_end = (offset + size) >> PAGE_SHIFT;
|
||||||
|
if (page_end < page || page_end >= pages.size()) {
|
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|
return false;
|
||||||
|
}
|
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if (IsPageUsed(page, offset, size)) {
|
if (IsPageUsed(page, offset, size)) {
|
||||||
return true;
|
return true;
|
||||||
}
|
}
|
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|
@ -16,8 +16,9 @@ namespace Tegra::Control {
|
|||||||
|
|
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ChannelState::ChannelState(s32 bind_id_) : bind_id{bind_id_}, initialized{} {}
|
ChannelState::ChannelState(s32 bind_id_) : bind_id{bind_id_}, initialized{} {}
|
||||||
|
|
||||||
void ChannelState::Init(Core::System& system, GPU& gpu) {
|
void ChannelState::Init(Core::System& system, GPU& gpu, u64 program_id_) {
|
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ASSERT(memory_manager);
|
ASSERT(memory_manager);
|
||||||
|
program_id = program_id_;
|
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dma_pusher = std::make_unique<Tegra::DmaPusher>(system, gpu, *memory_manager, *this);
|
dma_pusher = std::make_unique<Tegra::DmaPusher>(system, gpu, *memory_manager, *this);
|
||||||
maxwell_3d = std::make_unique<Engines::Maxwell3D>(system, *memory_manager);
|
maxwell_3d = std::make_unique<Engines::Maxwell3D>(system, *memory_manager);
|
||||||
fermi_2d = std::make_unique<Engines::Fermi2D>(*memory_manager);
|
fermi_2d = std::make_unique<Engines::Fermi2D>(*memory_manager);
|
||||||
|
@ -40,11 +40,12 @@ struct ChannelState {
|
|||||||
ChannelState(ChannelState&& other) noexcept = default;
|
ChannelState(ChannelState&& other) noexcept = default;
|
||||||
ChannelState& operator=(ChannelState&& other) noexcept = default;
|
ChannelState& operator=(ChannelState&& other) noexcept = default;
|
||||||
|
|
||||||
void Init(Core::System& system, GPU& gpu);
|
void Init(Core::System& system, GPU& gpu, u64 program_id);
|
||||||
|
|
||||||
void BindRasterizer(VideoCore::RasterizerInterface* rasterizer);
|
void BindRasterizer(VideoCore::RasterizerInterface* rasterizer);
|
||||||
|
|
||||||
s32 bind_id = -1;
|
s32 bind_id = -1;
|
||||||
|
u64 program_id = 0;
|
||||||
/// 3D engine
|
/// 3D engine
|
||||||
std::unique_ptr<Engines::Maxwell3D> maxwell_3d;
|
std::unique_ptr<Engines::Maxwell3D> maxwell_3d;
|
||||||
/// 2D engine
|
/// 2D engine
|
||||||
|
@ -7,7 +7,7 @@ namespace VideoCommon {
|
|||||||
|
|
||||||
ChannelInfo::ChannelInfo(Tegra::Control::ChannelState& channel_state)
|
ChannelInfo::ChannelInfo(Tegra::Control::ChannelState& channel_state)
|
||||||
: maxwell3d{*channel_state.maxwell_3d}, kepler_compute{*channel_state.kepler_compute},
|
: maxwell3d{*channel_state.maxwell_3d}, kepler_compute{*channel_state.kepler_compute},
|
||||||
gpu_memory{*channel_state.memory_manager} {}
|
gpu_memory{*channel_state.memory_manager}, program_id{channel_state.program_id} {}
|
||||||
|
|
||||||
template class VideoCommon::ChannelSetupCaches<VideoCommon::ChannelInfo>;
|
template class VideoCommon::ChannelSetupCaches<VideoCommon::ChannelInfo>;
|
||||||
|
|
||||||
|
@ -39,6 +39,7 @@ public:
|
|||||||
Tegra::Engines::Maxwell3D& maxwell3d;
|
Tegra::Engines::Maxwell3D& maxwell3d;
|
||||||
Tegra::Engines::KeplerCompute& kepler_compute;
|
Tegra::Engines::KeplerCompute& kepler_compute;
|
||||||
Tegra::MemoryManager& gpu_memory;
|
Tegra::MemoryManager& gpu_memory;
|
||||||
|
u64 program_id;
|
||||||
};
|
};
|
||||||
|
|
||||||
template <class P>
|
template <class P>
|
||||||
@ -77,9 +78,10 @@ protected:
|
|||||||
P* channel_state;
|
P* channel_state;
|
||||||
size_t current_channel_id{UNSET_CHANNEL};
|
size_t current_channel_id{UNSET_CHANNEL};
|
||||||
size_t current_address_space{};
|
size_t current_address_space{};
|
||||||
Tegra::Engines::Maxwell3D* maxwell3d;
|
Tegra::Engines::Maxwell3D* maxwell3d{};
|
||||||
Tegra::Engines::KeplerCompute* kepler_compute;
|
Tegra::Engines::KeplerCompute* kepler_compute{};
|
||||||
Tegra::MemoryManager* gpu_memory;
|
Tegra::MemoryManager* gpu_memory{};
|
||||||
|
u64 program_id{};
|
||||||
|
|
||||||
std::deque<P> channel_storage;
|
std::deque<P> channel_storage;
|
||||||
std::deque<size_t> free_channel_ids;
|
std::deque<size_t> free_channel_ids;
|
||||||
|
@ -58,6 +58,7 @@ void ChannelSetupCaches<P>::BindToChannel(s32 id) {
|
|||||||
maxwell3d = &channel_state->maxwell3d;
|
maxwell3d = &channel_state->maxwell3d;
|
||||||
kepler_compute = &channel_state->kepler_compute;
|
kepler_compute = &channel_state->kepler_compute;
|
||||||
gpu_memory = &channel_state->gpu_memory;
|
gpu_memory = &channel_state->gpu_memory;
|
||||||
|
program_id = channel_state->program_id;
|
||||||
current_address_space = gpu_memory->GetID();
|
current_address_space = gpu_memory->GetID();
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -76,6 +77,7 @@ void ChannelSetupCaches<P>::EraseChannel(s32 id) {
|
|||||||
maxwell3d = nullptr;
|
maxwell3d = nullptr;
|
||||||
kepler_compute = nullptr;
|
kepler_compute = nullptr;
|
||||||
gpu_memory = nullptr;
|
gpu_memory = nullptr;
|
||||||
|
program_id = 0;
|
||||||
} else if (current_channel_id != UNSET_CHANNEL) {
|
} else if (current_channel_id != UNSET_CHANNEL) {
|
||||||
channel_state = &channel_storage[current_channel_id];
|
channel_state = &channel_storage[current_channel_id];
|
||||||
}
|
}
|
||||||
|
@ -67,8 +67,8 @@ struct GPU::Impl {
|
|||||||
return CreateChannel(new_channel_id++);
|
return CreateChannel(new_channel_id++);
|
||||||
}
|
}
|
||||||
|
|
||||||
void InitChannel(Control::ChannelState& to_init) {
|
void InitChannel(Control::ChannelState& to_init, u64 program_id) {
|
||||||
to_init.Init(system, gpu);
|
to_init.Init(system, gpu, program_id);
|
||||||
to_init.BindRasterizer(rasterizer);
|
to_init.BindRasterizer(rasterizer);
|
||||||
rasterizer->InitializeChannel(to_init);
|
rasterizer->InitializeChannel(to_init);
|
||||||
}
|
}
|
||||||
@ -387,8 +387,8 @@ std::shared_ptr<Control::ChannelState> GPU::AllocateChannel() {
|
|||||||
return impl->AllocateChannel();
|
return impl->AllocateChannel();
|
||||||
}
|
}
|
||||||
|
|
||||||
void GPU::InitChannel(Control::ChannelState& to_init) {
|
void GPU::InitChannel(Control::ChannelState& to_init, u64 program_id) {
|
||||||
impl->InitChannel(to_init);
|
impl->InitChannel(to_init, program_id);
|
||||||
}
|
}
|
||||||
|
|
||||||
void GPU::BindChannel(s32 channel_id) {
|
void GPU::BindChannel(s32 channel_id) {
|
||||||
|
@ -149,7 +149,7 @@ public:
|
|||||||
|
|
||||||
std::shared_ptr<Control::ChannelState> AllocateChannel();
|
std::shared_ptr<Control::ChannelState> AllocateChannel();
|
||||||
|
|
||||||
void InitChannel(Control::ChannelState& to_init);
|
void InitChannel(Control::ChannelState& to_init, u64 program_id);
|
||||||
|
|
||||||
void BindChannel(s32 channel_id);
|
void BindChannel(s32 channel_id);
|
||||||
|
|
||||||
|
@ -215,6 +215,7 @@ ShaderCache::ShaderCache(Tegra::MaxwellDeviceMemoryManager& device_memory_,
|
|||||||
.support_gl_variable_aoffi = device.HasVariableAoffi(),
|
.support_gl_variable_aoffi = device.HasVariableAoffi(),
|
||||||
.support_gl_sparse_textures = device.HasSparseTexture2(),
|
.support_gl_sparse_textures = device.HasSparseTexture2(),
|
||||||
.support_gl_derivative_control = device.HasDerivativeControl(),
|
.support_gl_derivative_control = device.HasDerivativeControl(),
|
||||||
|
.support_geometry_streams = true,
|
||||||
|
|
||||||
.warp_size_potentially_larger_than_guest = device.IsWarpSizePotentiallyLargerThanGuest(),
|
.warp_size_potentially_larger_than_guest = device.IsWarpSizePotentiallyLargerThanGuest(),
|
||||||
|
|
||||||
|
@ -1082,37 +1082,16 @@ void RasterizerVulkan::UpdateDepthBias(Tegra::Engines::Maxwell3D::Regs& regs) {
|
|||||||
regs.zeta.format == Tegra::DepthFormat::X8Z24_UNORM ||
|
regs.zeta.format == Tegra::DepthFormat::X8Z24_UNORM ||
|
||||||
regs.zeta.format == Tegra::DepthFormat::S8Z24_UNORM ||
|
regs.zeta.format == Tegra::DepthFormat::S8Z24_UNORM ||
|
||||||
regs.zeta.format == Tegra::DepthFormat::V8Z24_UNORM;
|
regs.zeta.format == Tegra::DepthFormat::V8Z24_UNORM;
|
||||||
bool force_unorm = ([&] {
|
if (is_d24 && !device.SupportsD24DepthBuffer() && program_id == 0x1006A800016E000ULL) {
|
||||||
if (!is_d24 || device.SupportsD24DepthBuffer()) {
|
// Only activate this in Super Smash Brothers Ultimate
|
||||||
return false;
|
|
||||||
}
|
|
||||||
if (device.IsExtDepthBiasControlSupported()) {
|
|
||||||
return true;
|
|
||||||
}
|
|
||||||
if (!Settings::values.renderer_amdvlk_depth_bias_workaround) {
|
|
||||||
return false;
|
|
||||||
}
|
|
||||||
// the base formulas can be obtained from here:
|
// the base formulas can be obtained from here:
|
||||||
// https://docs.microsoft.com/en-us/windows/win32/direct3d11/d3d10-graphics-programming-guide-output-merger-stage-depth-bias
|
// https://docs.microsoft.com/en-us/windows/win32/direct3d11/d3d10-graphics-programming-guide-output-merger-stage-depth-bias
|
||||||
const double rescale_factor =
|
const double rescale_factor =
|
||||||
static_cast<double>(1ULL << (32 - 24)) / (static_cast<double>(0x1.ep+127));
|
static_cast<double>(1ULL << (32 - 24)) / (static_cast<double>(0x1.ep+127));
|
||||||
units = static_cast<float>(static_cast<double>(units) * rescale_factor);
|
units = static_cast<float>(static_cast<double>(units) * rescale_factor);
|
||||||
return false;
|
}
|
||||||
})();
|
|
||||||
scheduler.Record([constant = units, clamp = regs.depth_bias_clamp,
|
scheduler.Record([constant = units, clamp = regs.depth_bias_clamp,
|
||||||
factor = regs.slope_scale_depth_bias, force_unorm,
|
factor = regs.slope_scale_depth_bias](vk::CommandBuffer cmdbuf) {
|
||||||
precise = device.HasExactDepthBiasControl()](vk::CommandBuffer cmdbuf) {
|
|
||||||
if (force_unorm) {
|
|
||||||
VkDepthBiasRepresentationInfoEXT info{
|
|
||||||
.sType = VK_STRUCTURE_TYPE_DEPTH_BIAS_REPRESENTATION_INFO_EXT,
|
|
||||||
.pNext = nullptr,
|
|
||||||
.depthBiasRepresentation =
|
|
||||||
VK_DEPTH_BIAS_REPRESENTATION_LEAST_REPRESENTABLE_VALUE_FORCE_UNORM_EXT,
|
|
||||||
.depthBiasExact = precise ? VK_TRUE : VK_FALSE,
|
|
||||||
};
|
|
||||||
cmdbuf.SetDepthBias(constant, clamp, factor, &info);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
cmdbuf.SetDepthBias(constant, clamp, factor);
|
cmdbuf.SetDepthBias(constant, clamp, factor);
|
||||||
});
|
});
|
||||||
}
|
}
|
||||||
|
@ -2114,7 +2114,9 @@ void TextureCache<P>::TrackImage(ImageBase& image, ImageId image_id) {
|
|||||||
ASSERT(False(image.flags & ImageFlagBits::Tracked));
|
ASSERT(False(image.flags & ImageFlagBits::Tracked));
|
||||||
image.flags |= ImageFlagBits::Tracked;
|
image.flags |= ImageFlagBits::Tracked;
|
||||||
if (False(image.flags & ImageFlagBits::Sparse)) {
|
if (False(image.flags & ImageFlagBits::Sparse)) {
|
||||||
device_memory.UpdatePagesCachedCount(image.cpu_addr, image.guest_size_bytes, 1);
|
if (image.cpu_addr < ~(1ULL << 40)) {
|
||||||
|
device_memory.UpdatePagesCachedCount(image.cpu_addr, image.guest_size_bytes, 1);
|
||||||
|
}
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
if (True(image.flags & ImageFlagBits::Registered)) {
|
if (True(image.flags & ImageFlagBits::Registered)) {
|
||||||
@ -2140,7 +2142,9 @@ void TextureCache<P>::UntrackImage(ImageBase& image, ImageId image_id) {
|
|||||||
ASSERT(True(image.flags & ImageFlagBits::Tracked));
|
ASSERT(True(image.flags & ImageFlagBits::Tracked));
|
||||||
image.flags &= ~ImageFlagBits::Tracked;
|
image.flags &= ~ImageFlagBits::Tracked;
|
||||||
if (False(image.flags & ImageFlagBits::Sparse)) {
|
if (False(image.flags & ImageFlagBits::Sparse)) {
|
||||||
device_memory.UpdatePagesCachedCount(image.cpu_addr, image.guest_size_bytes, -1);
|
if (image.cpu_addr < ~(1ULL << 40)) {
|
||||||
|
device_memory.UpdatePagesCachedCount(image.cpu_addr, image.guest_size_bytes, -1);
|
||||||
|
}
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
ASSERT(True(image.flags & ImageFlagBits::Registered));
|
ASSERT(True(image.flags & ImageFlagBits::Registered));
|
||||||
|
Reference in New Issue
Block a user