9f3255cee6
Add support for msp430.
2002-12-30 19:25:12 +00:00
df73991943
Added some more pseudo opcodes for system call processing.
2002-12-30 10:50:32 +00:00
08fe4973cd
[ binutils/ChangeLog ]
...
2002-12-27 Chris Demetriou <cgd@broadcom.com>
* doc/binutils.texi (objdump): Document MIPS -M options.
[ gas/testsuite/ChangeLog ]
2002-12-27 Chris Demetriou <cgd@broadcom.com>
* gas/mips/cp0-names-mips32.d: New file.
* gas/mips/cp0-names-mips64.d: New file.
* gas/mips/cp0-names-numeric.d: New file.
* gas/mips/cp0-names-sb1.d: New file.
* gas/mips/cp0-names.s: New file.
* gas/mips/fpr-names-32.d: New file.
* gas/mips/fpr-names-64.d: New file.
* gas/mips/fpr-names-n32.d: New file.
* gas/mips/fpr-names-numeric.d: New file.
* gas/mips/fpr-names.s: New file.
* gas/mips/gpr-names-32.d: New file.
* gas/mips/gpr-names-64.d: New file.
* gas/mips/gpr-names-n32.d: New file.
* gas/mips/gpr-names-numeric.d: New file.
* gas/mips/gpr-names.s: New file.
* gas/mips/mips.exp: Run new tests.
[ include/ChangeLog ]
2002-12-27 Chris Demetriou <cgd@broadcom.com>
* dis-asm.h (print_mips_disassembler_options): Prototype.
[ include/opcode/ChangeLog ]
2002-12-19 Chris Demetriou <cgd@broadcom.com>
* mips.h (OP_OP_COP0, OP_OP_COP1, OP_OP_COP2, OP_OP_COP3)
(OP_OP_LWC1, OP_OP_LWC2, OP_OP_LWC3, OP_OP_LDC1, OP_OP_LDC2)
(OP_OP_LDC3, OP_OP_SWC1, OP_OP_SWC2, OP_OP_SWC3, OP_OP_SDC1)
(OP_OP_SDC2, OP_OP_SDC3): Define.
[ opcodes/ChangeLog ]
2002-12-27 Chris Demetriou <cgd@broadcom.com>
* disassemble.c (disassembler_usage): Add invocation of
print_mips_disassembler_options.
* mips-dis.c (print_mips_disassembler_options)
(set_default_mips_dis_options, parse_mips_dis_option)
(parse_mips_dis_options, choose_abi_by_name, choose_arch_by_name)
(choose_arch_by_number): New functions.
(mips_abi_choice, mips_arch_choice): New structures.
(mips32_reg_names, mips64_reg_names, reg_names): Remove.
(mips_gpr_names_numeric, mips_gpr_names_oldabi)
(mips_gpr_names_newabi, mips_fpr_names_numeric)
(mips_fpr_names_32, mips_fpr_names_n32, mips_fpr_names_64)
(mips_cp0_names_numeric, mips_cp0_names_mips3264)
(mips_cp0_names_sb1, mips_abi_choices, mips_arch_choices)
(mips_processor, mips_isa, mips_gpr_names, mips_fpr_names)
(mips_cp0_names): New variables.
(print_insn_args): Use new variables to print GPR, FPR, and CP0
register names.
(mips_isa_type): Remove.
(print_insn_mips): Remove ISA and CPU setup since it is now done...
(_print_insn_mips): Here. Remove register setup code, and
call set_default_mips_dis_options and parse_mips_dis_options
instead.
(print_mips16_insn_arg): Use mips_gpr_names instead of mips32_names.
2002-12-27 08:00:31 +00:00
d9633de92c
* sim-h8300.h: Remove ^M.
2002-12-26 06:14:43 +00:00
e2ddab05fc
* bfdlink.h (struct bfd_link_info): Add "strip_discarded".
2002-12-23 11:53:12 +00:00
120f285b61
* xstormy16.h: Add XSTORMY16_12.
2002-12-20 21:13:42 +00:00
e9f731caf7
* bfdlink.h (struct bfd_link_info): Replace bfd_boolean fields with
...
bit-fields. Rearrange to put all like types together.
2002-12-19 23:05:39 +00:00
02f2ba2b0b
* xstormy16.h (START_RELOC_NUMBERS) Add relocation numbers
...
for R_XSTORMY16_LO16 and R_XSTORMY16_HI16.
2002-12-17 03:57:00 +00:00
84c221c08e
* hppa.h (completer_chars): #if 0 out.
2002-12-16 09:57:03 +00:00
b446bff5bc
* ns32k.h (struct ns32k_opcode): Constify "name", "operands" and
...
"default_args".
(struct not_wot): Constify "args".
(struct not): Constify "name".
(numopcodes): Delete.
(endop): Delete.
2002-12-16 09:53:48 +00:00
b7ff6b340d
* pj.h (pj_opc_info_t): Add union.
...
* pj-dis.c (print_insn_pj): Adjust for pj_opc_info_t change.
* config/tc-pj.c (little, big, parse_exp_save_ilp): Prototype.
(c_to_r, ipush_code, fake_opcode, alias): Likewise.
(fake_opcode): Adjust for pj_opc_int_t change.
(md_begin): Likewise.
(md_assemble): Likewise.
(ipush_code): Correct parse_exp_save_ilp call. Test pending_reloc
instead of non-existent third arg of parse_exp_save_ilp.
(md_parse_option): Correct "little" and "big" calls.
2002-12-12 21:52:05 +00:00
d6a24c4840
Add support for displaying extension to DWARF2 used by Unified Parallel C
...
compiler.
2002-12-10 17:48:27 +00:00
94d815b251
Patch to update IA-64 port to SDM 2.1.
...
bfd/ChangeLog
* cpu-ia64-opc.c: Add operand constant "ar.csd".
gas/ChangeLog
* config/tc-ia64.c (pseudo_func): Add "@pause" constant for "hint"
instruction.
(emit_one_bundle): Handle "hint" instruction.
(operand_match): Match IA64_OPND_AR_CSD.
gas/testsuite/ChangeLog
* gas/ia64/opc-b.d: Update for instructions added by SDM2.1.
* gas/ia64/opc-b.s: Ditto.
* gas/ia64/opc-f.d: Ditto.
* gas/ia64/opc-f.s: Ditto.
* gas/ia64/opc-i.d: Ditto.
* gas/ia64/opc-i.s: Ditto.
* gas/ia64/opc-m.d: Ditto.
* gas/ia64/opc-m.s: Ditto.
* gas/ia64/opc-x.d: Ditto.
* gas/ia64/opc-x.s: Ditto.
include/opcode/ChangeLog
* ia64.h: Fix copyright message.
(IA64_OPND_AR_CSD): New operand kind.
opcodes/ChangeLog
* ia64-opc-d.c (ia64_opcodes_d): Add "hint" instruction.
* ia64-opc-b.c: Add "hint.b" instruction.
* ia64-opc-f.c: Add "hint.f" instruction.
* ia64-opc-i.c: Add "hint.i" instruction.
* ia64-opc-m.c: Add "hint.m", "fc.i", "ld16", "st16", and
"cmp8xchg16" instructions.
* ia64-opc-x.c: Add "hint.x" instruction.
* ia64-opc.h (AR_CSD): New macro.
* ia64-ic.tbl: Update according to SDM2.1.
* ia64-raw.tbl: Ditto.
* ia64-waw.tbl: Ditto.
* ia64-gen.c (in_iclass): Handle "hint" like "nop".
(lookup_regindex): Recognize AR[FCR], AR[EFLAG], AR[CSD],
AR[SSD], AR[CFLG], AR[FSR], AR[FIR], and AR[FDR].
* ia64-asmtab.c: Regenerate.
2002-12-05 02:08:02 +00:00
270268370a
include/opcode/
...
* ia64.h (enum ia64_opnd): Add IA64_OPND_LDXMOV.
bfd/
* cpu-ia64-opc.c (elf64_ia64_operands): Add ldxmov entry.
opcodes/
* ia64-opc-m.c: Add ld8.mov.
* ia64-asmtab.c: Regenerate.
gas/
* config/tc-ia64.c (operand_match): Add IA64_OPND_LDXMOV case.
gas/testsuite/
* gas/ia64/ldxmov-1.[ds]: New.
* gas/ia64/ldxmov-2.[ls]: New.
* gas/ia64/ia64.exp: Run them.
2002-12-03 18:15:46 +00:00
fcdef14b08
* cgen.h (struct cgen_maybe_multi_ifield): Add "const PTR p" to union.
...
Constify "leaf" and "multi".
2002-12-02 21:51:52 +00:00
8d49f1c93e
* m68hc11.h (EF_M68HC12_MACH, EF_M68HCS12_MACH): Define.
...
(EF_M68HC11_MACH_MASK, EF_M68HC11_MACH): Define.
(EF_M68HC11_MERGE_MACH, EF_M68HC11_CAN_MERGE_MACH): Define.
2002-12-01 12:16:21 +00:00
73593ea1dd
s/boolean/bfd_boolean/ s/true/TRUE/ s/false/FALSE/. Simplify
...
comparisons of bfd_boolean vars with TRUE/FALSE. Formatting.
2002-11-30 08:39:45 +00:00
5a74d15e43
include/elf/ChangeLog
...
* internal.h (elf32_internal_ehdr, Elf32_Internal_Ehdr,
elf64_internal_ehdr, Elf64_Internal_Ehdr, elf32_internal_phdr,
Elf32_Internal_Phdr, elf64_internal_phdr, Elf64_Internal_Phdr,
elf32_internal_shdr, Elf32_Internal_Shdr, elf64_internal_shdr,
Elf64_Internal_Shdr, elf32_internal_sym, elf64_internal_sym,
Elf32_Internal_Sym, Elf64_Internal_Sym, Elf32_Internal_Note,
elf32_internal_note, elf32_internal_rel, Elf32_Internal_Rel,
elf64_internal_rel, Elf64_Internal_Rel, elf32_internal_rela,
elf64_internal_rela, Elf32_Internal_Rela, Elf64_Internal_Rela,
elf32_internal_dyn, elf64_internal_dyn, Elf32_Internal_Dyn,
Elf64_Internal_Dyn, elf32_internal_verdef, elf64_internal_verdef,
elf32_internal_verdaux, elf64_internal_verdaux, elf32_internal_verneed,
elf64_internal_verneed, elf32_internal_vernaux, elf64_internal_vernaux,
elf32_internal_versym, elf64_internal_versym, Elf32_Internal_Verdef,
Elf64_Internal_Verdef, Elf32_Internal_Verdaux, Elf64_Internal_Verdaux,
Elf32_Internal_Verneed, Elf64_Internal_Verneed, Elf32_Internal_Vernaux,
Elf64_Internal_Vernaux, Elf32_Internal_Versym, Elf64_Internal_Versym,
Elf32_Internal_Syminfo, Elf64_Internal_Syminfo): Delete.
(Elf_Internal_Rel): Delete.
bfd/ChangeLog
* elf-bfd.h: Replace occurrences of Elf32_Internal_* and
Elf64_Internal_* with Elf_Internal_*. Replace Elf_Internal_Rel
with Elf_Internal_Rela.
* elf-hppa.h, elf-m10200.c, elf-m10300.c, elf32-arc.c, elf32-arm.h,
elf32-avr.c, elf32-cris.c, elf32-d10v.c, elf32-d30v.c, elf32-dlx.c,
elf32-fr30.c, elf32-frv.c, elf32-gen.c, elf32-h8300.c, elf32-hppa.c,
elf32-i370.c, elf32-i386.c, elf32-i860.c, elf32-i960.c, elf32-ip2k.c,
elf32-m32r.c, elf32-m68hc11.c, elf32-m68hc12.c, elf32-m68k.c,
elf32-mcore.c, elf32-mips.c, elf32-openrisc.c, elf32-or32.c,
elf32-ppc.c, elf32-s390.c, elf32-sh.c, elf32-v850.c, elf32-vax.c,
elf32-xstormy16.c, elf64-alpha.c, elf64-gen.c, elf64-hppa.c,
elf64-mips.c, elf64-mmix.c, elf64-ppc.c, elf64-s390.c, elf64-sh64.c,
elf64-sparc.c, elf64-x86-64.c, elfarm-nabi.c, elfarm-oabi.c,
elfcode.h, elflink.h, elfn32-mips.c, elfxx-ia64.c, elfxx-mips.c: Ditto.
* elf-hppa.h (elf_hppa_internal_shdr): Delete. Use Elf_Internal_Shdr
throughout instead.
* elf.c (_bfd_elf_no_info_to_howto_rel): Delete.
* elfcode.h (elf_swap_reloca_in): Pass source operand as a bfd_byte *.
Remove INLINE keyword.
(elf_swap_reloc_in): Likewise. Also clear r_addend.
(elf_swap_reloc_out, elf_swap_reloca_out): Pass destination operand
as a bfd_byte *.
(elf_write_relocs): Consolidate REL and RELA code.
(elf_slurp_reloc_table_from_section): Simplify REL code.
(NAME(_bfd_elf,size_info)): Populate reloc swap entries.
* elf-bfd.h (MAX_INT_RELS_PER_EXT_REL): Define.
* elflink.h (elf_link_read_relocs_from_section): Consolidate REL and
RELA code.
(elf_link_adjust_relocs): Likewise. Don't malloc space for temp
reloc array, use a fixed size of MAX_INT_RELS_PER_EXT_REL.
(elf_link_output_relocs): Likewise.
(elf_reloc_link_order): Likewise.
(elf_finish_pointer_linker_section): Likewise.
(struct elf_link_sort_rela): Remove union.
(elf_link_sort_cmp1): Update to suit.
(elf_link_sort_cmp2): Here too.
(elf_link_sort_relocs): Consolidate REL and RELA code. Fix memory
over-allocation for int_rels_per_ext_rel != 1 case.
* elf32-arm.h: Update all bfd_elf32_swap_reloc_out calls.
* elf32-i386.c: Likewise.
* elf32-cris.c: Likewise for bfd_elf32_swap_reloca_out.
* elf32-hppa.c, elf32-i370.c, elf32-m68k.c, elf32-ppc.c, elf32-s390.c,
elf32-sh.c, elf32-vax.c, elfxx-mips.c: Likewise.
* elf64-alpha.c: Likewise for bfd_elf64_swap_reloca_out.
* elf64-hppa.c, elf64-mips.c, elf64-ppc.c, elf64-s390.c, elf64-sh64.c,
elf64-sparc.c, elf64-x86-64.c: Likewise.
* elfxx-ia64.c: Likewise for bfd_elfNN_swap_reloca_out.
* elfxx-mips.c (sort_dynamic_relocs): Likewise for
bfd_elf32_swap_reloc_in.
* elf32-arm.h: Update elf32_arm_info_to_howto calls.
* elf32-mips.c: Likewise for mips_info_to_howto_rel.
(mips_elf64_swap_reloc_in): Zero r_addend.
(mips_elf64_be_swap_reloc_in): Likewise.
(mips_elf64_slurp_one_reloc_table): Simplify.
* elf64-alpha.c (alpha_elf_size_info): Populate reloc swap entries.
* elf64-hppa.c (hppa64_elf_size_info): Likewise.
* elf64-sparc.c (sparc64_elf_size_info): Likewise.
2002-11-28 11:55:34 +00:00
f29c4db185
* libiberty.h (basename): Add NetBSD to the list.
2002-11-24 06:58:20 +00:00
aa1ad0633b
merge from gcc
2002-11-22 21:02:07 +00:00
ec97538aa2
2002-11-19 Klee Dienes <kdienes@apple.com>
...
* h8300.h (h8_opcode): Remove 'noperands', 'idx', and 'size'
fields.
(h8_opcodes). Modify initializer and initializer macros to no
longer initialize the removed fields.
2002-11-19 22:56:14 +00:00
dfac831ba8
Fixed LDHI constraint
2002-11-19 11:59:12 +00:00
f7133e95e9
2002-11-11 Klee Dienes <kdienes@apple.com>
...
* h8300.h (h8_opcode): Remove 'length' field.
(h8_opcodes): Mark as 'const' (both the declaration and
definition). Modify initializer and initializer macros to no
longer initialize the length field.
2002-11-11 Klee Dienes <kdienes@apple.com>
* h8300-dis.c: Include libiberty.h (for xmalloc).
(struct h8_instruction): New type, used to wrap h8_opcodes with a
length field (computed at run-time).
(h8_instructions): New variable.
(bfd_h8_disassemble_init): Allocate the storage for
h8_instructions. Fill h8_instructions with pointers to the
appropriate opcode and the correct value for the length field.
(bfd_h8_disassemble): Iterate through h8_instructions instead of
h8_opcodes.
2002-11-18 16:52:44 +00:00
2b92bf13ea
2002-11-18 Klee Dienes <kdienes@apple.com>
...
* arc.h (arc_ext_opcodes): Declare as extern.
(arc_ext_operands): Declare as extern.
* i860.h (i860_opcodes): Declare as const.
2002-11-18 Klee Dienes <kdienes@apple.com>
* arc-opc.c (arc_ext_opcodes): Define.
(arc_ext_operands): Define.
* i386-dis.c (Suffix3DNow): Declare as const.
* arm-opc.h (arm_opcodes): Declare as const.
(thumb_opcodes): Declare as const.
* h8500-opc.h (h8500_table): Declare as const.
(h8500_table): Use a NULL for the opcode in the terminator, so
that code testing (opcode->name) behaves correctly.
* mcore-opc.h (mcore_table): Declare as const.
* sh-opc.h (sh_table): Declare as const.
* w65-opc.h (optable): Declare as const.
* z8k-opc.h (z8k_table): Declare as const.
2002-11-18 16:49:56 +00:00
dea6510472
Fixups in ChangeLog entries which has been filed in the wrong place.
2002-11-18 14:00:44 +00:00
6aec25d6c3
* gas/config/tc-tic4x.c: Fixed proper commandline
...
parameters. Added support for new opcode-list format. General
error message fixups.
(c4x_inst_add): Reject insn not for our CPU
(md_begin): Added matrix for setting the proper opcode-level &
device-flags according to cpu type and revision. Rewrite the
opcode hasher.
(c4x_operand_parse): Fix opcode bug
(c4x_operands_match): New function argument. Added dry-run
mechanism, that is optional error generation. Added constraint 'i'
and 'j'.
(c4x_insn_check): Added new function for post-verification of the
generated insn.
(md_assemble): Check all opcodes before croaking because of an
argument mismatch. Need this to be able to fully support
ortogonally arguments.
(md_parse_options): Revised commandprompt swicthes and added new
ones.
(md_show_usage): Complete rewrite of printout.
* gas/testsuite/gas/tic4x/addressing.s: Fix bug in one insn
* gas/testsuite/gas/tic4x/addressing_c3x.d: Update thereafter
* gas/testsuite/gas/tic4x/addressing_c4x.d: Update thereafter
* gas/testsuite/gas/tic4x/allopcodes.S: Add support for new
opclass.h changes
* gas/testsuite/gas/tic4x/opclasses.h: Added testsuites for
the new enhanced opcodes.
* gas/testsuite/gas/tic4x/opcodes.s: Regenerate
* gas/testsuite/gas/tic4x/opcodes_c3x.d: Update from above
* gas/testsuite/gas/tic4x/opcodes_c4x.d: Update from above
* gas/testsuite/gas/tic4x/opcodes_new.d: Added new testsuite for
the enhanced and special insns.
* gas/testsuite/gas/tic4x/tic4x.exp: Added the opcodes_new testsuite
* include/opcode/tic4x.h: File reordering. Added enhanced opcodes.
* opcodes/tic4x-dis.c: Added support for enhanced and special
insn.
(c4x_print_op): Added insn class 'i' and 'j'
(c4x_hash_opcode_special): Add to support special insn
(c4x_hash_opcode): Update to support the new opcode-list
format. Add support for the new special insns.
(c4x_disassemble): New opcode-list support.
2002-11-18 09:09:34 +00:00
6a1c5a0395
2002-11-16 Klee Dienes <kdienes@apple.com>
...
* opcode/m88k.h (INSTAB): Remove 'next' field.
(instruction): Remove definition; replace with extern declaration
and mark as const.
W
2002-11-16 18:43:03 +00:00
dab41351ea
* gas/config/tc-tic4x.c: Remove c4x_pseudo_ignore function.
...
(c4x_operands_match): Added check for 8-bits LDF insn. Give
warning when using constant direct bigger than 2^16. Add the new
arguments.
* include/opcode/tic4x.h: Major rewrite of entire file. Define
instruction classes, and put each instruction into a class.
* opcodes/tic4x-dis.c: (c4x_print_op): Add support for the new
argument format. Fix bug in 'N' register printer.
2002-11-16 12:23:23 +00:00
69920bb5bd
Add --enable-auto-import extension.
2002-11-14 18:03:17 +00:00
bc612556a8
gas tic4x target enhancements (long list - see gas/ChangeLog and
...
include/ChangeLog)
2002-11-11 14:29:01 +00:00
aaa7b02155
merge from gcc
2002-10-27 01:02:05 +00:00
238c78807d
merge from gcc
2002-10-27 01:01:04 +00:00
7583434335
merge from gcc
2002-10-25 00:01:55 +00:00
6b67d752cc
merge from gcc
2002-10-16 13:47:35 +00:00
ad1d049af9
* cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
2002-10-14 10:55:14 +00:00
95a962432f
* sh.h: Add SH TLS relocs.
2002-10-11 14:36:03 +00:00
00a8c44a5b
Fix date in last commit.
2002-09-30 12:08:05 +00:00
bf42f57df6
[include/opcode/]
...
* mips.h: Update comment for new opcodes.
(OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
(OP_MASK_VECALIGN, OP_SH_VECALIGN): New.
(INSN_4111, INSN_4120, INSN_5400, INSN_5500): New.
(CPU_VR4120, CPU_VR5400, CPU_VR5500): New.
(OPCODE_IS_MEMBER): Handle the new CPU_* values and INSN_* flags.
Don't match CPU_R4111 with INSN_4100.
[opcodes/]
* mips-dis.c (print_insn_arg): Handle '[', ']', 'e' and '%'.
(mips_isa_type): Handle bfd_mach_mips4120, bfd_mach_mips5400
and bfd_mach_mips5500.
* mips-opc.c (V1): Include INSN_4111 and INSN_4120.
(N411, N412, N5, N54, N55): New convenience defines.
(mips_builtin_opcodes): Add vr4120, vr5400 and vr5500 opcodes.
Change dmadd16 and madd16 from V1 to N411.
2002-09-30 11:58:09 +00:00
3342a2e928
[include/elf]
...
* mips.h (E_MIPS_MACH_4120, E_MIPS_MACH_5400, E_MIPS_MACH_5500): New.
[bfd/]
* archures.c (bfd_mach_mips4120, bfd_mach_mips5400): New.
(bfd_mach_mips5500): New.
* cpu-mips.c (I_mips4120, I_mips5400, I_mips5500): New.
(arch_info_struct): Add corresponding entries here.
* elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_4120,
E_MIPS_MACH_5400 and E_MIPS_MACH_5500.
(_bfd_mips_elf_final_write_processing): Handle bfd_mach_mips4120,
bfd_mach_mips5400 and bfd_mach_mips5500.
(_bfd_mips_elf_mach_extends_p): New function.
(_bfd_mips_elf_merge_private_bfd_data): Use it to help merge
the EF_MIPS_MACH flags.
* bfd-in2.h: Regenerate.
2002-09-30 11:53:55 +00:00
8921a7a7a3
bfd/
...
* reloc.c: Add x86-64 TLS relocs.
* bfd-in2.h, libbfd.h: Rebuilt.
* elf64-x86-64.c (x86_64_elf_howto): Fix size fields for 32-bit
relocs. Add TLS relocs.
(x86_64_reloc_map): Add TLS relocs.
(elf64_x86_64_info_to_howto): Adjust for added TLS relocs.
(struct elf64_x86_64_link_hash_entry): Add tls_type field.
(GOT_UNKNOWN, GOT_NORMAL, GOT_TLS_GD, GOT_TLS_IE): Define.
(elf64_x86_64_hash_entry): Define.
(struct elf64_x86_64_obj_tdata): New.
(elf64_x86_64_tdata, elf64_x86_64_local_got_tls_type): Define.
(struct elf64_x86_64_link_hash_table): Add tls_ld_got.
(link_hash_newfunc): Initialize tls_type.
(elf64_x86_64_link_hash_table_create): Initialize tls_ld_got.
(elf64_x86_64_copy_indirect_symbol): Swap tls_type if necessary.
(elf64_x86_64_mkobject): New.
(elf64_x86_64_elf_object_p): Allocate struct elf64_x86_64_obj_tdata.
(elf64_x86_64_tls_transition): New.
(elf64_x86_64_check_relocs): Add r_type variable and use it.
Handle TLS relocs.
(elf64_x86_64_gc_sweep_hook): Handle TLS relocs.
(allocate_dynrelocs): Allocate GOT space for TLS relocs.
(elf64_x86_64_size_dynamic_sections): Likewise.
(dtpoff_base, tpoff): New.
(elf64_x86_64_relocate_section): Handle TLS relocs.
(elf64_x86_64_finish_dynamic_symbol): Only handle non-TLS GOT
entries.
(bfd_elf64_mkobject): Define.
* elf32-i386.c (elf_i386_check_relocs) [R_386_TLS_LE]: Set
DF_STATIC_TLS if shared.
gas/
* config/tc-i386.c (tc_i386_fix_adjustable): Add x86-64 TLS relocs.
Define them if not BFD_ASSEMBLER.
(lex_got): Handle @tlsgd, @dtpoff and @tpoff in 64-bit mode, add
@tlsld.
(md_apply_fix3): No addend for BFD_RELOC_X86_64_TLSGD,
BFD_RELOC_X86_64_TLSLD and BFD_RELOC_X86_64_GOTTPOFF.
(tc_gen_reloc): Handle x86-64 TLS relocs.
include/
* elf/x86-64.h: Add TLS relocs.
ld/testsuite/
* lib/ld-lib.exp (run_ld_link_tests): Add.
* ld-sh/sh64/sh64.exp (run_ld_link_tests, regexp_diff,
file_contents): Remove.
(sh64tests): Add 6th field to the tests array.
* ld-i386/i386.exp (run_ld_link_tests): Remove.
* ld-x86-64/x86-64.exp: New.
* ld-x86-64/tlsbin.dd: New test.
* ld-x86-64/tlsbinpic.s: New test.
* ld-x86-64/tlsbin.rd: New test.
* ld-x86-64/tlsbin.s: New test.
* ld-x86-64/tlsbin.sd: New test.
* ld-x86-64/tlsbin.td: New test.
* ld-x86-64/tlslib.s: New test.
* ld-x86-64/tlspic1.s: New test.
* ld-x86-64/tlspic2.s: New test.
* ld-x86-64/tlspic.dd: New test.
* ld-x86-64/tlspic.rd: New test.
* ld-x86-64/tlspic.sd: New test.
* ld-x86-64/tlspic.td: New test.
2002-09-27 19:29:16 +00:00
39bd4d5016
2002-09-26 Andrew Cagney <ac131313@redhat.com>
...
* regs/: Delete directory.
2002-09-26 19:40:29 +00:00
0226921e1d
* libiberty.h (asprintf, vasprintf): Don't declare them if the
...
corresponding HAVE_DECL_ macro is 1.
2002-09-20 00:21:58 +00:00
0688e43db7
bfd/
...
* reloc.c (BFD_RELOC_386_TLS_TPOFF, BFD_RELOC_386_TLS_IE,
BFD_RELOC_386_TLS_GOTIE): Add.
* bfd-in2.h, libbfd.h: Rebuilt.
* elf32-i386.c (elf_howto_table): Add R_386_TLS_TPOFF, R_386_TLS_IE
and R_386_TLS_GOTIE.
(elf_i386_reloc_type_lookup): Handle it.
(struct elf_i386_link_hash_entry): Change tls_type type to unsigned
char instead of enum, change GOT_* into defines.
(GOT_TLS_IE_POS, GOT_TLS_IE_NEG, GOT_TLS_IE_BOTH): Define.
(elf_i386_tls_transition): Handle R_386_TLS_IE and R_386_TLS_GOTIE.
(elf_i386_check_relocs): Likewise. Avoid crash if local symbol is
accessed both as normal and TLS symbol. Move R_386_TLS_LDM and
R_386_PLT32 cases so that R_386_TLS_IE can fall through.
Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs.
(elf_i386_gc_sweep_hook): Handle R_386_TLS_IE and R_386_TLS_GOTIE.
Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs.
(allocate_dynrelocs): Allocate 2 .got and 2 .rel.got entries if
tls_type is GOT_TLS_IE_BOTH.
(elf_i386_size_dynamic_sections): Likewise.
(elf_i386_relocate_section): Handle R_386_TLS_IE and R_386_TLS_GOTIE.
Handle R_386_TLS_LE_32 and R_386_TLS_LE in shared libs.
(elf_i386_finish_dynamic_symbol): Use tls_type & GOT_TLS_IE to catch
all 4 GOT_TLS_* TLS types.
gas/
* config/tc-i386.c (tc_i386_fix_adjustable): Handle
BFD_RELOC_386_TLS_IE and BFD_RELOC_386_TLS_GOTIE.
(BFD_RELOC_386_TLS_IE, BFD_RELOC_386_TLS_GOTIE): Define to 0
if not defined.
(lex_got): Handle @GOTNTPOFF and @INDNTPOFF.
(md_apply_fix3, tc_gen_reloc): Handle BFD_RELOC_386_TLS_IE and
BFD_RELOC_386_TLS_GOTIE.
gas/testsuite/
* gas/i386/tlspic.s: Add tests.
* gas/i386/tlspic.d: Regenerated.
* gas/i386/tlsnopic.s: Add tests.
* gas/i386/tlsnopic.d: Regenerated.
include/
* elf/i386.h (R_386_TLS_TPOFF, R_386_TLS_IE, R_386_TLS_GOTIE):
Define.
ld/testsuite/
* ld-i386/i386.exp: New.
* ld-i386/tlsbin.dd: New test.
* ld-i386/tlsbinpic.s: New test.
* ld-i386/tlsbin.rd: New test.
* ld-i386/tlsbin.s: New test.
* ld-i386/tlsbin.sd: New test.
* ld-i386/tlsbin.td: New test.
* ld-i386/tlslib.s: New test.
* ld-i386/tlsnopic1.s: New test.
* ld-i386/tlsnopic2.s: New test.
* ld-i386/tlsnopic.dd: New test.
* ld-i386/tlsnopic.rd: New test.
* ld-i386/tlsnopic.sd: New test.
* ld-i386/tlspic1.s: New test.
* ld-i386/tlspic2.s: New test.
* ld-i386/tlspic.dd: New test.
* ld-i386/tlspic.rd: New test.
* ld-i386/tlspic.sd: New test.
* ld-i386/tlspic.td: New test.
2002-09-19 19:01:18 +00:00
20775b213d
Remove (errant) trailing semicolon (;) from the extern "C" { } declaration.
2002-09-19 15:48:16 +00:00
a7d222032b
Handle DW_OP_GNU_push_tls_address.
...
Synch up with the gcc's dwarf2.h
2002-09-12 10:35:53 +00:00
c309557a9f
Have objdump's --help switch document PPC -M options.
2002-09-04 10:08:07 +00:00
edb983c141
Add linker relaxation to v850 toolchain
2002-08-29 06:49:35 +00:00
9114ed2c29
Add TMS320C4x support
2002-08-28 10:38:49 +00:00
8d16a989fb
2002-08-19 Elena Zannoni <ezannoni@redhat.com>
...
From matthew green <mrg@redhat.com>
* ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
instructions.
(PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
e500x2 Integer select, branch locking, performance monitor,
cache locking and machine check APUs, respectively.
(PPC_OPCODE_EFS): New opcode type for efs* instructions.
(PPC_OPCODE_CLASSIC): New opcode type for Classic PowerPC instructions.
2002-08-19 20:55:48 +00:00
bc314c9ef1
* i370.h: Define relocs using reloc-macros.h.
2002-08-15 12:19:14 +00:00
c182cc28a5
* m68hc11.h (M6812_OP_PAGE): Define to identify call operand.
...
(M68HC12_BANK_VIRT, M68HC12_BANK_MASK, M68HC12_BANK_BASE,
M68HC12_BANK_SHIFT, M68HC12_BANK_PAGE_MASK): Define for 68HC12
memory banks.
(M6811_OC1M5, M6811_OC1M4, M6811_MODF): Fix value.
2002-08-13 19:00:40 +00:00
9b6947db55
* m68hc11.h (E_M68HC12_BANKS, E_M68HC11_I32, E_M68HC11_F64,
...
EF_M68HC11_ABI): Define for ABI specification.
(STO_M68HC12_FAR, STO_M68HC12_INTERRUPT): Symbol flags for
linker and debugger.
(R_M68HC11_24, R_M68HC11_LO16, R_M68HC11_PAGE): New relocs.
(R_M68HC11_RL_JUMP, R_M68HC11_RL_GROUP): New reloc for linker
relaxation.
2002-08-13 13:02:25 +00:00
0cd737305b
Check symbols with undefine version.
2002-08-08 03:50:17 +00:00
3874ac637c
Fix typo.
2002-08-01 12:16:36 +00:00
df28dc05d4
Add new field to bfd_link structure and use it to control how common symbols
...
are extracted from archives.
2002-07-31 12:50:07 +00:00
bda7fbff48
sim-h8300.h: Rename all enums from H8300_ to SIM_H8300_
2002-07-29 16:57:18 +00:00
1ceb2460db
* opcode/mips.h (CPU_R2000): Remove.
2002-07-25 09:44:39 +00:00
15d0d6bd1e
sim-h8300.h new file
2002-07-23 10:30:14 +00:00
bd36eb7f62
Add IP2k GAS and OPCODES support.
2002-07-19 07:52:39 +00:00
30a431abf1
Index: sim/common/ChangeLog
...
2002-07-17 Andrew Cagney <cagney@redhat.com>
* run-sim.h: Add #ifdef RUN_SIM_H wrapper.
(sim_set_callbacks, sim_size, sim_trace)
(sim_set_trace, sim_set_profile_size, sim_kill): Declare. Moved
to here from "gdb/remote-sim.h".
Index: include/gdb/ChangeLog
2002-07-17 Andrew Cagney <cagney@redhat.com>
* remote-sim.h: Update copyright.
(sim_set_callbacks, sim_size, sim_trace)
(sim_set_trace, sim_set_profile_size, sim_kill): Delete. Moved to
"sim/common/run-sim.h".
2002-07-17 21:20:09 +00:00
014e330992
include/gdb:
...
* sim-sh.h: Add enum constants for sh[1-4], sh3e, sh3?-dsp,
renumbering the sh-dsp registers to use distinct numbers.
sim/sh:
* Makefile.in (interp.o): Depend on $(srcroot)/include/gdb/sim-sh.h.
* interp.c: Include "gdb/sim-sh.h".
(sim_store_register, sim_fetch_register): Use constants defined there.
gdb:
* sh-tdep.c (sh_dsp_register_sim_regno): New function.
(sh_gdbarch_init): Use it for sh-dsp.
2002-07-17 18:43:26 +00:00
e8c02edb9a
oops - omitted from previous delta
2002-07-17 14:18:37 +00:00
ff21dc0ea5
Add IP2k support to BFD and LD
2002-07-17 14:15:50 +00:00
ef8c6116b3
* readelf.c (get_dynamic_type): Handle DT_GNU_PRELINKED,
...
DT_GNU_CONFLICT* and DT_GNU_LIBLISZ*.
(get_section_type_name): Handle SHT_GNU_LIBLIST.
(process_dynamic_segment): Handle DT_GNU_CONFLICTSZ,
DT_GNU_LIBLISTSZ and DT_GNU_PRELINKED.
(process_gnu_liblist): New.
(process_file): Call it.
* elf/common.h (SHT_GNU_LIBLIST, DT_GNU_PRELINKED,
DT_GNU_CONFLICT*, DT_GNU_LIBLIST*): Define.
2002-07-10 15:28:34 +00:00
5051ed270c
* config/tc-mips.c (macro_build): Handle MIPS16 insns.
...
(mips_ip): Likewise.
* mips.h (INSN_MIPS16): New define.
* mips-dis.c (mips_isa_type): Add MIPS16 insn handling.
* mips-opc.c (I16): New define.
(mips_builtin_opcodes): Make jalx an I16 insn.
2002-07-09 14:21:40 +00:00
23c3a85872
gas/ChangeLog
...
* config/tc-i386.c (process_suffix): Remove intel mode movsx and
movzx fudges.
(md_assemble): Instead, zap the suffix here.
include/opcode/ChangeLog
* i386.h: Remove IgnoreSize from movsx and movzx.
2002-07-08 10:03:11 +00:00
cc81f456ac
typo fix
2002-07-01 23:47:10 +00:00
ef9647e524
include/elf:
...
2002-07-01 Matt Thomas <matt@3am-software.com>
* Rename EF_* to EF_VAX_*.
bfd:
2002-07-01 Matt Thomas <matt@3am-software.com>
* elf32-vax.c (elf32_vax_print_private_bfd_data): Change EF_*
to EF_VAX_*.
binutils:
2002-07-01 Matt Thomas <matt@3am-software.com>
* readelf.c: Include "elf/vax.h".
(guess_is_rela): Move EM_VAX from unknown to RELA case.
(dump_relocations): Handle VAX relocations.
(get_machine_flags): Handle VAX machine flags.
2002-07-01 16:43:38 +00:00
dad0a75b0e
* bfdlink.h (struct bfd_sym_chain): Declare.
...
(struct bfd_link_info): Add gc_sym_list. Formatting fixes.
2002-07-01 08:04:47 +00:00
0fa276e1d5
merge from gcc
2002-06-25 01:03:52 +00:00
caaac2d1f4
merge from gcc
2002-06-24 17:39:28 +00:00
7ed77745fc
2002-06-18 Dave Brolley <brolley@redhat.com>
...
From Catherine Moore:
* dis-asm.h (print_insn_frv): New prototype.
2002-06-18 21:16:32 +00:00
1b1dbc6720
2002-06-18 Dave Brolley <brolley@redhat.com>
...
From Catherine Moore, Michael Meissner, Dave Brolley:
* common.h (EM_CYGNUS_FRV): New macro.
* frv.h: New file.
2002-06-18 21:15:57 +00:00
40a95e4b23
* sim-arm.h (enum sim_arm_regs): Rename sim_arm_regnum.
2002-06-15 22:49:38 +00:00
65826b61a9
Add the file include/gdb/sim-arm.h defining an enum that specifies the
...
register numbering used by the GDB<->SIM interface.
2002-06-12 21:19:42 +00:00
a1178695fc
Move include/callback.h and include/remote-sim.h to include/gdb/.
...
Update accordingly.
2002-06-09 15:45:44 +00:00
bdc9d6f5bf
* a29k.h: Replace CONST with const.
...
(CONST): Don't define.
* convex.h: Replace CONST with const.
(CONST): Don't define.
* dlx.h: Replace CONST with const.
* or32.h (CONST): Don't define.
2002-06-08 07:32:12 +00:00
f43a747271
Enable pei386_auto_import by default. Only print a info message about auto
...
imports being resilved if this feature was not requested via a command line
switch.
2002-06-07 14:56:01 +00:00
a81cc3be2a
merge from gcc
2002-06-06 12:55:14 +00:00
ea6a35f68a
* common.h: Change registry@sco.com to registry@caldera.com.
...
(EM_PDP10, EM_PDP11): Define.
2002-06-06 09:59:38 +00:00
372e3e53ba
bfd/
...
* Makefile.am (BFD32_BACKENDS): Add elf32-sh64-com.lo.
(BFD32_BACKENDS_CFILES): Add elf32-sh64-com.c.
(elf32-sh64-com.lo): New dependency list.
* Makefile.in: Regenerate.
* configure.in (bfd_elf32_sh64_vec, bfd_elf32_sh64l_vec)
(bfd_elf32_sh64nbsd_vec, bfd_elf32_sh64lnbsd_vec): Add
elf32-sh64-com.lo.
* configure: Regenerate.
* elf32-sh64.c (sh64_address_in_cranges)
(sh64_get_contents_type, sh64_address_is_shmedia): Move to...
(crange_qsort_cmpb, crange_qsort_cmpl, crange_bsearch_cmpb):
(crange_bsearch_cmpl): Prepend _bfd_sh64_ to name and move to...
* elf32-sh64-com.c: ...here. New file.
include/elf/
* sh.h (_bfd_sh64_crange_qsort_cmpb, _bfd_sh64_crange_qsort_cmpl)
(_bfd_sh64_crange_bsearch_cmpb, _bfd_sh64_crange_bsearch_cmpl): New
prototypes.
2002-06-05 01:50:42 +00:00
415f62a72c
include/elf/
...
* alpha.h (LITUSE_ALPHA_ADDR, LITUSE_ALPHA_BASE, LITUSE_ALPHA_BYTOFF,
LITUSE_ALPHA_JSR, LITUSE_ALPHA_TLSGD, LITUSE_ALPHA_TLSLDM): New.
gas/
* config/tc-alpha.c: Move LITUSE constants to "elf/alpha.h".
Rename them LITUSE_ALPHA_*.
bfd/
* elf64-alpha.c (alpha_get_dtprel_base, alpha_get_tprel_base): New.
(elf64_alpha_relocate_section): Use them. Reject LE TLS relocs
in shared libraries. Fix DTPRELHI and TPRELHI value.
(INSN_ADDQ, INSN_RDUNIQ): New.
(struct alpha_relax_info): Add symtab_hdr, tls_segment, first_gotent.
(elf64_alpha_relax_with_lituse): Return boolean. Remove irelend
argument. Reject dynamic symbols. Use LITUSE symbolic constants.
(elf64_alpha_relax_got_load): Rename from relax_without_lituse.
Handle GOTDTPREL and GOTTPREL relocations.
(elf64_alpha_relax_gprelhilo): New.
(elf64_alpha_relax_tls_get_addr): New.
(elf64_alpha_relax_find_tls_segment): New.
(elf64_alpha_relax_section): Handle TLS relocations.
(ALPHA_ELF_LINK_HASH_TLS_IE): New.
(elf64_alpha_check_relocs): Set it.
2002-06-02 02:28:45 +00:00
84c32f5906
Fill-out d10v enum so that there are no ``=''.
2002-06-01 18:15:42 +00:00
83c68626df
2002-05-31 Michal Ludvig <mludvig@suse.cz>
...
* elf/dwarf2.h (DW_CFA_low_user, DW_CFA_high_user): Renamed
to DW_CFA_lo_user, DW_CFA_hi_user respectively.
2002-05-31 15:28:33 +00:00
81a0a3b440
[ gas/ChangeLog ]
...
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* config/tc-mips.c (mips_set_options): New "ase_mdmx" member.
(mips_opts): Initialize "ase_mdmx" member.
(file_ase_mdmx): New variable.
(CPU_HAS_MDMX): New macro.
(md_begin): Initialize mips_opts.ase_mdmx and file_ase_mdmx
based on command line options and configuration defaults.
(macro_build): Note in comment that use of MDMX in macros is
not currently allowed.
(validate_mips_insn): Add support for the "O", "Q", "X", "Y", and
"Z" MDMX operand types.
(mips_ip): Accept MDMX instructions if mips_opts.ase_mdmx is set,
and add support for the "O", "Q", "X", "Y", and "Z" MDMX operand
types.
(OPTION_MDMX, OPTION_NO_MDMX, md_longopts, md_parse_option):
Add support for "-mdmx" and "-no-mdmx" options.
(OPTION_ELF_BASE): Move to accomodate new options.
(s_mipsset): Support ".set mdmx" and ".set nomdmx".
(mips_elf_final_processing): Set MDMX ASE ELF header flag if
file_ase_mdmx was set.
* doc/as.texinfo: Document -mdmx and -no-mdmx options.
* doc/c-mips.texi: Likewise, and document ".set mdmx" and ".set
nomdmx" directives.
[ gas/testsuite/ChangeLog ]
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
* gas/mips/mips64-mdmx.s: New file.
* gas/mips/mips64-mdmx.d: Likewise.
* gas/mips/mips.exp: Run new "mips64-mdmx" test.
[ include/opcode/ChangeLog ]
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
* mips.h (OP_SH_ALN, OP_MASK_ALN, OP_SH_VSEL, OP_MASK_VSEL)
(MDMX_FMTSEL_IMM_QH, MDMX_FMTSEL_IMM_OB, MDMX_FMTSEL_VEC_QH)
(MDMX_FMTSEL_VEC_OB, INSN_READ_MDMX_ACC, INSN_WRITE_MDMX_ACC)
(INSN_MDMX): New constants, for MDMX support.
(opcode character list): Add "O", "Q", "X", "Y", and "Z" for MDMX.
[ opcodes/ChangeLog ]
2002-05-30 Chris G. Demetriou <cgd@broadcom.com>
Ed Satterthwaite <ehs@broadcom.com>
* mips-dis.c (print_insn_arg): Add support for 'O', 'Q', 'X', 'Y',
and 'Z' formats, for MDMX.
(mips_isa_type): Add MDMX instructions to the ISA
bit mask for bfd_mach_mipsisa64.
* mips-opc.c: Add support for MDMX instructions.
(MX): New definition.
* mips-dis.c: Update copyright years to include 2002.
2002-05-31 01:17:17 +00:00
53e05aecc1
include/elf/
...
* alpha.h (R_ALPHA_TLSGD, R_ALPHA_TLSLDM, R_ALPHA_DTPMOD64,
R_ALPHA_GOTDTPREL, R_ALPHA_DTPREL64, R_ALPHA_DTPRELHI,
R_ALPHA_DTPRELLO, R_ALPHA_DTPREL16, R_ALPHA_GOTTPREL, R_ALPHA_TPREL64,
R_ALPHA_TPRELHI, R_ALPHA_TPRELLO, R_ALPHA_TPREL16): New.
bfd/
* elf64-alpha.c (ALPHA_ELF_LINK_HASH_LU_TLSGD,
ALPHA_ELF_LINK_HASH_LU_TLSLDM, ALPHA_ELF_LINK_HASH_LU_FUNC): New.
(ALPHA_ELF_GOT_ENTRY_RELOCS_DONE): Remove.
(ALPHA_ELF_GOT_ENTRY_RELOCS_XLATED): Remove.
(struct alpha_elf_got_entry): Add reloc_type, reloc_done, reloc_xlated.
(struct alpha_elf_obj_tdata): Rename total_got_entries and
n_local_got_entries to total_got_size and local_got_size.
(elf64_alpha_howto, elf64_alpha_reloc_map): Update for TLS relocs.
(alpha_got_entry_size): New.
(elf64_alpha_relax_with_lituse): Use it.
(elf64_alpha_relax_without_lituse): Likewise.
(MAX_GOT_SIZE): Rename from MAX_GOT_ENTRIES.
(get_got_entry): New.
(elf64_alpha_check_relocs): Handle TLS relocs. Reorganize.
(elf64_alpha_adjust_dynamic_symbol): Test LU_FUNC as a mask.
(elf64_alpha_merge_ind_symbols): Check gotent->reloc_type.
(elf64_alpha_can_merge_gots, elf64_alpha_merge_gots): Likewise.
(elf64_alpha_calc_got_offsets_for_symbol): Use alpha_got_entry_size.
(elf64_alpha_calc_got_offsets): Likewise.
(alpha_dynamic_entries_for_reloc): New.
(elf64_alpha_calc_dynrel_sizes): Use it.
(elf64_alpha_size_dynamic_sections): Likewise.
(elf64_alpha_relocate_section): Handle TLS relocations.
* reloc.c: Add Alpha TLS relocations.
* bfd-in2.h, libbfd.h: Rebuild.
gas/
* expr.h (operatorT): Add O_md17..O_md32.
* config/tc-alpha.c (O_lituse_tlsgd, O_lituse_tlsldm, O_tlsgd,
O_tlsldm, O_gotdtprel, O_dtprelhi, O_dtprello, O_dtprel, O_gottprel,
O_tprelhi, O_tprello, O_tprel): New.
(USER_RELOC_P, alpha_reloc_op_tag, debug_exp): Include them.
(DUMMY_RELOC_LITUSE_TLSGD, DUMMY_RELOC_LITUSE_TLSLDM): New.
(LITUSE_TLSGD, LITUSE_TLSLDM): New.
(struct alpha_reloc_tag): Add master, saw_tlsgd, saw_tlsld,
saw_lu_tlsgd, saw_lu_tlsldm. Make multi_section_p a bit field.
(md_apply_fix3): Handle TLS relocations.
(alpha_force_relocation, alpha_fix_adjustable): Likewise.
(alpha_adjust_symtab_relocs): Sort LITERAL relocs after the
associated TLS reloc. Check lituse_tls relocs match up.
(emit_insn): Handle TLS relocations.
(ldX_op): Remove.
gas/testsuite/
* gas/alpha/elf-tls-1.s, gas/alpha/elf-tls-1.d: New.
* gas/alpha/elf-tls-2.s, gas/alpha/elf-tls-1.l: New.
* gas/alpha/elf-tls-3.s, gas/alpha/elf-tls-1.l: New.
* gas/alpha/alpha.exp: Run them.
2002-05-30 22:01:38 +00:00
0dc5d498a0
2002-05-29 Matt Thomas <matt@3am-software.com>
...
* vax.h: New file
2002-05-30 01:43:48 +00:00
f542ad4e14
Add DLX target
2002-05-28 14:08:26 +00:00
40a4eb7300
* ia64.h: Use #include "" instead of <> for local header files.
...
* sparc.h: Likewise.
2002-05-25 12:53:48 +00:00
bb2b4dedc6
* sim-d10v.h: Delete file. Moved to include/gdb/.
...
* sim-d10v.h: New file. Moved from include/sim-d10v.h.
* Makefile.in (INCLUDE): Add "gdb/sim-d10v.h".
* interp.c: Include "gdb/sim-d10v.h" instead of "sim-d10v.h".
* d10v-tdep.c: Include "gdb/sim-d10v.h" instead of "sim-d10v.h".
* Makefile.in (sim_d10v_h): Update definition.
2002-05-24 00:12:18 +00:00
7078175474
* elf.c (_bfd_elf_make_section_from_shdr): Set SEC_THREAD_LOCAL
...
for symbols from SHF_TLS section.
(_bfd_elf_print_private_bfd_data): Add PT_TLS.
(elf_fake_sections): Set SHF_TLS for SEC_THREAD_LOCAL sections.
(map_sections_to_segments): Build PT_TLS segment if necessary.
(assign_file_positions_for_segments): Likewise.
(get_program_header_size): Account for PT_TLS segment.
(swap_out_syms): Set type of BSF_THREAD_LOCAL symbols and symbols from
SEC_THREAD_LOCAL sections to STT_TLS.
* reloc.c: Add 386 and IA-64 TLS relocs.
* section.c (SEC_THREAD_LOCAL): Define.
(SEC_CONSTRUCTOR_TEXT, SEC_CONSTRUCTOR_DATA, SEC_CONSTRUCTOR_BSS):
Remove.
* elflink.h (elf_link_add_object_symbols): Support .tcommon.
(size_dynamic_sections): If DF_STATIC_TLS, set DF_FLAGS
unconditionally.
(struct elf_final_link_info): Add first_tls_sec.
(elf_bfd_final_link): Set first_tls_sec.
Compute elf_hash_table (info)->tls_segment.
(elf_link_output_extsym): Handle STT_TLS symbols.
(elf_link_input_bfd): Likewise.
* syms.c (BSF_THREAD_LOCAL): Define.
* bfd-in2.h: Rebuilt.
* libbfd.h: Rebuilt.
* elf32-i386.c (elf_i386_tls_transition, dtpoff_base, tpoff,
elf_i386_mkobject, elf_i386_object_p): New functions.
(elf_howto_table): Add TLS relocs.
(elf_i386_reloc_type_lookup): Support TLS relocs.
(elf_i386_info_to_howto_rel): Likewise.
(struct elf_i386_link_hash_entry): Add tls_type.
(struct elf_i386_obj_tdata): New.
(elf_i386_hash_entry, elf_i386_tdata, elf_i386_local_got_tls_type):
New macros.
(struct elf_i386_link_hash_table): Add tls_ldm_got.
(link_hash_newfunc): Clear tls_type.
(elf_i386_check_relocs): Support TLS relocs.
(elf_i386_gc_sweep_hook): Likewise.
(allocate_dynrelocs): Likewise.
(elf_i386_size_dynamic_sections): Likewise.
(elf_i386_relocate_section): Likewise.
(elf_i386_finish_dynamic_symbol): Likewise.
(bfd_elf32_mkobject, elf_backend_object_p): Define.
* elfxx-ia64.c (struct elfNN_ia64_dyn_sym_info): Add tprel_offset,
dtpmod_offset, dtprel_offset, tprel_done, dtpmod_done, dtprel_done,
want_tprel, want_dtpmod, want_dtprel.
(elfNN_ia64_tprel_base, elfNN_ia64_dtprel_base): New functions.
(ia64_howto_table): Add TLS relocs, rename R_IA64_LTOFF_TP22 to
R_IA64_LTOFF_TPREL22.
(elf_code_to_howto_index): Add TLS relocs.
(elfNN_ia64_check_relocs): Support TLS relocs.
(allocate_global_data_got): Account for TLS .got data.
(allocate_dynrel_entries): Account for TLS dynamic relocations.
(elfNN_ia64_install_value): Supprt TLS relocs.
(set_got_entry): Support TLS relocs.
(elfNN_ia64_relocate_section): Likewise.
* config/obj-elf.c (elf_common): Renamed from obj_elf_common.
(obj_elf_common): Call elf_common.
(obj_elf_tls_common): New function.
(elf_pseudo_tab): Support .tls_common.
(special_sections): Add .tdata and .tbss.
(obj_elf_change_section): Set SEC_THREAD_LOCAL for SHF_TLS
sections.
(obj_elf_parse_section_letters): Support T in section flags (SHF_TLS).
(obj_elf_parse_section_letters): Include T in error message.
* config/tc-ppc.c (ppc_section_letter): Likewise.
* config/tc-alpha.c (alpha_elf_section_letter): Likewise.
(tc_gen_reloc): Handle SEC_THREAD_LOCAL the same way as
SEC_MERGE.
* config/tc-sparc.c (md_apply_fix3): Likewise.
* config/tc-i386.c (tc_i386_fix_adjustable): Add TLS relocs.
Define them if not BFD_ASSEMBLER.
(lex_got): Support @TLSGD, @TLSLDM, @GOTTPOFF, @TPOFF, @DTPOFF
and @NTPOFF.
(md_apply_fix3): Add TLS relocs.
* config/tc-ia64.c (enum reloc_func): Add FUNC_DTP_MODULE,
FUNC_DTP_RELATIVE, FUNC_TP_RELATIVE, FUNC_LT_DTP_MODULE,
FUNC_LT_DTP_RELATIVE, FUNC_LT_TP_RELATIVE.
(pseudo_func): Support @dtpmod(), @dtprel() and @tprel().
(ia64_elf_section_letter): Include T in error message.
(md_begin): Support TLS operators.
(md_operand): Likewise.
(ia64_gen_real_reloc_type): Support TLS relocs.
* testsuite/gas/i386/tlspic.s: New file.
* testsuite/gas/i386/tlsd.s: New file.
* testsuite/gas/i386/tlsnopic.s: New file.
* testsuite/gas/i386/tlsd.d: New file.
* testsuite/gas/i386/tlsnopic.d: New file.
* testsuite/gas/i386/tlspic.d: New file.
* testsuite/gas/i386/i386.exp: Add tlsd, tlsnopic and tlspic tests.
* testsuite/gas/ia64/tls.s: New file.
* testsuite/gas/ia64/tls.d: New file.
* testsuite/gas/ia64/ia64.exp: Add tls test.
* write.c (adjust_reloc_syms): Don't change symbols in
SEC_THREAD_LOCAL sections to STT_SECTION + addend.
* elf/common.h (PT_TLS, SHF_TLS, STT_TLS, DF_STATIC_TLS): Define.
* elf/ia64.h (R_IA64_LTOFF_TPREL22): Renamed from R_IA64_LTOFF_TP22.
* elf/i386.h: Add TLS relocs.
* scripttempl/elf.sc: Add .rel{,a}.t{bss,data}, .tdata and .tbss.
* ldlang.c (lang_add_section): Set SEC_THREAD_LOCAL for
output section if necessary. Handle .tbss.
(lang_size_sections): Clear _raw_size for .tbss section
(it allocates space in PT_TLS segment only).
* ldwrite.c (build_link_order): Build link order for .tbss too.
* readelf.c (get_segment_type): Add PT_TLS.
(get_elf_section_flags): Add SHF_TLS.
(get_dynamic_flags): Optimize. Add DF_STATIC_TLS.
(process_dynamic_segment): Use puts instead of printf.
(get_symbol_type): Support STT_TLS.
* objdump.c (dump_section_header): Remove SEC_CONSTRUCTOR_TEXT,
SEC_CONSTRUCTOR_DATA, SEC_CONSTRUCTOR_BSS.
Add SEC_THREAD_LOCAL.
2002-05-23 13:12:52 +00:00
328001eea6
2002-05-21 H.J. Lu (hjl@gnu.org)
...
* bfdlink.h (bfd_link_info): Add allow_multiple_definition.
2002-05-22 05:07:20 +00:00
c069bf59c3
? gas/testsuite/gas/mips/rol64.d
...
? gas/testsuite/gas/mips/rol64.s
Index: gas/ChangeLog
===================================================================
RCS file: /cvs/src/src/gas/ChangeLog,v
retrieving revision 1.1334
diff -u -p -r1.1334 ChangeLog
--- gas/ChangeLog 21 May 2002 20:01:51 -0000 1.1334
+++ gas/ChangeLog 21 May 2002 23:32:51 -0000
@@ -1,3 +1,8 @@
+2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+ * config/tc-mips.c (macro2): Add 64 bit drol, dror macros.
+ Optimize the rotate by zero case.
+
2002-05-21 Nick Clifton <nickc@cambridge.redhat.com>
* configure.in: Remove accidental enabling of bfd_gas=yes for
Index: gas/config/tc-mips.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-mips.c,v
retrieving revision 1.123
diff -u -p -r1.123 tc-mips.c
--- gas/config/tc-mips.c 14 May 2002 23:35:59 -0000 1.123
+++ gas/config/tc-mips.c 21 May 2002 23:32:52 -0000
@@ -6686,6 +6686,17 @@ macro2 (ip)
--mips_opts.noreorder;
break;
+ case M_DROL:
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu",
+ "d,v,t", AT, 0, treg);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv",
+ "d,t,s", AT, sreg, AT);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv",
+ "d,t,s", dreg, sreg, treg);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+ "d,v,t", dreg, dreg, AT);
+ break;
+
case M_ROL:
macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "subu",
"d,v,t", AT, 0, treg);
@@ -6697,15 +6708,55 @@ macro2 (ip)
"d,v,t", dreg, dreg, AT);
break;
+ case M_DROL_I:
+ {
+ unsigned int rot;
+ char *l, *r;
+
+ if (imm_expr.X_op != O_constant)
+ as_bad (_("rotate count too large"));
+ rot = imm_expr.X_add_number & 0x3f;
+ if (! rot)
+ break;
+ l = (rot < 0x20) ? "dsll" : "dsll32";
+ r = ((0x40 - rot) < 0x20) ? "dsrl" : "dsrl32";
+ rot &= 0x1f;
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l,
+ "d,w,<", AT, sreg, rot);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r,
+ "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+ "d,v,t", dreg, dreg, AT);
+ }
+ break;
+
case M_ROL_I:
- if (imm_expr.X_op != O_constant)
- as_bad (_("rotate count too large"));
- macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", "d,w,<",
- AT, sreg, (int) (imm_expr.X_add_number & 0x1f));
- macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", "d,w,<",
- dreg, sreg, (int) ((0 - imm_expr.X_add_number) & 0x1f));
- macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", "d,v,t",
- dreg, dreg, AT);
+ {
+ unsigned int rot;
+
+ if (imm_expr.X_op != O_constant)
+ as_bad (_("rotate count too large"));
+ rot = imm_expr.X_add_number & 0x1f;
+ if (! rot)
+ break;
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll",
+ "d,w,<", AT, sreg, rot);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl",
+ "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+ "d,v,t", dreg, dreg, AT);
+ }
+ break;
+
+ case M_DROR:
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsubu",
+ "d,v,t", AT, 0, treg);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsllv",
+ "d,t,s", AT, sreg, AT);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "dsrlv",
+ "d,t,s", dreg, sreg, treg);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+ "d,v,t", dreg, dreg, AT);
break;
case M_ROR:
@@ -6719,15 +6770,44 @@ macro2 (ip)
"d,v,t", dreg, dreg, AT);
break;
+ case M_DROR_I:
+ {
+ unsigned int rot;
+ char *l, *r;
+
+ if (imm_expr.X_op != O_constant)
+ as_bad (_("rotate count too large"));
+ rot = imm_expr.X_add_number & 0x3f;
+ if (! rot)
+ break;
+ r = (rot < 0x20) ? "dsrl" : "dsrl32";
+ l = ((0x40 - rot) < 0x20) ? "dsll" : "dsll32";
+ rot &= 0x1f;
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, r,
+ "d,w,<", AT, sreg, rot);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, l,
+ "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+ "d,v,t", dreg, dreg, AT);
+ }
+ break;
+
case M_ROR_I:
- if (imm_expr.X_op != O_constant)
- as_bad (_("rotate count too large"));
- macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl", "d,w,<",
- AT, sreg, (int) (imm_expr.X_add_number & 0x1f));
- macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll", "d,w,<",
- dreg, sreg, (int) ((0 - imm_expr.X_add_number) & 0x1f));
- macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or", "d,v,t",
- dreg, dreg, AT);
+ {
+ unsigned int rot;
+
+ if (imm_expr.X_op != O_constant)
+ as_bad (_("rotate count too large"));
+ rot = imm_expr.X_add_number & 0x1f;
+ if (! rot)
+ break;
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "srl",
+ "d,w,<", AT, sreg, rot);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "sll",
+ "d,w,<", dreg, sreg, (0x20 - rot) & 0x1f);
+ macro_build ((char *) NULL, &icnt, (expressionS *) NULL, "or",
+ "d,v,t", dreg, dreg, AT);
+ }
break;
case M_S_DOB:
Index: gas/testsuite/ChangeLog
===================================================================
RCS file: /cvs/src/src/gas/testsuite/ChangeLog,v
retrieving revision 1.315
diff -u -p -r1.315 ChangeLog
--- gas/testsuite/ChangeLog 20 May 2002 17:05:34 -0000 1.315
+++ gas/testsuite/ChangeLog 21 May 2002 23:32:54 -0000
@@ -1,3 +1,9 @@
+2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+ * gas/mips/rol64.s: New file, test of drol, dror macros.
+ * gas/mips/rol64.d: Likewise.
+ * gas/mips/mips.exp: Add new test.
+
2002-05-20 Nick Clifton <nickc@cambridge.redhat.com>
* gas/arm/arm.exp: Replace deprecated command line switches
Index: gas/testsuite/gas/mips/mips.exp
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mips/mips.exp,v
retrieving revision 1.32
diff -u -p -r1.32 mips.exp
--- gas/testsuite/gas/mips/mips.exp 4 Apr 2002 08:23:30 -0000 1.32
+++ gas/testsuite/gas/mips/mips.exp 21 May 2002 23:32:54 -0000
@@ -122,6 +122,7 @@ if { [istarget mips*-*-*] } then {
run_dump_test "mul"
}
run_dump_test "rol"
+ run_dump_test "rol64"
if !$aout { run_dump_test "sb" }
run_dump_test "trunc"
if !$aout { run_dump_test "ulh" }
Index: include/opcode/ChangeLog
===================================================================
RCS file: /cvs/src/src/include/opcode/ChangeLog,v
retrieving revision 1.167
diff -u -p -r1.167 ChangeLog
--- include/opcode/ChangeLog 17 May 2002 19:01:03 -0000 1.167
+++ include/opcode/ChangeLog 21 May 2002 23:32:57 -0000
@@ -1,3 +1,7 @@
+2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+ * mips.h: Add M_DROL, M_DROL_I, M_DROR, M_DROR_I macro cases.
+
2002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
* h8300.h: Corrected defs of all control regs
Index: include/opcode/mips.h
===================================================================
RCS file: /cvs/src/src/include/opcode/mips.h,v
retrieving revision 1.24
diff -u -p -r1.24 mips.h
--- include/opcode/mips.h 16 Mar 2002 03:09:18 -0000 1.24
+++ include/opcode/mips.h 21 May 2002 23:32:57 -0000
@@ -526,9 +526,13 @@ enum
M_REM_3I,
M_REMU_3,
M_REMU_3I,
+ M_DROL,
M_ROL,
+ M_DROL_I,
M_ROL_I,
+ M_DROR,
M_ROR,
+ M_DROR_I,
M_ROR_I,
M_S_DA,
M_S_DOB,
Index: opcodes/ChangeLog
===================================================================
RCS file: /cvs/src/src/opcodes/ChangeLog,v
retrieving revision 1.447
diff -u -p -r1.447 ChangeLog
--- opcodes/ChangeLog 17 May 2002 14:36:45 -0000 1.447
+++ opcodes/ChangeLog 21 May 2002 23:33:00 -0000
@@ -1,3 +1,7 @@
+2002-05-22 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+ * mips-opc.c (mips_builtin_opcodes): Add drol, dror macros.
+
Fri May 17 14:26:44 2002 J"orn Rennecke <joern.rennecke@superh.com>
* disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh.
Index: opcodes/mips-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/mips-opc.c,v
retrieving revision 1.32
diff -u -p -r1.32 mips-opc.c
--- opcodes/mips-opc.c 17 Mar 2002 02:42:25 -0000 1.32
+++ opcodes/mips-opc.c 21 May 2002 23:33:00 -0000
@@ -492,6 +492,10 @@ const struct mips_opcode mips_builtin_op
{"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s|RD_t|WR_HILO, I3 },
{"dremu", "d,v,t", 3, (int) M_DREMU_3, INSN_MACRO, I3 },
{"dremu", "d,v,I", 3, (int) M_DREMU_3I, INSN_MACRO, I3 },
+{"drol", "d,v,t", 0, (int) M_DROL, INSN_MACRO, I3 },
+{"drol", "d,v,I", 0, (int) M_DROL_I, INSN_MACRO, I3 },
+{"dror", "d,v,t", 0, (int) M_DROR, INSN_MACRO, I3 },
+{"dror", "d,v,I", 0, (int) M_DROR_I, INSN_MACRO, I3 },
{"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 },
{"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_d|RD_t, I3 },
{"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_d|RD_t|RD_s, I3 }, /* dsllv */
2002-05-21 23:54:46 +00:00
c7ba2cc096
* h8300.h: Corrected defs of all control regs and eepmov instr.
2002-05-17 19:01:03 +00:00
48251fa39f
print_insn_sh cleanup:
...
include:
* dis-asm.h (print_insn_shl, print_insn_sh64l): Remove prototype.
gdb:
* sh-tdep.c (gdb_print_insn_sh64): Delete.
(gdb_print_insn_sh): Just set info->endian and use print_insn_sh.
(sh_gdbarch_init): Always use gdb_print_insn_sh.
opcodes:
* disassemble.c (disassembler): Just use print_insn_sh for bfd_arch_sh.
* sh-dis.c (LITTLE_BIT): Delete.
(print_insn_sh, print_insn_shl): Deleted.
(print_insn_shx): Renamed to
(print_insn_sh). No longer static. Handle SHmedia instructions.
Use info->endian to determine endianness.
* sh64-dis.c (print_insn_sh64, print_insn_sh64l): Delete.
(print_insn_sh64x): No longer static. Renamed to
(print_insn_sh64). Removed pfun_compact and endian arguments.
If we got an uneven address to indicate SHmedia, adjust it.
Return -2 for SHcompact instructions.
sim/sh64:
* sim-if.c (sh64_disassemble_insn): Use print_insn_sh instead of
print_insn_shl.
2002-05-17 14:36:42 +00:00
7124f04eb8
2002-05-10 Elena Zannoni <ezannoni@redhat.com>
...
* sim-sh.h: New file, for sh gdb<->sim interface.
2002-05-10 22:53:56 +00:00
62ae6f36e2
2002-05-09 Daniel Jacobowitz <drow@mvista.com>
...
* signals.h: Update comments.
(enum target_signal): Remove conditional compilation around
Mach-specific signals. Move them to after TARGET_SIGNAL_DEFAULT.
2002-05-09 22:19:48 +00:00
0dc9d4d7ed
* common.h (NT_GNU_ABI_TAG): Define.
...
(GNU_ABI_TAG_LINUX): Define.
(GNU_ABI_TAG_HURD): Define.
(GNU_ABI_TAG_SOLARIS): Define.
(NT_NETBSD_IDENT): Define.
(NT_FREEBSD_ABI_TAG): Define.
2002-05-08 14:28:37 +00:00
e1a6dac2af
2002-04-24 Elena Zannoni <ezannoni@redhat.com>
...
* dwarf2.h: Add DW_AT_GNU_vector.
2002-04-25 12:46:16 +00:00
7eb5439840
merge from gcc
2002-04-17 01:03:04 +00:00
Nick Clifton
Chris Demetriou
Kazu Hirata
Alan Modra
DJ Delorie
Jim Wilson
Richard Henderson
Stephane Carrez
Jason Thorpe
Klee Dienes
Svein Seldal
Kaz Kojima
Richard Sandiford
Jakub Jelinek
Andrew Cagney
Alexandre Oliva
Elena Zannoni
H.J. Lu
Andreas Schwab
Andrey Volkov
Joern Rennecke
Thiemo Seufer
Dave Brolley
Michal Ludvig
Daniel Jacobowitz