Commit Graph

19 Commits

Author SHA1 Message Date
Alexandre Oliva 6816724d0d * mips.h (EF_MIPS_XGOT): Define. 2003-01-28 00:01:08 +00:00
Chris Demetriou 1de386c0a1 [ bfd/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* aoutx.h (NAME(aout,machine_type)): Add bfd_mach_mipsisa32r2 case.
	* archures.c (bfd_mach_mipsisa32r2): New define.
	* bfd-in2.h: Regenerate.
	* cpu-mips.c (I_mipsisa32r2): New enum value.
	(arch_info_struct): Add entry for I_mipsisa32r2.
	* elfxx-mips.c (elf_mips_isa, _bfd_elf_mips_mach)
	(_bfd_mips_elf_print_private_bfd_data): Handle E_MIPS_ARCH_32R2.
	(_bfd_mips_elf_final_write_processing): Add
	bfd_mach_mipsisa32r2 case.
	(_bfd_mips_elf_merge_private_bfd_data): Handle merging of
	binaries marked as using MIPS32 Release 2.

[ binutils/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* doc/binutils.texi (objdump): Note MIPS HWR (Hardware Register)
	changes in MIPS -M options.

[ gas/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* configure.in: Recognize mipsisa32r2, mipsisa32r2el, and
	CPU variants.
	* configure: Regenerate.
	* config/tc-mips.c (ISA_HAS_DROR, ISA_HAS_ROR): New defines.
	(macro_build): Handle "K" operand.
	(macro2): Use ISA_HAS_DROR and ISA_HAS_ROR in the places where
	CPU_HAS_DROR and CPU_HAS_ROR are currently used.
	(mips_ip): New variable "lastpos", and implement "+A", "+B",
	and "+C" operands for MIPS32 Release 2 ins/ext instructions.
	Implement "K" operand for MIPS32 Release 2 rdhwr instruction.
	(validate_mips_insn): Implement "+" as a way to extend the
	allowed operands, and implement "K", "+A", "+B", and "+C"
	operands.
	(OPTION_MIPS32R2): New define.
	(md_longopts): Add entry for OPTION_MIPS32R2.
	(OPTION_ELF_BASE): Adjust to accomodate OPTIONS_MIPS32R2.
	(md_parse_option): Handle OPTION_MIPS32R2.
	(s_mipsset): Reimplement handling of ".set mipsN" options
	and add support for ".set mips32r2".
	(mips_cpu_info_table): Add entry for "mips32r2" (MIPS32 Release 2).
	(md_show_usage): Document "-mips32r2" option.
	* doc/as.texinfo: Document "-mips32r2" option.
	* doc/c-mips.texi: Likewise.

[ gas/testsuite/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* gas/mips/cp0-names-mips32r2.d: New test.
	* gas/mips/hwr-names-mips32r2.d: New test.
	* gas/mips/hwr-names-numeric.d: New test.
	* gas/mips/hwr-names.s: New test source file.
	* gas/mips/mips32r2.d: New test.
	* gas/mips/mips32r2.s: New test source file.
	* gas/mips/mips32r2-ill.l: New test.
	* gas/mips/mips32r2-ill.s: New test source file.
	* gas/mips/mips.exp: Add mips32r2 architecture data array
	entry.  Run new tests mentioned above.

[ include/elf/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* mips.h (E_MIPS_ARCH_32R2): New define.

[ include/opcode/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* mips.h: Document "+" as the start of two-character operand
	type names, and add new "K", "+A", "+B", and "+C" operand types.
	(OP_MASK_INSMSB, OP_SH_INSMSB, OP_MASK_EXTMSB)
	(OP_SH_EXTMSB, INSN_ISA32R2, ISA_MIPS32R2, CPU_MIPS32R2): New
	defines.

[ opcodes/ChangeLog ]
2002-12-30  Chris Demetriou  <cgd@broadcom.com>

	* mips-dis.c (mips_cp0_names_mips3264r2, mips_hwr_names_numeric)
	(mips_hwr_names_mips3264r2): New arrays.
	(mips_arch_choice): New "hwr_names" member.
	(mips_arch_choices): Adjust for structure change, and add a new
	entry for "mips32r2" ISA.
	(mips_hwr_names): New variable.
	(set_default_mips_dis_options): Set mips_hwr_names.
	(parse_mips_dis_option): New "hwr-names" option which sets
	mips_hwr_names, and adjust "reg-names=ARCH" to set mips_hwr_names.
	(print_insn_arg): Change return type to "int"
	and use that to indicate number of characters consumed.
	Add support for "+" operand extension character, "+A", "+B",
	"+C", and "K" operands.
	(print_insn_mips): Adjust for changes to print_insn_arg.
	(print_mips_disassembler_options): Adjust for "hwr-names"
	addition and "reg-names" change.
	* mips-opc (I33): New define (shorthand for INSN_ISA32R2).
	(mips_builtin_opcodes): Note that "nop" and "ssnop" are special
	forms of "sll".  Add new MIPS32 Release 2 instructions: ehb,
	di, ei, ext, ins, jr.hb, jalr.hb, mfhc1, mfhc2, mthc1, mthc2,
	rdhwr, rdpgpr, seb, seh, synci, wrpgpr, wsbh.
	Note that hardware rotate instructions (ror, rorv) can be
	used on MIPS32 Release 2, and add the official mnemonics
	for them (rotr, rotrv) and the similar "rotl" mnemonic for
	left-rotate.
2002-12-31 07:29:29 +00:00
Richard Sandiford 3342a2e928 [include/elf]
* mips.h (E_MIPS_MACH_4120, E_MIPS_MACH_5400, E_MIPS_MACH_5500): New.

[bfd/]
	* archures.c (bfd_mach_mips4120, bfd_mach_mips5400): New.
	(bfd_mach_mips5500): New.
	* cpu-mips.c (I_mips4120, I_mips5400, I_mips5500): New.
	(arch_info_struct): Add corresponding entries here.
	* elfxx-mips.c (_bfd_elf_mips_mach): Handle E_MIPS_MACH_4120,
	E_MIPS_MACH_5400 and E_MIPS_MACH_5500.
	(_bfd_mips_elf_final_write_processing): Handle bfd_mach_mips4120,
	bfd_mach_mips5400 and bfd_mach_mips5500.
	(_bfd_mips_elf_mach_extends_p): New function.
	(_bfd_mips_elf_merge_private_bfd_data): Use it to help merge
	the EF_MIPS_MACH flags.
	* bfd-in2.h: Regenerate.
2002-09-30 11:53:55 +00:00
Eric Christopher a26a4cdbe0 mips3264 support 2001-08-31 21:21:54 +00:00
Alan Modra c9b76619ac * external.h: Fix typo.
* mips.h: Add/Extend many comments with reference to the MIPS ELF64
	spec v. 2.4, available at e.g.
	ftp://oss.sgi.com/pub/linux/mips/doc/ABI/ELF64.ps.
	(EF_MIPS_UCODE): Define.
	(EF_MIPS_OPTIONS_FIRST): Define.
	(EF_MIPS_ARCH_ASE): Define.
	(EF_MIPS_ARCH_ASE_MDMX): Define.
	(EF_MIPS_ARCH_ASE_M16): Define.
	(SHF_MIPS_ADDR): Renamed SHF_MIPS_ADDR32.
	(SHF_MIPS_STRING): Renamed SHF_MIPS_ADDR64.
	(SHF_MIPS_NODUPES): Define.
	(ELF64_MIPS_R_SSYM): New MIPS ELF 64 relocation info access macro.
	(ELF64_MIPS_R_TYPE3): Likewise.
	(ELF64_MIPS_R_TYPE2): Likewise.
	(ELF64_MIPS_R_TYPE): Likewise.
	(OHW_R10KLDL): Define.
2001-05-07 09:18:52 +00:00
Nick Clifton 5c3393d227 Remove extraneous whitespace 2001-03-24 00:46:00 +00:00
Nick Clifton c77e3e5481 Fix typos in ChangeLogs; add coff/external.h; fix copyright dates 2001-03-14 02:27:44 +00:00
Nick Clifton 5092a8140b Fix Formatting. 2000-12-12 19:25:07 +00:00
Nick Clifton 294f81d78d Add MIPS SB1 machine 2000-12-02 01:10:33 +00:00
Nick Clifton f9fe8a8ead Add MIPS V and MIPS 64 machine numbers 2000-12-02 00:55:22 +00:00
Nick Clifton 388732e7f6 Add MIPS32 as a seperate MIPS architecture 2000-12-01 21:35:38 +00:00
Nick Clifton 67b0ce5ff0 Add support for the MIPS32 2000-09-14 01:47:37 +00:00
Alan Modra 2b8f61c24e Update copyright dates for last patch.
Scanning ChangeLog showed others were lazy/forgetful too :-)
2000-06-07 04:08:13 +00:00
Alan Modra 47d87b8a65 Get rid of the -1 dummy valued enum in START_RELOC_NUMBERS.
Remove duplicate reloc enums in elf32-d[13]0v.c
Remove EMPTY_HOWTOs in elf32-i386.c
2000-06-07 03:43:33 +00:00
Nick Clifton fc1df4b6c6 Include year 2000 in copyright message 2000-05-28 19:25:07 +00:00
Geoffrey Keating fca5fcb1e0 In bfd/:
* elf32-mips.c (mips_elf_next_relocation): Rename from
	mips_elf_next_lo16_relocation, and generalize to look
	for any relocation type.
	(elf_mips_howto_table): Make R_MIPS_PC16 pcrel_offset.
	(elf_mips_gnu_rel_hi16): Howto for R_MIPS_GNU_REL_HI16.
	(elf_mips_gnu_rel_lo16): Howto for R_MIPS_GNU_REL_LO16.
	(elf_mips_gnu_rel16_s2): Howto for R_MIPS_GNU_REL16_S2.
	(elf_mips_gnu_pcrel64): Howto for R_MIPS_PC64.
	(elf_mips_gnu_pcrel32): Howto for R_MIPS_PC32.
	(bfd_elf32_bfd_reloc_type_lookup): Add new relocs.
	(mips_rtype_to_howto): Likewise.
	(mips_elf_calculate_relocation): Handle new relocs.
	(_bfd_mips_elf_relocate_section): REL_HI16/REL_LO16 relocs
	are paired.  The addend for R_MIPS_GNU_REL16_S2
	is shifted right two bits.
In gas/:
	* config/tc-mips.c (mips_ip): Don't put stuff in .rodata
	when embedded-pic.

	* config/tc-mips.c (SWITCH_TABLE): The ELF embedded-pic
 	implementation doesn't have special handling for switch
 	statements.
	(macro_build): Allow for code in sections other than .text.
	(macro): Likewise.
	(mips_ip): Likewise.
	(md_apply_fix): Do pc-relative relocation madness for MIPS ELF.
  	Don't perform relocs if we will be outputting them.
	(tc_gen_reloc): For ELF, just use fx_addnumber for pc-relative
 	relocations.  Allow BFD_RELOC_16_PCREL_S2 relocs when
 	embedded-pic.
In gas/testsuite/:
	* gas/mips/empic.d: New file.
	* gas/mips/empic.s: New file.
	* gas/mips/mips16-e.d: New file.
	* gas/mips/mips16-e.s: New file.
	* gas/mips/mips16-f.d: New file.
	* gas/mips/mips16-f.s: New file.
	* gas/mips/mips.exp: Add empic, mips16-e.  Add mips16-f as an
	expected failure.
In include/elf:
	* mips.h: Add R_MIPS_GNU_REL_HI16, R_MIPS_GNU_REL_LO16,
 	R_MIPS_GNU_REL16_S2, R_MIPS_PC64 and R_MIPS_PC32 relocation
 	numbers.
2000-03-11 02:16:25 +00:00
Nick Clifton 39cf906ea1 Redefine STO_* value sin terms of STV_* values 1999-12-28 18:41:47 +00:00
Mark Mitchell 154acdedb7 * mips.h (Elf32_Internal_Msym): New structure.
(Elf32_External_Msym): Likewise.
	(ELF32_MS_REL_INDEX): New macro.
	(ELF32_MS_FLAGS): Likewise.
	(ELF32_MS_INFO): Likewise.
1999-06-21 06:57:35 +00:00
Richard Henderson a3acbf4694 19990502 sourceware import 1999-05-03 07:29:06 +00:00