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include/opcode/

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* ppc.h (PPC_OPCODE_32, PPC_OPCODE_BOOKE64, PPC_OPCODE_CLASSIC): Delete.
	Renumber other PPC_OPCODE defines.
gas/
	* config/tc-ppc.c (ppc_set_cpu): Remove old opcode flags.
	(ppc_setup_opcodes): Likewise.  Simplify opcode selection.
opcodes/
	* ppc-dis.c (ppc_opts, powerpc_init_dialect): Remove old opcode flags.
	* ppc-opc.c (PPC32, POWER32, COM32, CLASSIC): Delete.
	(PPC64, MFDEC2): Update.
	(NON32, NO371): Define.
	(powerpc_opcode): Update to not use old opcode flags, and avoid
	-m601 duplicates.
This commit is contained in:
Alan Modra 2010-07-03 06:51:53 +00:00
parent dc43a4fd11
commit daa7111808
2 changed files with 37 additions and 41 deletions
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5
include/opcode/ChangeLog
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@ -1,3 +1,8 @@
2010-07-03 Alan Modra <amodra@gmail.com>
* ppc.h (PPC_OPCODE_32, PPC_OPCODE_BOOKE64, PPC_OPCODE_CLASSIC): Delete.
Renumber other PPC_OPCODE defines.
2010-07-03 Alan Modra <amodra@gmail.com>
* ppc.h (PPC_OPCODE_COMMON): Expand comment.

73
include/opcode/ppc.h
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@ -77,111 +77,102 @@ extern const int powerpc_num_opcodes;
/* Opcode is defined for the POWER2 (Rios 2) architecture. */
#define PPC_OPCODE_POWER2 4
/* Opcode is only defined on 32 bit architectures. */
#define PPC_OPCODE_32 8
/* Opcode is only defined on 64 bit architectures. */
#define PPC_OPCODE_64 0x10
/* Opcode is supported by the Motorola PowerPC 601 processor. The 601
is assumed to support all PowerPC (PPC_OPCODE_PPC) instructions,
but it also supports many additional POWER instructions. */
#define PPC_OPCODE_601 0x20
#define PPC_OPCODE_601 8
/* Opcode is supported in both the Power and PowerPC architectures
(ie, compiler's -mcpu=common or assembler's -mcom). More than just
the intersection of PPC_OPCODE_PPC with the union of PPC_OPCODE_POWER
and PPC_OPCODE_POWER2 because many instructions changed mnemonics
between POWER and POWERPC. */
#define PPC_OPCODE_COMMON 0x40
#define PPC_OPCODE_COMMON 0x10
/* Opcode is supported for any Power or PowerPC platform (this is
for the assembler's -many option, and it eliminates duplicates). */
#define PPC_OPCODE_ANY 0x80
#define PPC_OPCODE_ANY 0x20
/* Opcode is only defined on 64 bit architectures. */
#define PPC_OPCODE_64 0x40
/* Opcode is supported as part of the 64-bit bridge. */
#define PPC_OPCODE_64_BRIDGE 0x100
#define PPC_OPCODE_64_BRIDGE 0x80
/* Opcode is supported by Altivec Vector Unit */
#define PPC_OPCODE_ALTIVEC 0x200
#define PPC_OPCODE_ALTIVEC 0x100
/* Opcode is supported by PowerPC 403 processor. */
#define PPC_OPCODE_403 0x400
#define PPC_OPCODE_403 0x200
/* Opcode is supported by PowerPC BookE processor. */
#define PPC_OPCODE_BOOKE 0x800
/* Opcode is only supported by 64-bit PowerPC BookE processor. */
#define PPC_OPCODE_BOOKE64 0x1000
#define PPC_OPCODE_BOOKE 0x400
/* Opcode is supported by PowerPC 440 processor. */
#define PPC_OPCODE_440 0x2000
#define PPC_OPCODE_440 0x800
/* Opcode is only supported by Power4 architecture. */
#define PPC_OPCODE_POWER4 0x4000
#define PPC_OPCODE_POWER4 0x1000
/* Opcode is only supported by Power7 architecture. */
#define PPC_OPCODE_POWER7 0x8000
/* Opcode is only supported by POWERPC Classic architecture. */
#define PPC_OPCODE_CLASSIC 0x10000
#define PPC_OPCODE_POWER7 0x2000
/* Opcode is only supported by e500x2 Core. */
#define PPC_OPCODE_SPE 0x20000
#define PPC_OPCODE_SPE 0x4000
/* Opcode is supported by e500x2 Integer select APU. */
#define PPC_OPCODE_ISEL 0x40000
#define PPC_OPCODE_ISEL 0x8000
/* Opcode is an e500 SPE floating point instruction. */
#define PPC_OPCODE_EFS 0x80000
#define PPC_OPCODE_EFS 0x10000
/* Opcode is supported by branch locking APU. */
#define PPC_OPCODE_BRLOCK 0x100000
#define PPC_OPCODE_BRLOCK 0x20000
/* Opcode is supported by performance monitor APU. */
#define PPC_OPCODE_PMR 0x200000
#define PPC_OPCODE_PMR 0x40000
/* Opcode is supported by cache locking APU. */
#define PPC_OPCODE_CACHELCK 0x400000
#define PPC_OPCODE_CACHELCK 0x80000
/* Opcode is supported by machine check APU. */
#define PPC_OPCODE_RFMCI 0x800000
#define PPC_OPCODE_RFMCI 0x100000
/* Opcode is only supported by Power5 architecture. */
#define PPC_OPCODE_POWER5 0x1000000
#define PPC_OPCODE_POWER5 0x200000
/* Opcode is supported by PowerPC e300 family. */
#define PPC_OPCODE_E300 0x2000000
#define PPC_OPCODE_E300 0x400000
/* Opcode is only supported by Power6 architecture. */
#define PPC_OPCODE_POWER6 0x4000000
#define PPC_OPCODE_POWER6 0x800000
/* Opcode is only supported by PowerPC Cell family. */
#define PPC_OPCODE_CELL 0x8000000
#define PPC_OPCODE_CELL 0x1000000
/* Opcode is supported by CPUs with paired singles support. */
#define PPC_OPCODE_PPCPS 0x10000000
#define PPC_OPCODE_PPCPS 0x2000000
/* Opcode is supported by Power E500MC */
#define PPC_OPCODE_E500MC 0x20000000
#define PPC_OPCODE_E500MC 0x4000000
/* Opcode is supported by PowerPC 405 processor. */
#define PPC_OPCODE_405 0x40000000
#define PPC_OPCODE_405 0x8000000
/* Opcode is supported by Vector-Scalar (VSX) Unit */
#define PPC_OPCODE_VSX 0x80000000
#define PPC_OPCODE_VSX 0x10000000
/* Opcode is supported by A2. */
#define PPC_OPCODE_A2 0x100000000ULL
#define PPC_OPCODE_A2 0x20000000
/* Opcode is supported by PowerPC 476 processor. */
#define PPC_OPCODE_476 0x200000000ULL
#define PPC_OPCODE_476 0x40000000
/* Opcode is supported by AppliedMicro Titan core */
#define PPC_OPCODE_TITAN 0x400000000ULL
#define PPC_OPCODE_TITAN 0x80000000
/* Opcode which is supported by the e500 family */
#define PPC_OPCODE_E500 0x800000000ULL
#define PPC_OPCODE_E500 0x100000000ull
/* A macro to extract the major opcode from an instruction. */
#define PPC_OP(i) (((i) >> 26) & 0x3f)