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2010-12-02 Jayant Sonar jayant.sonar@kpitcummins.com 

Kaushik Phatak  kaushik.phatak@kpitcummins.com

        * configure.host: Add CR16 support.
        * libc/include/machine/ieeefp.h: Ditto.
        * libc/include/machine/setjmp.h: Ditto.
        * libc/include/sys/config.h: Ditto.
        * libc/machine/configure.in: Ditto
        * libc/machine/configure: Regenerated
        * libc/machine/cr16/aclocal.m4: New.
        * libc/machine/cr16/configure.in: New
        * libc/machine/cr16/configure: New
        * libc/machine/cr16/getenv.c: New
        * libc/machine/cr16/Makefile.am: New
        * libc/machine/cr16/Makefile.in: New
        * libc/machine/cr16/setjmp.S: New
        * libc/machine/cr16/sys/asm.h: New
        * libc/machine/cr16/sys/libh.h: New
        * libc/machine/cr16/sys/syscall.h: New
This commit is contained in:
Jeff Johnston 2010-12-02 19:30:47 +00:00
parent bdcc0b84ed
commit 874a87f8cd
17 changed files with 7151 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

20
newlib/ChangeLog
View File

@ -1,3 +1,23 @@
2010-12-02 Jayant Sonar jayant.sonar@kpitcummins.com
Kaushik Phatak kaushik.phatak@kpitcummins.com
* configure.host: Add CR16 support.
* libc/include/machine/ieeefp.h: Ditto.
* libc/include/machine/setjmp.h: Ditto.
* libc/include/sys/config.h: Ditto.
* libc/machine/configure.in: Ditto
* libc/machine/configure: Regenerated
* libc/machine/cr16/aclocal.m4: New.
* libc/machine/cr16/configure.in: New
* libc/machine/cr16/configure: New
* libc/machine/cr16/getenv.c: New
* libc/machine/cr16/Makefile.am: New
* libc/machine/cr16/Makefile.in: New
* libc/machine/cr16/setjmp.S: New
* libc/machine/cr16/sys/asm.h: New
* libc/machine/cr16/sys/libh.h: New
* libc/machine/cr16/sys/syscall.h: New
2010-11-29 Ralf Corsépius <ralf.corsepius@rtems.org>
* libm/complex/catan.c, libm/complex/catanf.c,

9
newlib/configure.host
View File

@ -105,6 +105,9 @@ case "${host_cpu}" in
bfin)
machine_dir=bfin
;;
cr16*)
machine_dir=cr16
;;
cris | crisv32)
machine_dir=cris
;;
@ -376,6 +379,9 @@ case "${host}" in
bfin-*-*)
sys_dir=
;;
cr16-*-*)
sys_dir=
;;
crx*)
sys_dir=
;;
@ -608,6 +614,9 @@ case "${host}" in
newlib_cflags="${newlib_cflags} -DHAVE_RENAME -D_USE_WRITE -DCOMPACT_CTYPE"
syscall_dir=syscalls
;;
cr16-*-*)
syscall_dir=syscalls
;;
crx-*-*)
newlib_cflags="${newlib_cflags} -DHAVE_RENAME -DMISSING_SYSCALL_NAMES"
syscall_dir=

5
newlib/libc/include/machine/ieeefp.h
View File

@ -360,6 +360,11 @@
#endif
#if (defined(__CR16__) || defined(__CR16C__) ||defined(__CR16CP__))
#define __IEEE_LITTLE_ENDIAN
#define __SMALL_BITFIELDS /* 16 Bit INT */
#endif
#ifndef __IEEE_BIG_ENDIAN
#ifndef __IEEE_LITTLE_ENDIAN
#error Endianess not declared!!

7
newlib/libc/include/machine/setjmp.h
View File

@ -204,6 +204,13 @@ _BEGIN_STD_C
#define _JBLEN 9
#endif
#if (defined(__CR16__) || defined(__CR16C__) ||defined(__CR16CP__))
/* r6, r7, r8, r9, r10, r11, r12 (r12L, r12H),
* r13 (r13L, r13H), ra(raL, raH), sp(spL, spH) */
#define _JBLEN 14
#define _JBTYPE unsigned short
#endif
#ifdef __fr30__
#define _JBLEN 10
#endif

16
newlib/libc/include/sys/config.h
View File

@ -30,6 +30,22 @@
#define UINT_MAX (__INT_MAX__ * 2U + 1)
#endif
#if (defined(__CR16__) || defined(__CR16C__) ||defined(__CR16CP__))
#ifndef __INT32__
#define __SMALL_BITFIELDS
#undef INT_MAX
#undef UINT_MAX
#define INT_MAX 32767
#define UINT_MAX (__INT_MAX__ * 2U + 1)
#else /* INT32 */
#undef INT_MAX
#undef UINT_MAX
#define INT_MAX 2147483647
#define UINT_MAX (__INT_MAX__ * 2U + 1)
#endif /* INT32 */
#endif /* CR16C */
#if defined (__xc16x__) || defined (__xc16xL__) || defined (__xc16xS__)
#define __SMALL_BITFIELDS
#endif

7
newlib/libc/machine/configure vendored
View File

@ -830,6 +830,7 @@ CPP'
ac_subdirs_all='a29k
arm
bfin
cr16
cris
crx
d10v
@ -12394,7 +12395,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
#line 12397 "configure"
#line 12398 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@ -12500,7 +12501,7 @@ else
lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2
lt_status=$lt_dlunknown
cat > conftest.$ac_ext <<_LT_EOF
#line 12503 "configure"
#line 12504 "configure"
#include "confdefs.h"
#if HAVE_DLFCN_H
@ -12748,6 +12749,8 @@ subdirs="$subdirs a29k"
arm) subdirs="$subdirs arm"
;;
bfin) subdirs="$subdirs bfin"
;;
cr16) subdirs="$subdirs cr16"
;;
cris) subdirs="$subdirs cris"
;;

1
newlib/libc/machine/configure.in
View File

@ -26,6 +26,7 @@ if test -n "${machine_dir}"; then
a29k) AC_CONFIG_SUBDIRS(a29k) ;;
arm) AC_CONFIG_SUBDIRS(arm) ;;
bfin) AC_CONFIG_SUBDIRS(bfin) ;;
cr16) AC_CONFIG_SUBDIRS(cr16) ;;
cris) AC_CONFIG_SUBDIRS(cris) ;;
crx) AC_CONFIG_SUBDIRS(crx) ;;
d10v) AC_CONFIG_SUBDIRS(d10v) ;;

16
newlib/libc/machine/cr16/Makefile.am Normal file
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@ -0,0 +1,16 @@
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lib_a_CFLAGS=$(AM_CFLAGS)
ACLOCAL_AMFLAGS = -I ../../.. -I ../../../..
CONFIG_STATUS_DEPENDENCIES = $(newlib_basedir)/configure.host

423
newlib/libc/machine/cr16/Makefile.in Normal file
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@ -0,0 +1,423 @@
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newlib/libc/machine/cr16/aclocal.m4 vendored Normal file
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@ -0,0 +1,992 @@
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# This file is free software; the Free Software Foundation
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# Copyright (C) 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
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# Check to make sure that the build environment is sane. -*- Autoconf -*-
# Copyright (C) 1996, 1997, 2000, 2001, 2003, 2005, 2008
# Free Software Foundation, Inc.
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# This file is free software; the Free Software Foundation
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# Copyright (C) 2001, 2003, 2005 Free Software Foundation, Inc.
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m4_include([../../../acinclude.m4])

4990
newlib/libc/machine/cr16/configure vendored Normal file
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File diff suppressed because it is too large Load Diff

14
newlib/libc/machine/cr16/configure.in Normal file
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@ -0,0 +1,14 @@
dnl This is the newlib/libc/machine/arm configure.in file.
dnl Process this file with autoconf to produce a configure script.
AC_PREREQ(2.59)
AC_INIT([newlib],[NEWLIB_VERSION])
AC_CONFIG_SRCDIR([Makefile.am])
dnl Can't be done in NEWLIB_CONFIGURE because that confuses automake.
AC_CONFIG_AUX_DIR(../../../..)
NEWLIB_CONFIGURE(../../..)
AC_CONFIG_FILES([Makefile])
AC_OUTPUT

24
newlib/libc/machine/cr16/getenv.c Normal file
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@ -0,0 +1,24 @@
/* getenv.c -- Implementation of the getenv() routine
*
* Copyright (c) 2004 National Semiconductor Corporation
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
/* getenv() is implemented as a low-level function,
thus we only invoke here the system call. */
char * getenv (const char *name)
{
char *_getenv(const char *);
return (_getenv (name));
}

97
newlib/libc/machine/cr16/setjmp.S Normal file
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@ -0,0 +1,97 @@
##############################################################################
# setjmp.S -- CR16 setjmp routine #
# #
# Copyright (c) 2004 National Semiconductor Corporation #
# #
# The authors hereby grant permission to use, copy, modify, distribute, #
# and license this software and its documentation for any purpose, provided #
# that existing copyright notices are retained in all copies and that this #
# notice is included verbatim in any distributions. No written agreement, #
# license, or royalty fee is required for any of the authorized uses. #
# Modifications to this software may be copyrighted by their authors #
# and need not follow the licensing terms described here, provided that #
# the new terms are clearly indicated on the first page of each file where #
# they apply. #
# #
# C library -- setjmp, longjmp #
# longjmp(a,v) #
# will generate a "return(v)" #
# from the last call to #
# setjmp(a) #
# by restoring r7-ra, sp, #
# and pc from 'a' #
# and doing a return. (Makes sure that longjmp never returns 0). #
##############################################################################
.text
.file "setjmp.s"
.align 4
.globl _setjmp
.align 4
_setjmp:
#r3, r2: .blkw
storw r7, 0(r3,r2)
addd $2, (r3,r2)
storw r8, 0(r3,r2)
addd $2, (r3,r2)
storw r9, 0(r3,r2)
addd $2, (r3,r2)
storw r10, 0(r3,r2)
addd $2, (r3,r2)
storw r11, 0(r3,r2)
addd $2, (r3,r2)
stord (r12), 0(r3,r2)
addd $4, (r3,r2)
stord (r13), 0(r3,r2)
addd $4, (r3,r2)
stord (ra), 0(r3,r2)
addd $4, (r3,r2)
stord (sp), 0(r3,r2)
movd $0,(r1,r0)
jump (ra)
.globl _longjmp
_longjmp:
#r3, r2: .blkw # pointer save area
#r5, r4: .blkw # ret vlaue
loadw 0(r3,r2), r7
addd $2, (r3,r2)
loadw 0(r3,r2), r8
addd $2, (r3,r2)
loadw 0(r3,r2), r9
addd $2, (r3,r2)
loadw 0(r3,r2), r10
addd $2, (r3,r2)
loadw 0(r3,r2), r11
addd $2, (r3,r2)
loadd 0(r3,r2), (r12)
addd $4, (r3,r2)
loadd 0(r3,r2), (r13)
addd $4, (r3,r2)
loadd 0(r3,r2), (ra)
addd $4, (r3,r2)
loadd 0(r3,r2), (sp)
#ifdef __INT32__
movd (r5,r4), (r1,r0)
cmpd $0, (r5,r4)
bne end1
movd $1, (r1,r0)
#else
movw r4, r0
cmpw $0, r4
bne end1
movw $1, r0
#endif
end1:
jump (ra)
.align 4

421
newlib/libc/machine/cr16/sys/asm.h Normal file
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@ -0,0 +1,421 @@
/* asm.h -- CR16 architecture intrinsic functions
*
* Copyright (c) 2004 National Semiconductor Corporation
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
#ifndef _ASM
#define _ASM
/* Note that immediate input values are not checked for validity. It is
the user's responsibility to use the intrinsic functions with appropriate
immediate values. */
/* Absolute Instructions */
#define _absb_(src, dest) __asm__("absb %1, %0" : "=r" (dest) : \
"r" ((char)src) , "0" (dest))
#define _absw_(src, dest) __asm__("absw %1,%0" : "=r" (dest) : \
"r" ((short)src) , "0" (dest))
#define _absd_(src, dest) __asm__("absd %1, %0" : "=r" (dest) : \
"r" ((int)src) , "0" (dest))
/* Addition Instructions */
#define _addb_(src, dest) __asm__("addb %1, %0" : "=r" (dest) : \
"ri" ((unsigned char)src), "0" (dest) : "cc")
#define _addub_(src, dest) __asm__("addub %1, %0" : "=r" (dest) : \
"ri" ((unsigned char)src), "0" (dest) : "cc")
#define _addw_(src, dest) __asm__("addw %1, %0" : "=r" (dest) : \
"ri" ((unsigned short)src), "0" (dest) : "cc")
#define _adduw_(src, dest) __asm__("adduw %1, %0" : "=r" (dest) : \
"ri" ((unsigned short)src), "0" (dest) : "cc")
#define _addd_(src, dest) __asm__("addd %1, %0" : "=r" (dest) : \
"ri" ((unsigned int)src), "0" (dest) : "cc")
#define _addud_(src, dest) __asm__("addud %1, %0" : "=r" (dest) : \
"ri" ((unsigned int)src), "0" (dest) : "cc")
/* Add with Carry */
#define _addcb_(src, dest) __asm__("addcb %1, %0" : "=r" (dest) : \
"ri" ((unsigned char)src), "0" (dest) : "cc")
#define _addcw_(src, dest) __asm__("addcw %1, %0" : "=r" (dest) : \
"ri" ((unsigned short)src), "0" (dest) : "cc")
#define _addcd_(src, dest) __asm__("addcd %1, %0" : "=r" (dest) : \
"ri" ((unsigned int)src), "0" (dest) : "cc")
/* Q-format Add */
#define _addqb_(src, dest) __asm__("addqb %1, %0" : "=r" (dest) : \
"r" ((unsigned char)src), "0" (dest) : "cc")
#define _addqw_(src, dest) __asm__("addqw %1, %0" : "=r" (dest) : \
"r" ((unsigned short)src), "0" (dest) : "cc")
#define _addqd_(src, dest) __asm__("addqd %1, %0" : "=r" (dest) : \
"r" ((unsigned int)src), "0" (dest) : "cc")
/* Bitwise Logical AND */
#define _andb_(src, dest) __asm__("andb %1,%0" : "=r" (dest) : \
"ri" ((unsigned char)src) , "0" (dest))
#define _andw_(src, dest) __asm__("andw %1,%0" : "=r" (dest) : \
"ri" ((unsigned short)src) , "0" (dest))
#define _andd_(src, dest) __asm__("andd %1,%0" : "=r" (dest) : \
"ri" ((unsigned int)src) , "0" (dest))
/* bswap Instruction */
#define _bswap_(src, dest) __asm__("bswap %1,%0" : "=r" (dest) : \
"r" ((unsigned int)src) , "0" (dest))
/* cbit (clear bit) Instructions */
#define _cbitb_(pos, dest) __asm__("cbitb %1,%0" : "=mr" (dest) : \
"i" ((unsigned char)pos) , "0" (dest) : "cc")
#define _cbitw_(pos, dest) __asm__("cbitw %1,%0" : "=mr" (dest) : \
"i" ((unsigned char)pos) , "0" (dest) : "cc")
#define _cbitd_(pos, dest) __asm__("cbitd %1,%0" : "=r" (dest) : \
"i" ((unsigned char)pos) , "0" (dest) : "cc")
/* Compare Instructions */
#define _cmpb_(src1, src2) __asm__("cmpb %0,%1" : /* no output */ : \
"ri" ((unsigned char)src1) , "r" (src2) : "cc")
#define _cmpw_(src1,src2) __asm__("cmpw %0,%1" : /* no output */ \
: "ri" ((unsigned short)src1) , "r" (src2) : "cc")
#define _cmpd_(src1,src2) __asm__("cmpd %0,%1" : /* no output */ \
: "ri" ((unsigned int)src1) , "r" (src2) : "cc")
/* cntl Count Leading Ones Instructions */
#define _cntl1b_(src, dest) __asm__("cntl1b %1,%0" : "=r" (dest) : \
"r" ((char)src) , "0" (dest))
#define _cntl1w_(src, dest) __asm__("cntl1w %1,%0" : "=r" (dest) : \
"r" ((short)src) , "0" (dest))
#define _cntl1d_(src, dest) __asm__("cntl1d %1,%0" : "=r" (dest) : \
"r" ((int)src) , "0" (dest))
/* cntl Count Leading Zeros Instructions */
#define _cntl0b_(src, dest) __asm__("cntl0b %1,%0" : "=r" (dest) : \
"r" ((char)src) , "0" (dest))
#define _cntl0w_(src, dest) __asm__("cntl0w %1,%0" : "=r" (dest) : \
"r" ((short)src) , "0" (dest))
#define _cntl0d_(src, dest) __asm__("cntl0d %1,%0" : "=r" (dest) : \
"r" ((int)src) , "0" (dest))
/* cntl Count Leading Signs Instructions */
#define _cntlsb_(src, dest) __asm__("cntlsb %1,%0" : "=r" (dest) : \
"r" ((char)src) , "0" (dest))
#define _cntlsw_(src, dest) __asm__("cntlsw %1,%0" : "=r" (dest) : \
"r" ((short)src) , "0" (dest))
#define _cntlsd_(src, dest) __asm__("cntlsd %1,%0" : "=r" (dest) : \
"r" ((int)src) , "0" (dest))
/* Disable Inerrupts instructions */
#define _di_() __asm__ volatile ("di\n" : : : "cc")
#define _disable_() __asm__ volatile ("di\n" : : : "cc")
/* Enable Inerrupts instructions */
#define _ei_() __asm__ volatile ("ei\n" : : : "cc")
#define _enable_() __asm__ volatile ("ei\n" : : : "cc")
/* Enable Inerrupts instructions and Wait */
#define _eiwait_() __asm__ volatile ("eiwait" : : : "cc")
/* excp Instructions */
#define _excp_(vector) __asm__ volatile ("excp " # vector)
/* getpid Instruction */
#define _getrfid_(dest) __asm__("getrfid %0" : "=r" (dest) : \
/* No input */ : "cc")
/* Load Instructions */
#define _loadb_(base,dest) __asm__("loadb %1,%0" : "=r" (dest) : \
"m" (base) , "0" (dest))
#define _loadw_(base,dest) __asm__("loadw %1,%0" : "=r" (dest) : \
"m" (base) , "0" (dest))
#define _loadd_(base,dest) __asm__("loadd %1,%0" : "=r" (dest) : \
"m" (base) , "0" (dest))
/* Load Multiple Instructions */
#define _loadm_(src, mask) __asm__("loadm %0,%1" : /* No output */ : \
"r" ((unsigned int)src) , "i" (mask))
#define _loadmp_(src, mask) __asm__("loadmp %0,%1" : /* No output */ : \
"r" ((unsigned int)src) , "i" (mask))
/* Multiply Accumulate Instrutions */
#define _macsb_(hi, lo, src1, src2) __asm__("macsb %1,%0" \
: =l (lo), =h (hi) \
: "r" ((char)src1) , "r" (src2))
#define _macsw_(hi, lo, src1, src2) __asm__("macsw %1,%0" \
: =l (lo), =h (hi) \
: "r" ((short)src1) , "r" (src2))
#define _macsd_(hi, lo, src1, src2) __asm__("macsd %1,%0" \
: =l (lo), =h (hi) \
: "r" ((int)src1) , "r" (src2))
#define _macub_(hi, lo, src1, src2) __asm__("macub %1,%0" \
: =l (lo), =h (hi) \
:"r" ((unsigned char)src1) , "r" (src2))
#define _macuw_(hi, lo, src1, src2) __asm__("macuw %1,%0" \
: =l (lo), =h (hi) \
: "r" ((unsigned short)src1) , "r" (src2))
#define _macud_(hi, lo, src1, src2) __asm__("macud %1,%0" \
: =l (lo), =h (hi) \
: "r" ((unsigned int)src1) , "r" (src2))
/* Q-Format Multiply Accumulate Instrutions */
#define _macqb_(src1, src2) __asm__("macqb %1,%0" \
: =l (lo), =h (hi) \
:"r" ((char)src1) , "r" (src2))
#define _macqw_(src1, src2) __asm__("macqw %1,%0" \
: =l (lo), =h (hi) \
:"r" ((short)src1) , "r" (src2))
#define _macqd_(src1, src2) __asm__("macqd %1,%0" \
: =l (lo), =h (hi) \
:"r" ((int)src1) , "r" (src2))
/* Maximum Instructions */
#define _maxsb_(src, dest) __asm__("maxsb %1,%0" : "=r" (dest) : \
"r" ((char)src) , "0" (dest))
#define _maxsw_(src, dest) __asm__("maxsw %1,%0" : "=r" (dest) : \
"r" ((short)src) , "0" (dest))
#define _maxsd_(src, dest) __asm__("maxsd %1,%0" : "=r" (dest) : \
"r" ((int)src) , "0" (dest))
#define _maxub_(src, dest) __asm__("maxub %1,%0" : "=r" (dest) : \
"r" ((unsigned char)src) , "0" (dest))
#define _maxuw_(src, dest) __asm__("maxuw %1,%0" : "=r" (dest) : \
"r" ((unsigned short)src) , "0" (dest))
#define _maxud_(src, dest) __asm__("maxud %1,%0" : "=r" (dest) : \
"r" ((unsigned int)src) , "0" (dest))
/* Minimum Instructions */
#define _minsb_(src, dest) __asm__("minsb %1,%0" : "=r" (dest) : \
"r" ((char)src) , "0" (dest))
#define _minsw_(src, dest) __asm__("minsw %1,%0" : "=r" (dest) : \
"r" ((short)src) , "0" (dest))
#define _minsd_(src, dest) __asm__("minsd %1,%0" : "=r" (dest) : \
"r" ((int)src) , "0" (dest))
#define _minub_(src, dest) __asm__("minub %1,%0" : "=r" (dest) : \
"r" ((unsigned char)src) , "0" (dest))
#define _minuw_(src, dest) __asm__("minuw %1,%0" : "=r" (dest) : \
"r" ((unsigned short)src) , "0" (dest))
#define _minud_(src, dest) __asm__("minud %1,%0" : "=r" (dest) : \
"r" ((unsigned int)src) , "0" (dest))
/* Move Instructions */
#define _movb_(src, dest) __asm__("movb %1,%0" : "=r" (dest) : \
"ri" ((unsigned char)src) , "0" (dest))
#define _movw_(src, dest) __asm__("movw %1,%0" : "=r" (dest) : \
"ri" ((unsigned short)src) , "0" (dest))
#define _movd_(src, dest) __asm__("movd %1,%0" : "=r" (dest) : \
"ri" ((unsigned int)src) , "0" (dest))
/* mtpr and mfpr Insturctions */
#define _mtpr_(procregd, src) __asm__("mtpr\t%0," procregd : /* no output */ : \
"r" (src) : "cc")
#define _mfpr_(procregd, dest) __asm__("mfpr\t" procregd ",%0" : "=r" (dest) : \
/* no input */ "0" (dest) : "cc")
/* Multiplication Instructions */
#define _mulsbw_(src, dest) __asm__("mulsbw %1,%0" : "=r" (dest) : \
"r" ((char)src) , "0" (dest))
#define _mulubw_(src, dest) __asm__("mulubw %1,%0" : "=r" (dest) : \
"r" ((unsigned char)src) , "0" (dest))
#define _mulswd_(src, dest) __asm__("mulswd %1,%0" : "=r" (dest) : \
"r" ((short)src) , "0" (dest))
#define _muluwd_(src, dest) __asm__("muluwd %1,%0" : "=r" (dest) : \
"r" ((unsigned short)src) , "0" (dest))
#define _mulb_(src, dest) __asm__("mulb %1,%0" : "=r" (dest) : \
"ri" ((char)src) , "0" (dest))
#define _mulw_(src, dest) __asm__("mulw %1,%0" : "=r" (dest) : \
"ri" ((short)src) , "0" (dest))
#define _muld_(src, dest) __asm__("muld %1,%0" : "=r" (dest) : \
"ri" ((int)src) , "0" (dest))
#define _mullsd_(hi, lo, src1, src2) __asm__("mullsd %2,%3" \
: =l (lo), =h (hi) \
: "r" ((unsigned int)src1) , "r" ((unsigned int)src2))
#define _mullud_(hi, lo, src1, src2) __asm__("mullud %2,%3" \
: =l (lo), =h (hi) \
: "r" ((int)src1) , "r" ((int)src2))
/* Q-Format Multiplication Instructions */
#define _mulqb_(src, dest) __asm__("mulqb %1,%0" : "=r" (dest) : \
"r" ((char)src) , "0" (dest))
#define _mulqw_(src, dest) __asm__("mulqw %1,%0" : "=r" (dest) : \
"r" ((short)src) , "0" (dest))
/* nop Instruction */
#define _nop_() __asm__("nop")
/* Negate Instructions */
#define _negb_(src, dest) __asm__("negb %1,%0" : "=r" (dest) : \
"r" ((char)src) , "0" (dest))
#define _negw_(src, dest) __asm__("negw %1,%0" : "=r" (dest) : \
"r" ((short)src) , "0" (dest))
#define _negd_(src, dest) __asm__("negd %1,%0" : "=r" (dest) : \
"r" ((int)src) , "0" (dest))
/* or Instructions */
#define _orb_(src, dest) __asm__("orb %1,%0" : "=r" (dest) : \
"ri" ((unsigned char)src) , "0" (dest))
#define _orw_(src, dest) __asm__("orw %1,%0" : "=r" (dest) : \
"ri" ((unsigned short)src) , "0" (dest))
#define _ord_(src, dest) __asm__("ord %1,%0" : "=r" (dest) : \
"ri" ((unsigned int)src) , "0" (dest))
/* Pop 1's Count Instructions */
#define _popcntb_(src, dest) __asm__("popcntb %1,%0" : "=r" (dest) : \
"r" ((char)src) , "0" (dest))
#define _popcntw_(src, dest) __asm__("popcntw %1,%0" : "=r" (dest) : \
"r" ((short)src) , "0" (dest))
#define _popcntd_(src, dest) __asm__("popcntd %1,%0" : "=r" (dest) : \
"r" ((int)src) , "0" (dest))
/* Rotate and Mask Instructions */
#define _ram_(shift, end, begin, dest, src) __asm__("ram %1, %2, %3, %0, %4" : \
"=r" (dest) : \
"i" ((unsigned char) shift), \
"i" (end), "i" (begin), \
"r" (src), "0" (dest))
#define _rim_(shift, end, begin, dest, src) __asm__("rim %1, %2, %3, %0, %4" : \
"=r" (dest) : \
"i" ((unsigned char) shift), \
"i" (end), "i" (begin), \
"r" (src), "0" (dest))
/* retx Instruction */
#define _retx_() __asm__("retx")
/* Rotate Instructions */
#define _rotb_(shift, dest) __asm__("rotb %1,%0" : "=r" (dest) : \
"i" ((unsigned char)shift) , "0" (dest))
#define _rotw_(shift, dest) __asm__("rotw %1,%0" : "=r" (dest) : \
"i" ((unsigned char)shift) , "0" (dest))
#define _rotd_(shift, dest) __asm__("rotd %1,%0" : "=r" (dest) : \
"i" ((unsigned char)shift) , "0" (dest))
#define _rotlb_(shift, dest) __asm__("rotlb %1,%0" : "=r" (dest) : \
"r" ((unsigned char)shift) , "0" (dest))
#define _rotlw_(shift, dest) __asm__("rotlw %1,%0" : "=r" (dest) : \
"r" ((unsigned char)shift) , "0" (dest))
#define _rotld_(shift, dest) __asm__("rotld %1,%0" : "=r" (dest) : \
"r" ((unsigned char)shift) , "0" (dest))
#define _rotrb_(shift, dest) __asm__("rotrb %1,%0" : "=r" (dest) : \
"r" ((unsigned char)shift) , "0" (dest))
#define _rotrw_(shift, dest) __asm__("rotrw %1,%0" : "=r" (dest) : \
"r" ((unsigned char)shift) , "0" (dest))
#define _rotrd_(shift, dest) __asm__("rotrd %1,%0" : "=r" (dest) : \
"r" ((unsigned char)shift) , "0" (dest))
/* Set Bit Instructions */
#define _sbitb_(pos,dest) __asm__("sbitb %1,%0" : "=mr" (dest) : \
"i" ((unsigned char)pos) , "0" (dest) : "cc")
#define _sbitw_(pos,dest) __asm__("sbitw %1,%0" : "=mr" (dest) : \
"i" ((unsigned char)pos) , "0" (dest) : "cc")
#define _sbitd_(pos,dest) __asm__("sbitd %1,%0" : "=mr" (dest) : \
"i" ((unsigned char)pos) , "0" (dest) : "cc")
/* setrfid Instruction */
#define _setrfid_(src) __asm__("setrfid %0" : /* No output */ : \
"r" (src) : "cc")
/* Sign Extend Instructions */
#define _sextbw_(src, dest) __asm__("sextbw %1,%0" : "=r" (dest) : \
"r" ((char)src) , "0" (dest) )
#define _sextbd_(src, dest) __asm__("sextbd %1,%0" : "=r" (dest) : \
"r" ((char)src) , "0" (dest) )
#define _sextwd_(src, dest) __asm__("sextwd %1,%0" : "=r" (dest) : \
"r" ((short)src) , "0" (dest) )
/* Shift Left Logical Instructions */
#define _sllb_(src, dest) __asm__("sllb %1,%0" : "=r" (dest) : \
"ri" ((unsigned char)src) , "0" (dest))
#define _sllw_(src, dest) __asm__("sllw %1,%0" : "=r" (dest) : \
"ri" ((unsigned char)src) , "0" (dest))
#define _slld_(src, dest) __asm__("slld %1,%0" : "=r" (dest) : \
"ri" ((unsigned char)src) , "0" (dest))
/* Shift Right Arithmetic Instructions */
#define _srab_(src, dest) __asm__("srab %1,%0" : "=r" (dest) : \
"ri" ((unsigned char)src) , "0" (dest))
#define _sraw_(src, dest) __asm__("sraw %1,%0" : "=r" (dest) : \
"ri" ((unsigned char)src) , "0" (dest))
#define _srad_(src, dest) __asm__("srad %1,%0" : "=r" (dest) : \
"ri" ((unsigned char)src) , "0" (dest))
/* Shift Right Logical Instructions */
#define _srlb_(src, dest) __asm__("srlb %1,%0" : "=r" (dest) : \
"ri" ((unsigned char)src) , "0" (dest))
#define _srlw_(src, dest) __asm__("srlw %1,%0" : "=r" (dest) : \
"ri" ((unsigned char)src) , "0" (dest))
#define _srld_(src, dest) __asm__("srld %1,%0" : "=r" (dest) : \
"ri" ((unsigned char)src) , "0" (dest))
/* Store Instructions */
#define _storb_(src,address) __asm__("storb %1,%0" : "=m" (address) : \
"ri" ((unsigned int)src))
#define _storw_(src,address) __asm__("storw %1,%0" : "=m" (address) : \
"ri" ((unsigned int)src))
#define _stord_(src,address) __asm__("stord %1,%0" : "=m" (address) : \
"ri" ((unsigned int)src))
/* Store Multiple Instructions */
#define _storm_(mask, src) __asm__("storm %1,%0" : /* No output here */ : \
"i" (mask) , "r" ((unsigned int)src))
#define _stormp_(mask, src) __asm__("stormp %1,%0" : /* No output here */ : \
"i" (mask) , "r" ((unsigned int)src))
/* Substruct Instructions */
#define _subb_(src, dest) __asm__("subb %1, %0" : "=r" (dest) : \
"ri" ((unsigned char)src), "0" (dest) : "cc")
#define _subw_(src, dest) __asm__("subw %1, %0" : "=r" (dest) : \
"ri" ((unsigned short)src), "0" (dest) : "cc")
#define _subd_(src, dest) __asm__("subd %1, %0" : "=r" (dest) : \
"ri" ((unsigned int)src), "0" (dest) : "cc")
/* Substruct with Carry Instructions */
#define _subcb_(src, dest) __asm__("subcb %1, %0" : "=r" (dest) : \
"ri" ((unsigned char)src), "0" (dest) : "cc")
#define _subcw_(src, dest) __asm__("subcw %1, %0" : "=r" (dest) : \
"ri" ((unsigned short)src), "0" (dest) : "cc")
#define _subcd_(src, dest) __asm__("subcd %1, %0" : "=r" (dest) : \
"ri" ((unsigned int)src), "0" (dest) : "cc")
/* Q-Format Substruct Instructions */
#define _subqb_(src, dest) __asm__("subqw %1,%0" : "=r" (dest) : \
"r" ((char)src) , "0" (dest))
#define _subqw_(src, dest) __asm__("subqw %1,%0" : "=r" (dest) : \
"r" ((short)src) , "0" (dest))
#define _subqd_(src, dest) __asm__("subqd %1,%0" : "=r" (dest) : \
"r" ((short)src) , "0" (dest))
/* Test Bit Instructions */
#define _tbitb_(pos,dest) __asm__("tbitb %0,%1" : /* No output */ : \
"i" ((unsigned char)pos) , "rm" (dest) : "cc")
#define _tbitw_(pos,dest) __asm__("tbitw %0,%1" : /* No output */ : \
"i" ((unsigned char)pos) , "rm" (dest) : "cc")
#define _tbitd_(pos,dest) __asm__("tbitd %0,%1" : /* No output */ : \
"i" ((unsigned char)pos) , "rm" (dest) : "cc")
/* wait Instruction*/
#define _wait_() __asm__ volatile ("wait" : : : "cc")
/* xor Instructions */
#define _xorb_(src, dest) __asm__("xorb %1,%0" : "=r" (dest) : \
"ri" ((unsigned char)src) , "0" (dest))
#define _xorw_(src, dest) __asm__("xorw %1,%0" : "=r" (dest) : \
"ri" ((unsigned short)src) , "0" (dest))
#define _xord_(src, dest) __asm__("xord %1,%0" : "=r" (dest) : \
"ri" ((unsigned int)src) , "0" (dest))
/* Zero Extend Instructions */
#define _zextbw_(src, dest) __asm__("zextbw %1,%0" : "=r" (dest) : \
"r" ((unsigned char)src) , "0" (dest))
#define _zextbd_(src, dest) __asm__("zextbd %1,%0" : "=r" (dest) : \
"r" ((unsigned char)src) , "0" (dest))
#define _zextwd_(src, dest) __asm__("zextwd %1,%0" : "=r" (dest) : \
"r" ((unsigned short)src) , "0" (dest))
#define _save_asm_(x) \
__asm__ volatile (x ::: "memory","cc", \
"r0","r1","r2","r3","r4","r5","r6","r7", \
"r8","r9","r10","r11","r12","r13")
#endif /* _ASM */

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newlib/libc/machine/cr16/sys/libh.h Normal file
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/* libh.h -- CR16 default handlers
*
* Copyright (c) 2004 National Semiconductor Corporation
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
#ifndef _LIBH
#define _LIBH
/* These are the first 16 entries of the default dispatch table as defined
in the CompactRISC architecture:
Entry Function
----- --------
0 NULL
1 nmi
2 NULL
3 NULL
4 NULL
5 svc
6 dvz
7 flg
8 bpt
9 trc
10 und
11 NULL
12 iad
13 NULL
14 dbg
15 ise
*/
extern void (* const _dispatch_table[])(void);
/* Function prototypes */
void svc_handler(void);
void dvz_handler(void);
void flg_handler(void);
void und_handler(void);
void iad_handler(void);
#endif /* _LIBH */

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newlib/libc/machine/cr16/sys/syscall.h Normal file
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/* syscall.h -- CR16 virtual I/O and trap service codes
*
* Copyright (c) 2004 National Semiconductor Corporation
*
* The authors hereby grant permission to use, copy, modify, distribute,
* and license this software and its documentation for any purpose, provided
* that existing copyright notices are retained in all copies and that this
* notice is included verbatim in any distributions. No written agreement,
* license, or royalty fee is required for any of the authorized uses.
* Modifications to this software may be copyrighted by their authors
* and need not follow the licensing terms described here, provided that
* the new terms are clearly indicated on the first page of each file where
* they apply.
*/
#ifndef _SYSCALL_H
#define _SYSCALL_H
#include <sys/asm.h>
/* SVC codes to pass to the debugger */
/* Virtual I/O services */
#define SVC_OPEN 0x401
#define SVC_CLOSE 0x402
#define SVC_READ 0x403
#define SVC_WRITE 0x404
#define SVC_LSEEK 0x405
#define SVC_RENAME 0x406
#define SVC_UNLINK 0x407
#define SVC_GETENV 0x408
/* Time service */
#define SVC_TIME 0x300
/* Start/end of program services */
#define SVC_EOP 0x410
/* Trap services */
#define SVC_SVC 0x505
#define SVC_DVZ 0x506
#define SVC_FLG 0x507
#define SVC_UND 0x50a
#define SVC_IAD 0x50c
/* Places the code of the requested service in R0, then transfers control
to the debugger using the BPT exception.
It is called from the start routine, VIO functions and the trap
handlers. */
#define STRINGIFY(x) #x
#define HOST_SERVICE(service) \
do { \
__asm__("movd\t$" STRINGIFY(service) ",(r1,r0)"); \
_excp_(svc); \
} while (0)
#endif /* _SYSCALL_H */