Fix tic54x testsuite failures and Lmem disassembly bugs.

This commit is contained in:
Tim Wall 2001-11-13 14:22:52 +00:00
parent 28f8744e02
commit 7d9961e897
5 changed files with 65 additions and 40 deletions

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@ -1,3 +1,10 @@
2001-11-11 Timothy Wall <twall@alum.mit.edu>
* ti.h: Move arch-specific stuff from here...
(COFF_ADJUST_SYM_IN/OUT): Optionally put page flag into symbol
value.
* tic54x.h: ...to here.
2001-10-26 Christian Groessler <cpg@aladdin.de>
* external.h (GET_LINENO_LNNO): Fix usage of H_GET_32/16.

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@ -95,7 +95,7 @@ struct external_filehdr
do \
{ \
((struct internal_filehdr *)(dst))->f_target_id = \
H_GET_16 (abfd, ((FILHDR *)(src))->f_target_id); \
H_GET_16 (abfd, ((FILHDR *)(src))->f_target_id); \
} \
while (0)
#endif
@ -260,27 +260,6 @@ struct external_scnhdr {
} \
while (0)
/* Page macros
The first GDB port requires flags in its remote memory access commands to
distinguish between data/prog space. Hopefully we can make this go away
eventually. Stuff the page in the upper bits of a 32-bit address, since
the c5x family only uses 16 or 23 bits.
c2x, c5x and most c54x devices have 16-bit addresses, but the c548 has
23-bit program addresses. Make sure the page flags don't interfere.
These flags are used by GDB to identify the destination page for
addresses.
*/
/* recognized load pages */
#define PG_PROG 0x0 /* PROG page */
#define PG_DATA 0x1 /* DATA page */
#define ADDR_MASK 0x00FFFFFF
#define PG_TO_FLAG(p) (((unsigned long)(p) & 0xFF) << 24)
#define FLAG_TO_PG(f) (((f) >> 24) & 0xFF)
/*
* names of "special" sections
*/
@ -411,13 +390,23 @@ union external_auxent {
H_PUT_16 (abfd, ((class != C_FIELD) ? (in) * 8 : (in)), \
ext->x_sym.x_misc.x_lnsz.x_size)
/* TI COFF stores offsets for MOS and MOU in bits; BFD expects bytes */
/* TI COFF stores offsets for MOS and MOU in bits; BFD expects bytes
Also put the load page flag of the section into the symbol value if it's an
address. */
#ifndef NEEDS_PAGE
#define NEEDS_PAGE(X) 0
#define PAGE_MASK 0
#endif
#define COFF_ADJUST_SYM_IN_POST(ABFD, EXT, INT) \
do \
{ \
struct internal_syment *dst = (struct internal_syment *)(INT); \
if (dst->n_sclass == C_MOS || dst->n_sclass == C_MOU) \
dst->n_value /= 8; \
else if (NEEDS_PAGE (dst->n_sclass)) { \
asection *scn = coff_section_from_bfd_index (abfd, dst->n_scnum); \
dst->n_value |= (scn->lma & PAGE_MASK); \
} \
} \
while (0)
@ -428,6 +417,9 @@ union external_auxent {
SYMENT *dst = (SYMENT *)(EXT); \
if (src->n_sclass == C_MOU || src->n_sclass == C_MOS) \
H_PUT_32 (abfd, src->n_value * 8, dst->e_value); \
else if (NEEDS_PAGE (src->n_sclass)) { \
H_PUT_32 (abfd, src->n_value &= ~PAGE_MASK, dst->e_value); \
} \
} \
while (0)

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@ -18,8 +18,8 @@
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#ifndef COFF_TIC54X_H
#define COFF_TIC54X_H
#define TIC54X_TARGET_ID 0x98
#define TIC54XALGMAGIC 0x009B /* c54x algebraic assembler output */
#define TIC5X_TARGET_ID 0x92
@ -29,6 +29,31 @@
#define TICOFF_TARGET_ARCH bfd_arch_tic54x
#define TICOFF_DEFAULT_MAGIC TICOFF1MAGIC /* we use COFF1 for compatibility */
/* Page macros
The first GDB port requires flags in its remote memory access commands to
distinguish between data/prog space. Hopefully we can make this go away
eventually. Stuff the page in the upper bits of a 32-bit address, since
the c5x family only uses 16 or 23 bits.
c2x, c5x and most c54x devices have 16-bit addresses, but the c548 has
23-bit program addresses. Make sure the page flags don't interfere.
These flags are used by GDB to identify the destination page for
addresses.
*/
/* Recognized load pages (by common convention). */
#define PG_PROG 0x0 /* PROG page */
#define PG_DATA 0x1 /* DATA page */
#define PG_IO 0x2 /* I/O page */
/** Indicate whether the given storage class requires a page flag. */
#define NEEDS_PAGE(X) ((X)==C_EXT)
#define PAGE_MASK 0xFF000000
#define ADDR_MASK 0x00FFFFFF
#define PG_TO_FLAG(p) (((unsigned long)(p) & 0xFF) << 24)
#define FLAG_TO_PG(f) (((f) >> 24) & 0xFF)
#include "coff/ti.h"
#endif /* COFF_TIC54X_H */

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@ -1,3 +1,8 @@
2001-11-11 Timothy Wall <twall@alum.mit.edu>
* tic54x.h: Revise opcode layout; don't really need a separate
structure for parallel opcodes.
2001-11-13 Zack Weinberg <zack@codesourcery.com>
Alan Modra <amodra@bigpond.net.au>

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@ -19,8 +19,8 @@ along with this file; see the file COPYING. If not, write to the Free
Software Foundation, 59 Temple Place - Suite 330, Boston, MA
02111-1307, USA. */
#ifndef _TIC54X_H_
#define _TIC54X_H_
#ifndef _opcode_tic54x_h_
#define _opcode_tic54x_h_
typedef struct _symbol
{
@ -86,7 +86,6 @@ typedef struct _template
{
/* The opcode mnemonic */
const char *name;
unsigned int words; /* insn size in words */
int minops, maxops; /* min/max operand count */
/* The significant bits in the opcode. Other bits are zero.
@ -141,27 +140,24 @@ typedef struct _template
#define FL_NR 0x100 /* no repeat allowed */
#define FL_SMR 0x200 /* Smem read (for flagging write-only *+ARx */
#define FL_PAR 0x400 /* Parallel instruction. */
unsigned short opcode2, mask2; /* some insns have an extended opcode */
const char* parname;
enum optype paroperand_types[MAX_OPERANDS];
} template;
typedef struct _partemplate {
char *name;
char *parname;
unsigned int words; /* length in words */
int minops, maxops; /* min/max operand count for 2nd part of insn */
unsigned short opcode;
unsigned short mask;
enum optype operand_types[MAX_OPERANDS];
enum optype paroperand_types[MAX_OPERANDS];
} partemplate;
extern const template tic54x_unknown_opcode;
extern const template tic54x_optab[];
extern const partemplate tic54x_paroptab[];
extern const template tic54x_paroptab[];
extern const symbol mmregs[], regs[];
extern const symbol condition_codes[], cc2_codes[], status_bits[];
extern const symbol cc3_codes[];
extern const char *misc_symbols[];
struct disassemble_info;
extern const template* tic54x_get_insn (struct disassemble_info *,
bfd_vma, unsigned short, int *);
#endif /* TIC54X_H */
#endif /* _opcode_tic54x_h_ */