or1k: Avoid write outside setjmp buf & shrink buf
Update the offsets used to save registers into the stejmp jmp_buf structure in order to: * Avoid writing the supervision register outside the buffer and thus clobbering something on the stack. Previously the supervision register was written at offset 124 while the buffer was of length 124. * Shrink the jmp_buf down to the size actually needed, by avoiding holes at the locations of omitted registers.
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@ -2,7 +2,10 @@
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_BEGIN_STD_C
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#if defined(__or1k__) || defined(__or1knd__)
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#define _JBLEN 31 /* 32 GPRs - r0 */
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/*
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* r1, r2, r9, r14, r16 .. r30, SR.
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*/
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#define _JBLEN 13
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#define _JBTYPE unsigned long
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#endif
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@ -29,25 +29,25 @@ SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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.type setjmp,@function
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setjmp:
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l.sw 4(r3), r1
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l.sw 8(r3), r2
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l.sw 0(r3), r1
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l.sw 4(r3), r2
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/* Skip r3-r8 as they are not preserved across function calls */
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l.sw 36(r3), r9
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l.sw 8(r3), r9
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/* Skip r10 as it's preserved to be used by TLS */
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/* Skip r11, setjmp always set it to 0 */
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/* The following set if registers are preserved across function calls */
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l.sw 52(r3), r14
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l.sw 60(r3), r16
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l.sw 68(r3), r18
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l.sw 76(r3), r20
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l.sw 84(r3), r22
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l.sw 92(r3), r24
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l.sw 100(r3), r26
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l.sw 108(r3), r28
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l.sw 116(r3), r30
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l.sw 12(r3), r14
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l.sw 16(r3), r16
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l.sw 20(r3), r18
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l.sw 24(r3), r20
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l.sw 28(r3), r22
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l.sw 32(r3), r24
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l.sw 36(r3), r26
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l.sw 40(r3), r28
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l.sw 44(r3), r30
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/* Save Status Register */
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l.mfspr r13, r0, 17
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l.sw 124(r3), r13
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l.sw 48(r3), r13
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/* Set result register to 0 and jump */
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// Different cases for optional delay slot
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#if defined(__OR1K_NODELAY__)
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@ -77,32 +77,32 @@ longjmp:
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/* Load status register */
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1:
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l.lwz r15, 124(r3)
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l.lwz r15, 48(r3)
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l.mtspr r0, r15, 17
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l.lwz r1, 4(r3)
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l.lwz r2, 8(r3)
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l.lwz r1, 0(r3)
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l.lwz r2, 4(r3)
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/* Skip r3-r8 as they are not preserved across function calls */
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l.lwz r9, 36(r3)
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l.lwz r9, 8(r3)
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/* Skip r11 as it's always set by longjmp */
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l.lwz r14, 52(r3)
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l.lwz r16, 60(r3)
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l.lwz r18, 68(r3)
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l.lwz r20, 76(r3)
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l.lwz r22, 84(r3)
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l.lwz r24, 92(r3)
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l.lwz r26, 100(r3)
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l.lwz r28, 108(r3)
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l.lwz r14, 12(r3)
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l.lwz r16, 16(r3)
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l.lwz r18, 20(r3)
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l.lwz r20, 24(r3)
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l.lwz r22, 28(r3)
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l.lwz r24, 32(r3)
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l.lwz r26, 36(r3)
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l.lwz r28, 40(r3)
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// Different cases for optional delay slot
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#if defined(__OR1K_NODELAY__)
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l.lwz r30, 116(r3)
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l.lwz r30, 44(r3)
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l.jr r9
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#elif defined(__OR1K_DELAY__)
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l.jr r9
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l.lwz r30, 116(r3)
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l.lwz r30, 44(r3)
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#else
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l.lwz r30, 116(r3)
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l.lwz r30, 44(r3)
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l.jr r9
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l.nop
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#endif
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