Add "attn", "lq" and "stq" power4 insns.
This commit is contained in:
Alan Modra
parent
531297a749
commit
68afda5334
@ -1,3 +1,7 @@
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2003-06-10 Gary Hade <garyhade@us.ibm.com>
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* ppc.h (PPC_OPERAND_DQ): Define.
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2003-06-10 Richard Sandiford <rsandifo@redhat.com>
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* h8300.h (IMM4_NS, IMM8_NS): New.
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@ -7,7 +11,7 @@
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2003-06-03 Michael Snyder <msnyder@redhat.com>
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* h8sx.h (enum h8_model): Add AV_H8S to distinguish from H8H.
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(ldc): Split ccr ops from exr ops (which are only available
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(ldc): Split ccr ops from exr ops (which are only available
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on H8S or H8SX).
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(stc): Ditto.
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(andc, orc, xorc): Ditto.
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@ -160,7 +164,7 @@
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fields.
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(h8_opcodes). Modify initializer and initializer macros to no
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longer initialize the removed fields.
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2002-11-19 Svein E. Seldal <Svein.Seldal@solidas.com>
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* tic4x.h (c4x_insts): Fixed LDHI constraint
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@ -197,10 +201,10 @@
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* cgen.h: Test __BFD_H_SEEN__ rather than BFD_VERSION_DATE.
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2002-09-30 Gavin Romig-Koch <gavin@redhat.com>
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Ken Raeburn <raeburn@cygnus.com>
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Aldy Hernandez <aldyh@redhat.com>
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Eric Christopher <echristo@redhat.com>
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Richard Sandiford <rsandifo@redhat.com>
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Ken Raeburn <raeburn@cygnus.com>
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Aldy Hernandez <aldyh@redhat.com>
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Eric Christopher <echristo@redhat.com>
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Richard Sandiford <rsandifo@redhat.com>
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* mips.h: Update comment for new opcodes.
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(OP_MASK_VECBYTE, OP_SH_VECBYTE): New.
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@ -211,12 +215,12 @@
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Don't match CPU_R4111 with INSN_4100.
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2002-08-19 Elena Zannoni <ezannoni@redhat.com>
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From matthew green <mrg@redhat.com>
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* ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
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From matthew green <mrg@redhat.com>
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* ppc.h (PPC_OPCODE_SPE): New opcode flag for Powerpc e500
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instructions.
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(PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
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(PPC_OPCODE_ISEL, PPC_OPCODE_BRLOCK, PPC_OPCODE_PMR,
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PPC_OPCODE_CACHELCK, PPC_OPCODE_RFMCI): New opcode flags for the
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e500x2 Integer select, branch locking, performance monitor,
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cache locking and machine check APUs, respectively.
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@ -271,9 +275,9 @@
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2002-05-17 Andrey Volkov <avolkov@sources.redhat.com>
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* h8300.h: Corrected defs of all control regs
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* h8300.h: Corrected defs of all control regs
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and eepmov instr.
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2002-04-11 Alan Modra <amodra@bigpond.net.au>
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* i386.h: Add intel mode cmpsd and movsd.
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@ -540,9 +544,9 @@ Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
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2001-02-02 Patrick Macdonald <patrickm@redhat.com>
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* cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
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(CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
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(CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
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* cgen.h (CGEN_SYNTAX_CHAR_TYPE): Typedef as unsigned short.
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(CGEN_MAX_SYNTAX_ELEMENTS): Rename from CGEN_MAX_SYNTAX_BYTES.
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(CGEN_SYNTAX): Define using CGEN_MAX_SYNTAX_ELEMENTS.
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2001-01-24 Karsten Keil <kkeil@suse.de>
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@ -617,35 +621,35 @@ Mon Dec 31 16:45:41 2001 Jeffrey A Law (law@cygnus.com)
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2000-12-01 Chris Demetriou <cgd@sibyte.com>
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mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
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(OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
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OP_*_SYSCALL definitions.
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(OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
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19 bit wait codes.
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(MIPS operand specifier comments): Remove 'm', add 'U' and
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'J', and update the meaning of 'B' so that it's more general.
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mips.h (OP_MASK_SYSCALL, OP_SH_SYSCALL): Delete.
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(OP_MASK_CODE20, OP_SH_CODE20): Define, with values of old
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OP_*_SYSCALL definitions.
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(OP_SH_CODE19, OP_MASK_CODE19): Define, for use as
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19 bit wait codes.
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(MIPS operand specifier comments): Remove 'm', add 'U' and
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'J', and update the meaning of 'B' so that it's more general.
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* mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
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INSN_ISA5): Renumber, redefine to mean the ISA at which the
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instruction was added.
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(INSN_ISA32): New constant.
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(INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
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Renumber to avoid new and/or renumbered INSN_* constants.
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(INSN_MIPS32): Delete.
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(ISA_UNKNOWN): New constant to indicate unknown ISA.
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(ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
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ISA_MIPS32): New constants, defined to be the mask of INSN_*
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constants available at that ISA level.
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(CPU_UNKNOWN): New constant to indicate unknown CPU.
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(CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
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define it with a unique value.
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(OPCODE_IS_MEMBER): Update for new ISA membership-related
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constant meanings.
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* mips.h (INSN_ISA1, INSN_ISA2, INSN_ISA3, INSN_ISA4,
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INSN_ISA5): Renumber, redefine to mean the ISA at which the
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instruction was added.
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(INSN_ISA32): New constant.
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(INSN_4650, INSN_4010, INSN_4100, INSN_3900, INSN_GP32):
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Renumber to avoid new and/or renumbered INSN_* constants.
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(INSN_MIPS32): Delete.
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(ISA_UNKNOWN): New constant to indicate unknown ISA.
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(ISA_MIPS1, ISA_MIPS2, ISA_MIPS3, ISA_MIPS4, ISA_MIPS5,
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ISA_MIPS32): New constants, defined to be the mask of INSN_*
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constants available at that ISA level.
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(CPU_UNKNOWN): New constant to indicate unknown CPU.
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(CPU_4K, CPU_MIPS32_4K): Rename the former to the latter,
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define it with a unique value.
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(OPCODE_IS_MEMBER): Update for new ISA membership-related
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constant meanings.
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* mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
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definitions.
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* mips.h (INSN_ISA64, ISA_MIPS5, ISA_MIPS64): New
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definitions.
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* mips.h (CPU_SB1): New constant.
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* mips.h (CPU_SB1): New constant.
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2000-10-20 Jakub Jelinek <jakub@redhat.com>
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@ -826,14 +830,14 @@ Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
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2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
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* d30v.h:
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(SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
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(SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
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(SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
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(SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
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(SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
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(LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
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(LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
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* d30v.h:
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(SHORT_B2r, SHORT_B3, SHORT_B3r, SHORT_B3b, SHORT_B3br): Updated.
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(SHORT_D1r, SHORT_D2, SHORT_D2r, SHORT_D2Br, SHORT_U): Updated.
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(SHORT_F, SHORT_AF, SHORT_T, SHORT_A5, SHORT_CMP, SHORT_CMPU): Updated.
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(SHORT_A1, SHORT_AA, SHORT_RA, SHORT_MODINC, SHORT_MODDEC): Updated.
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(SHORT_C1, SHORT_C2, SHORT_UF, SHORT_A2, SHORT_NONE, LONG): Updated.
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(LONG_U, LONG_Ur, LONG_CMP, LONG_M, LONG_M2, LONG_2, LONG_2r): Updated.
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(LONG_2b, LONG_2br, LONG_D, LONG_Dr, LONG_Dbr): Updated.
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2000-02-25 Alan Modra <alan@spri.levels.unisa.edu.au>
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@ -843,7 +847,7 @@ Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
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2000-02-24 Nick Clifton <nickc@cygnus.com>
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* cgen.h (cgen_cpu_desc): Rename field 'flags' to
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'signed_overflow_ok_p'.
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'signed_overflow_ok_p'.
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Delete prototypes for cgen_set_flags() and cgen_get_flags().
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2000-02-24 Andrew Haley <aph@cygnus.com>
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@ -912,14 +916,14 @@ Wed Nov 24 20:28:58 1999 Jeffrey A Law (law@cygnus.com)
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Sun Oct 10 01:46:56 1999 Jerry Quinn <jerry.quinn.adv91@alum.dartmouth.org>
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* hppa.h (pa_opcodes): Add load and store cache control to
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* hppa.h (pa_opcodes): Add load and store cache control to
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instructions. Add ordered access load and store.
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* hppa.h (pa_opcode): Add new entries for addb and addib.
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* hppa.h (pa_opcodes): Fix cmpb and cmpib entries.
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* hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
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* hppa.h (pa_opcodes): Add entries for cmpb and cmpib.
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Thu Oct 7 00:12:25 MDT 1999 Diego Novillo <dnovillo@cygnus.com>
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@ -1003,22 +1007,22 @@ Sat Aug 28 00:25:25 1999 Jerry Quinn <jquinn@nortelnetworks.com>
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* hppa.h (pa_opcodes): Add extrd, extrw, depd, depdi, depw, depwi.
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Add supporting args.
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* hppa.h: Document new completers and args.
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* hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
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* hppa.h: Document new completers and args.
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* hppa.h (pa_opcodes): Add 64 bit patterns and pa2.0 syntax for uxor,
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uaddcm, dcor, addi, add, sub, subi, shladd, rfi, and probe. Add pa2.0
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extensions for ssm, rsm, pdtlb, pitlb. Add performance instructions
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pmenb and pmdis.
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* hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
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* hppa.h (pa_opcodes): Add pa2.0 instructions hadd, hshl,
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hshr, hsub, mixh, mixw, permh.
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* hppa.h (pa_opcodes): Change completers in instructions to
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use 'c' prefix.
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* hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
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* hppa.h (pa_opcodes): Add popbts, new forms of bb, havg,
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hshladd, hshradd, shrpd, and shrpw instructions. Update arg comments.
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* hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
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* hppa.h (pa_opcodes): Change fmpyfadd, fmpynfadd, fneg,
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fnegabs to use 'I' instead of 'F'.
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1999-08-21 Alan Modra <alan@spri.levels.unisa.edu.au>
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@ -1036,7 +1040,7 @@ Fri Aug 6 09:46:35 1999 Jerry Quinn <jquinn@nortelnetworks.com>
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* hppa.h (pa_opcodes): Add 64 bit versions of or, xor, and,
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and andcm. Add 32 and 64 bit version of cmpclr, cmpiclr.
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* hppa.h: Document 64 bit condition completers.
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* hppa.h: Document 64 bit condition completers.
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Thu Aug 5 16:56:07 1999 Jerry Quinn <jquinn@nortelnetworks.com>
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@ -1055,7 +1059,7 @@ Wed Jul 28 02:04:24 1999 Jerry Quinn <jquinn@nortelnetworks.com>
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* hppa.h (pa_opcodes): Mark all PA2.0 opcodes with FLAG_STRICT.
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* hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
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* hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
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and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
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1999-07-13 Alan Modra <alan@spri.levels.unisa.edu.au>
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@ -1212,22 +1216,22 @@ Sat Feb 13 14:13:44 1999 Richard Henderson <rth@cygnus.com>
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Mon Feb 1 21:09:14 1999 Catherine Moore <clm@cygnus.com>
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* i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
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(x_FP, d_FP, dls_FP, sldx_FP): Define.
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Change *Suf definitions to include x and d suffixes.
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(movsx): Use w_Suf and b_Suf.
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(movzx): Likewise.
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(movs): Use bwld_Suf.
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(fld): Change ordering. Use sld_FP.
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(fild): Add Intel Syntax equivalent of fildq.
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(fst): Use sld_FP.
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(fist): Use sld_FP.
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(fstp): Use sld_FP. Add x_FP version.
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(fistp): LLongMem version for Intel Syntax.
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(fcom, fcomp): Use sld_FP.
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(fadd, fiadd, fsub): Use sld_FP.
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(fsubr): Use sld_FP.
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(fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
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* i386.h (d_Suf, x_Suf, sld_Suf, sldx_Suf, bwld_Suf): Define.
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(x_FP, d_FP, dls_FP, sldx_FP): Define.
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Change *Suf definitions to include x and d suffixes.
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(movsx): Use w_Suf and b_Suf.
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(movzx): Likewise.
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(movs): Use bwld_Suf.
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(fld): Change ordering. Use sld_FP.
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(fild): Add Intel Syntax equivalent of fildq.
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(fst): Use sld_FP.
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(fist): Use sld_FP.
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(fstp): Use sld_FP. Add x_FP version.
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(fistp): LLongMem version for Intel Syntax.
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(fcom, fcomp): Use sld_FP.
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(fadd, fiadd, fsub): Use sld_FP.
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(fsubr): Use sld_FP.
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(fmul, fimul, fdvi, fidiv, fdivr): Use sld_FP.
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1999-01-27 Doug Evans <devans@casey.cygnus.com>
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@ -1797,7 +1801,7 @@ Fri Apr 4 14:02:32 1997 Ian Lance Taylor <ian@cygnus.com>
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Tue Mar 25 22:57:26 1997 Stu Grossman (grossman@critters.cygnus.com)
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* v850.h (extract): Make unsigned.
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* v850.h (extract): Make unsigned.
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Mon Mar 24 14:38:15 1997 Ian Lance Taylor <ian@cygnus.com>
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@ -2015,7 +2019,7 @@ Wed Oct 2 21:31:26 1996 Jeffrey A Law (law@cygnus.com)
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Fri Sep 27 18:26:46 1996 Stu Grossman (grossman@critters.cygnus.com)
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* v850.h: Add new flag to indicate this instruction uses a PC
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* v850.h: Add new flag to indicate this instruction uses a PC
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displacement.
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Fri Sep 13 14:58:13 1996 Jeffrey A Law (law@cygnus.com)
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@ -2384,9 +2388,9 @@ Mon Jan 23 16:45:43 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
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Sat Jan 21 17:50:38 1995 Pat Rankin (rankin@eql.caltech.edu)
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* vax.h (struct vot_wot, field `args'): Make it pointer to const
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* vax.h (struct vot_wot, field `args'): Make it pointer to const
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char.
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(struct vot, field `name'): ditto.
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(struct vot, field `name'): ditto.
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Thu Jan 19 14:47:53 1995 Ken Raeburn <raeburn@cujo.cygnus.com>
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@ -2642,7 +2646,7 @@ Thu Aug 5 09:15:17 1993 Jim Kingdon (kingdon@lioth.cygnus.com)
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Fri Jul 30 18:41:11 1993 John Gilmore (gnu@cygnus.com)
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* sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
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* sparc.h (F_JSR, F_UNBR, F_CONDBR): Add new flags to mark
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jump instructions, for use in disassemblers.
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Thu Jul 22 07:25:27 1993 Ian Lance Taylor (ian@cygnus.com)
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@ -2761,29 +2765,29 @@ Fri Apr 9 13:26:16 1993 Jim Kingdon (kingdon@cygnus.com)
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Thu Mar 18 13:45:31 1993 Per Bothner (bothner@rtl.cygnus.com)
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* i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
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* mips.h: Add casts, to suppress warnings about shifting too much.
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* m68k.h: Document the placement code '9'.
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* i386.h: 486 extensions from John Hassey (hassey@dg-rtp.dg.com).
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* mips.h: Add casts, to suppress warnings about shifting too much.
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* m68k.h: Document the placement code '9'.
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Thu Feb 18 02:03:14 1993 John Gilmore (gnu@cygnus.com)
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* m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
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* m68k.h (BREAK_UP_BIG_DECL, AND_OTHER_PART): Add kludge which
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allows callers to break up the large initialized struct full of
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opcodes into two half-sized ones. This permits GCC to compile
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this module, since it takes exponential space for initializers.
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(numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
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(numopcodes, endop): Revise to use AND_OTHER_PART in size calcs.
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Thu Feb 4 02:06:56 1993 John Gilmore (gnu@cygnus.com)
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* a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
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* convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
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* a29k.h: Remove RCS crud, update GPL to v2, update copyrights.
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* convex.h: Added, from GDB's convx-opcode.h. Added CONST to all
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initialized structs in it.
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Thu Jan 28 21:32:22 1993 John Gilmore (gnu@cygnus.com)
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Delta 88 changes inspired by Carl Greco, <cgreco@Creighton.Edu>:
|
||||
* m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
|
||||
(AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
|
||||
* m88k.h (PMEM): Avoid previous definition from <sys/param.h>.
|
||||
(AND): Change to AND_ to avoid ansidecl.h `AND' conflict.
|
||||
|
||||
Sat Jan 23 18:10:49 PST 1993 Ralph Campbell (ralphc@pyramid.com)
|
||||
|
||||
@ -2799,7 +2803,7 @@ Sun Jan 3 14:13:35 1993 Steve Chamberlain (sac@thepub.cygnus.com)
|
||||
|
||||
Mon Dec 21 21:29:08 1992 Stu Grossman (grossman at cygnus.com)
|
||||
|
||||
* hppa.h: Move handy aliases to the front. Fix masks for extract
|
||||
* hppa.h: Move handy aliases to the front. Fix masks for extract
|
||||
and deposit instructions.
|
||||
|
||||
Sat Dec 12 16:09:48 1992 Ian Lance Taylor (ian@cygnus.com)
|
||||
@ -2834,7 +2838,7 @@ Tue Sep 22 14:08:14 1992 Ken Raeburn (raeburn@cambridge.cygnus.com)
|
||||
|
||||
Tue Sep 22 00:38:41 1992 John Gilmore (gnu@cygnus.com)
|
||||
|
||||
* mips.h (break): Disassemble the argument. Patch from
|
||||
* mips.h (break): Disassemble the argument. Patch from
|
||||
jonathan@cs.stanford.edu (Jonathan Stone).
|
||||
|
||||
Wed Sep 9 11:25:28 1992 Ian Lance Taylor (ian@cygnus.com)
|
||||
@ -2871,10 +2875,10 @@ Wed Aug 19 11:22:24 1992 Ian Lance Taylor (ian@cygnus.com)
|
||||
|
||||
Fri Aug 14 14:20:38 1992 Per Bothner (bothner@cygnus.com)
|
||||
|
||||
* m68k.h: Merged in patches (mostly m68040-specific) from
|
||||
* m68k.h: Merged in patches (mostly m68040-specific) from
|
||||
Colin Smith <colin@wrs.com>.
|
||||
|
||||
* m68k.h: Merged m68kmri.h and m68k.h (using the former as a
|
||||
* m68k.h: Merged m68kmri.h and m68k.h (using the former as a
|
||||
base). Also cleaned up duplicates, re-ordered instructions for
|
||||
the sake of dis-assembling (so aliases come after standard names).
|
||||
* m68kmri.h: Now just defines some macros, and #includes m68k.h.
|
||||
@ -2892,24 +2896,24 @@ Mon Aug 10 23:22:33 1992 Ken Raeburn (raeburn@cygnus.com)
|
||||
|
||||
Sun Jun 28 13:29:03 1992 Fred Fish (fnf@cygnus.com)
|
||||
|
||||
* h8300.h: Finish filling in all the holes in the opcode table,
|
||||
* h8300.h: Finish filling in all the holes in the opcode table,
|
||||
so that the Lucid C compiler can digest this as well...
|
||||
|
||||
Fri Jun 26 21:27:17 1992 John Gilmore (gnu at cygnus.com)
|
||||
|
||||
* i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
|
||||
* i386.h: Add setc, setnc, addr16, data16, repz, repnz aliases.
|
||||
Fix opcodes on various sizes of fild/fist instructions
|
||||
(16bit=no suffix, 32bit="l" suffix, 64bit="ll" suffix).
|
||||
Use tabs to indent for comments. Fixes suggested by Minh Tran-Le.
|
||||
|
||||
Thu Jun 25 16:13:26 1992 Stu Grossman (grossman at cygnus.com)
|
||||
|
||||
* h8300.h: Fill in all the holes in the opcode table so that the
|
||||
* h8300.h: Fill in all the holes in the opcode table so that the
|
||||
losing HPUX C compiler can digest this...
|
||||
|
||||
Thu Jun 11 12:15:25 1992 John Gilmore (gnu at cygnus.com)
|
||||
|
||||
* mips.h: Fix decoding of coprocessor instructions, somewhat.
|
||||
* mips.h: Fix decoding of coprocessor instructions, somewhat.
|
||||
(Fix by Eric Anderson, 3jean@maas-neotek.arc.nasa.gov.)
|
||||
|
||||
Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
|
||||
@ -2919,35 +2923,35 @@ Thu May 28 11:17:44 1992 Jim Wilson (wilson@sphagnum.cygnus.com)
|
||||
|
||||
Tue May 5 14:23:27 1992 Per Bothner (bothner@rtl.cygnus.com)
|
||||
|
||||
* mips.h: Add some more opcode synonyms (from Frank Yellin,
|
||||
* mips.h: Add some more opcode synonyms (from Frank Yellin,
|
||||
fy@lucid.com).
|
||||
|
||||
Thu Apr 16 18:25:26 1992 Per Bothner (bothner@cygnus.com)
|
||||
|
||||
* rs6k.h: New version from IBM (Metin).
|
||||
* rs6k.h: New version from IBM (Metin).
|
||||
|
||||
Thu Apr 9 00:31:19 1992 Per Bothner (bothner@rtl.cygnus.com)
|
||||
|
||||
* rs6k.h: Fix incorrect extended opcode for instructions `fm'
|
||||
and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
|
||||
and `fd'. (From metin@ibmpa.awdpa.ibm.com (Metin G. Ozisik).)
|
||||
|
||||
Tue Apr 7 13:38:47 1992 Stu Grossman (grossman at cygnus.com)
|
||||
|
||||
* rs6k.h: Move from ../../gdb/rs6k-opcode.h.
|
||||
* rs6k.h: Move from ../../gdb/rs6k-opcode.h.
|
||||
|
||||
Fri Apr 3 11:30:20 1992 Fred Fish (fnf@cygnus.com)
|
||||
|
||||
* m68k.h (one, two): Cast macro args to unsigned to suppress
|
||||
* m68k.h (one, two): Cast macro args to unsigned to suppress
|
||||
complaints from compiler and lint about integer overflow during
|
||||
shift.
|
||||
|
||||
Sun Mar 29 12:22:08 1992 John Gilmore (gnu at cygnus.com)
|
||||
|
||||
* sparc.h (OP): Avoid signed overflow when shifting to high order bit.
|
||||
* sparc.h (OP): Avoid signed overflow when shifting to high order bit.
|
||||
|
||||
Fri Mar 6 00:22:38 1992 John Gilmore (gnu at cygnus.com)
|
||||
|
||||
* mips.h: Make bitfield layout depend on the HOST compiler,
|
||||
* mips.h: Make bitfield layout depend on the HOST compiler,
|
||||
not on the TARGET system.
|
||||
|
||||
Fri Feb 21 01:29:51 1992 K. Richard Pixley (rich@cygnus.com)
|
||||
@ -2962,15 +2966,15 @@ Thu Jan 30 07:31:44 1992 Steve Chamberlain (sac at rtl.cygnus.com)
|
||||
|
||||
Thu Jan 30 01:07:24 1992 John Gilmore (gnu at cygnus.com)
|
||||
|
||||
* sparc.h: Remove "cypress" architecture. Remove "fitox" and
|
||||
* sparc.h: Remove "cypress" architecture. Remove "fitox" and
|
||||
similar instructions -- they've been renamed to "fitoq", etc.
|
||||
REALLY fix tsubcctv. Fix "fcmpeq" and "fcmpq" which had wrong
|
||||
number of arguments.
|
||||
* h8300.h: Remove extra ; which produces compiler warning.
|
||||
* h8300.h: Remove extra ; which produces compiler warning.
|
||||
|
||||
Tue Jan 28 22:59:22 1992 Stu Grossman (grossman at cygnus.com)
|
||||
|
||||
* sparc.h: fix opcode for tsubcctv.
|
||||
* sparc.h: fix opcode for tsubcctv.
|
||||
|
||||
Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
|
||||
|
||||
@ -2978,7 +2982,7 @@ Tue Jan 7 17:19:39 1992 K. Richard Pixley (rich at cygnus.com)
|
||||
|
||||
Fri Dec 27 10:55:50 1991 Per Bothner (bothner at cygnus.com)
|
||||
|
||||
* sparc.h (nop): Made the 'lose' field be even tighter,
|
||||
* sparc.h (nop): Made the 'lose' field be even tighter,
|
||||
so only a standard 'nop' is disassembled as a nop.
|
||||
|
||||
Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
|
||||
@ -2988,7 +2992,7 @@ Sun Dec 22 12:18:18 1991 Michael Tiemann (tiemann at cygnus.com)
|
||||
|
||||
Wed Dec 18 17:19:44 1991 Stu Grossman (grossman at cygnus.com)
|
||||
|
||||
* m68k.h, sparc.h: ANSIfy enums.
|
||||
* m68k.h, sparc.h: ANSIfy enums.
|
||||
|
||||
Tue Dec 10 00:22:20 1991 K. Richard Pixley (rich at rtl.cygnus.com)
|
||||
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
/* ppc.h -- Header file for PowerPC opcode table
|
||||
Copyright 1994, 1995, 1999, 2000, 2001, 2002
|
||||
Copyright 1994, 1995, 1999, 2000, 2001, 2002, 2003
|
||||
Free Software Foundation, Inc.
|
||||
Written by Ian Lance Taylor, Cygnus Support
|
||||
|
||||
@ -273,6 +273,9 @@ extern const struct powerpc_operand powerpc_operands[];
|
||||
|
||||
/* This operand is for the DS field in a DS form instruction. */
|
||||
#define PPC_OPERAND_DS (020000)
|
||||
|
||||
/* This operand is for the DQ field in a DQ form instruction. */
|
||||
#define PPC_OPERAND_DQ (040000)
|
||||
|
||||
/* The POWER and PowerPC assemblers use a few macros. We keep them
|
||||
with the operands table for simplicity. The macro table is an
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user