bfd
* Makefile.am (ALL_MACHINES): Add cpu-rx.lo. (ALL_MACHINES_CFILES): Add cpu-rx.c. (BFD32_BACKENDS): Add elf32-rx.lo. (BFD32_BACKENDS_CFILES): Add elf32-rx.c. * archures.c (bfd_architecture): Add bfd_arch_rx and bfd_mach_rx. Export bfd_rx_arch. (bfd_archures_list): Add bfd_rx_arch. * config.bfd: Add entry for rx-*-elf. * configure.in: Add entries for bfd_elf32_rx_le_vec and bfd_elf32_rx_be_vec. * reloc.c: Add RX relocations. * targets.c: Add RX target vectors. * Makefile.in: Regenerate. * bfd-in2.h: Regenerate. * configure: Regenerate. * libbfd.h: Regenerate. * cpu-rx.c: New file. * elf32-rx.c: New file. binutils * readelf.c: Add support for RX target. * MAINTAINERS: Add DJ and NickC as maintainers for RX. gas * Makefile.am: Add RX target. * configure.in: Likewise. * configure.tgt: Likewise. * read.c (do_repeat_with_expander): New function. * read.h: Provide a prototype for do_repeat_with_expander. * doc/Makefile.am: Add RX target documentation. * doc/all.texi: Likewise. * doc/as.texinfo: Likewise. * Makefile.in: Regenerate. * NEWS: Mention support for RX architecture. * configure: Regenerate. * doc/Makefile.in: Regenerate. * config/rx-defs.h: New file. * config/rx-parse.y: New file. * config/tc-rx.h: New file. * config/tc-rx.c: New file. * doc/c-rx.texi: New file. gas/testsuite * gas/rx: New directory. * gas/rx/*: New set of test cases. * gas/elf/section2.e-rx: New expected output file. * gas/all/gas.exp: Add support for RX target. * gas/elf/elf.exp: Likewise. * gas/lns/lns.exp: Likewise. * gas/macros/macros.exp: Likewise. include * dis-asm.h: Add prototype for print_insn_rx. include/elf * rx.h: New file. include/opcode * rx.h: New file. ld * Makefile.am: Add rules to build RX emulation. * configure.tgt: Likewise. * NEWS: Mention support for RX architecture. * Makefile.in: Regenerate. * emulparams/elf32rx.sh: New file. * emultempl/rxelf.em: New file. opcodes * Makefile.am: Add RX files. * configure.in: Add support for RX target. * disassemble.c: Likewise. * Makefile.in: Regenerate. * configure: Regenerate. * opc2c.c: New file. * rx-decode.c: New file. * rx-decode.opc: New file. * rx-dis.c: New file.
This commit is contained in:
parent
4abcdf2717
commit
55c20b09b7
@ -1,3 +1,7 @@
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2009-09-29 DJ Delorie <dj@redhat.com>
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* dis-asm.h: Add prototype for print_insn_rx.
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2009-09-25 Dodji Seketeli <dodji@redhat.com>
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* dwarf2.h (enum dwarf_tag): Rename DW_TAG_template_parameter_pack and
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@ -296,6 +296,7 @@ extern int print_insn_xtensa (bfd_vma, disassemble_info *);
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extern int print_insn_z80 (bfd_vma, disassemble_info *);
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extern int print_insn_z8001 (bfd_vma, disassemble_info *);
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extern int print_insn_z8002 (bfd_vma, disassemble_info *);
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extern int print_insn_rx (bfd_vma, disassemble_info *);
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extern disassembler_ftype arc_get_disassembler (void *);
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extern disassembler_ftype cris_get_disassembler (bfd *);
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@ -1,3 +1,7 @@
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2009-09-29 DJ Delorie <dj@redhat.com>
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* rx.h: New file.
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2009-09-21 Alan Modra <amodra@bigpond.net.au>
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* ppc.h (DT_PPC_TLSOPT): Define.
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134
include/elf/rx.h
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134
include/elf/rx.h
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@ -0,0 +1,134 @@
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/* RX ELF support for BFD.
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Copyright (C) 2008, 2009 Free Software Foundation, Inc.
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#ifndef _ELF_RX_H
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#define _ELF_RX_H
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#include "elf/reloc-macros.h"
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/* Note that there are a few internal relocation types used by the
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linker to do link-time relaxation. If you update this file, please
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check elf32-rx.c to see if any of the internal relocations need to
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be, er, relocated. */
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/* Preliminary relocations. */
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START_RELOC_NUMBERS (elf_rx_reloc_type)
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RELOC_NUMBER (R_RX_NONE, 0x00)
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/* These are for data, and are bi-endian. */
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RELOC_NUMBER (R_RX_DIR32, 0x01) /* Was: R_RX_32. */
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RELOC_NUMBER (R_RX_DIR24S, 0x02) /* Was: R_RX_24. */
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RELOC_NUMBER (R_RX_DIR16, 0x03)
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RELOC_NUMBER (R_RX_DIR16U, 0x04) /* Was: R_RX_16_UNS. */
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RELOC_NUMBER (R_RX_DIR16S, 0x05) /* Was: R_RX_16. */
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RELOC_NUMBER (R_RX_DIR8, 0x06)
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RELOC_NUMBER (R_RX_DIR8U, 0x07) /* Was: R_RX_8_UNS. */
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RELOC_NUMBER (R_RX_DIR8S, 0x08) /* Was: R_RX_8. */
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/* Signed pc-relative values. */
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RELOC_NUMBER (R_RX_DIR24S_PCREL, 0x09) /* Was: R_RX_24_PCREL. */
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RELOC_NUMBER (R_RX_DIR16S_PCREL, 0x0a) /* Was: R_RX_16_PCREL. */
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RELOC_NUMBER (R_RX_DIR8S_PCREL, 0x0b) /* Was: R_RX_8_PCREL. */
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/* These are for fields in the instructions. */
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RELOC_NUMBER (R_RX_DIR16UL, 0x0c)
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RELOC_NUMBER (R_RX_DIR16UW, 0x0d)
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RELOC_NUMBER (R_RX_DIR8UL, 0x0e)
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RELOC_NUMBER (R_RX_DIR8UW, 0x0f)
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RELOC_NUMBER (R_RX_DIR32_REV, 0x10)
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RELOC_NUMBER (R_RX_DIR16_REV, 0x11)
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RELOC_NUMBER (R_RX_DIR3U_PCREL, 0x12)
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/* These are extensions added by Red Hat. */
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RELOC_NUMBER (R_RX_RH_3_PCREL, 0x20) /* Like R_RX_DIR8S_PCREL but only 3-bits. */
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RELOC_NUMBER (R_RX_RH_16_OP, 0x21) /* Like R_RX_DIR16 but for opcodes - always big endian. */
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RELOC_NUMBER (R_RX_RH_24_OP, 0x22) /* Like R_RX_DIR24S but for opcodes - always big endian. */
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RELOC_NUMBER (R_RX_RH_32_OP, 0x23) /* Like R_RX_DIR32 but for opcodes - always big endian. */
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RELOC_NUMBER (R_RX_RH_24_UNS, 0x24) /* Like R_RX_DIR24S but for unsigned values. */
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RELOC_NUMBER (R_RX_RH_8_NEG, 0x25) /* Like R_RX_DIR8 but -x is stored. */
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RELOC_NUMBER (R_RX_RH_16_NEG, 0x26) /* Like R_RX_DIR16 but -x is stored. */
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RELOC_NUMBER (R_RX_RH_24_NEG, 0x27) /* Like R_RX_DIR24S but -x is stored. */
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RELOC_NUMBER (R_RX_RH_32_NEG, 0x28) /* Like R_RX_DIR32 but -x is stored. */
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RELOC_NUMBER (R_RX_RH_DIFF, 0x29) /* Subtract from a previous relocation. */
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RELOC_NUMBER (R_RX_RH_GPRELB, 0x2a) /* Byte value, relative to __gp. */
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RELOC_NUMBER (R_RX_RH_GPRELW, 0x2b) /* Word value, relative to __gp. */
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RELOC_NUMBER (R_RX_RH_GPRELL, 0x2c) /* Long value, relative to __gp. */
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RELOC_NUMBER (R_RX_RH_RELAX, 0x2d) /* Marks opcodes suitable for linker relaxation. */
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/* These are for complex relocs. */
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RELOC_NUMBER (R_RX_ABS32, 0x41)
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RELOC_NUMBER (R_RX_ABS24S, 0x42)
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RELOC_NUMBER (R_RX_ABS16, 0x43)
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RELOC_NUMBER (R_RX_ABS16U, 0x44)
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RELOC_NUMBER (R_RX_ABS16S, 0x45)
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RELOC_NUMBER (R_RX_ABS8, 0x46)
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RELOC_NUMBER (R_RX_ABS8U, 0x47)
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RELOC_NUMBER (R_RX_ABS8S, 0x48)
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RELOC_NUMBER (R_RX_ABS24S_PCREL, 0x49)
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RELOC_NUMBER (R_RX_ABS16S_PCREL, 0x4a)
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RELOC_NUMBER (R_RX_ABS8S_PCREL, 0x4b)
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RELOC_NUMBER (R_RX_ABS16UL, 0x4c)
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RELOC_NUMBER (R_RX_ABS16UW, 0x4d)
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RELOC_NUMBER (R_RX_ABS8UL, 0x4e)
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RELOC_NUMBER (R_RX_ABS8UW, 0x4f)
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RELOC_NUMBER (R_RX_ABS32_REV, 0x50)
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RELOC_NUMBER (R_RX_ABS16_REV, 0x51)
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RELOC_NUMBER (R_RX_SYM, 0x80)
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RELOC_NUMBER (R_RX_OPneg, 0x81)
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RELOC_NUMBER (R_RX_OPadd, 0x82)
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RELOC_NUMBER (R_RX_OPsub, 0x83)
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RELOC_NUMBER (R_RX_OPmul, 0x84)
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RELOC_NUMBER (R_RX_OPdiv, 0x85)
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RELOC_NUMBER (R_RX_OPshla, 0x86)
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RELOC_NUMBER (R_RX_OPshra, 0x87)
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RELOC_NUMBER (R_RX_OPsctsize, 0x88)
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RELOC_NUMBER (R_RX_OPscttop, 0x8d)
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RELOC_NUMBER (R_RX_OPand, 0x90)
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RELOC_NUMBER (R_RX_OPor, 0x91)
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RELOC_NUMBER (R_RX_OPxor, 0x92)
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RELOC_NUMBER (R_RX_OPnot, 0x93)
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RELOC_NUMBER (R_RX_OPmod, 0x94)
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RELOC_NUMBER (R_RX_OPromtop, 0x95)
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RELOC_NUMBER (R_RX_OPramtop, 0x96)
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END_RELOC_NUMBERS (R_RX_max)
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#define EF_RX_CPU_RX 0x00000079 /* FIXME: correct value? */
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#define EF_RX_CPU_MASK 0x0000007F /* specific cpu bits. */
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#define EF_RX_ALL_FLAGS (EF_RX_CPU_MASK)
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/* Values for the e_flags field in the ELF header. */
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#define E_FLAG_RX_64BIT_DOUBLES (1 << 0)
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#define E_FLAG_RX_DSP (1 << 1) /* Defined in the RX CPU Object file specification, but not explained. */
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/* These define the addend field of R_RX_RH_RELAX relocations. */
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#define RX_RELAXA_IMM6 0x00000010 /* Imm8/16/24/32 at bit offset 6. */
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#define RX_RELAXA_IMM12 0x00000020 /* Imm8/16/24/32 at bit offset 12. */
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#define RX_RELAXA_DSP4 0x00000040 /* Dsp0/8/16 at bit offset 4. */
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#define RX_RELAXA_DSP6 0x00000080 /* Dsp0/8/16 at bit offset 6. */
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#define RX_RELAXA_DSP14 0x00000100 /* Dsp0/8/16 at bit offset 14. */
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#define RX_RELAXA_BRA 0x00000200 /* Any type of branch (must be decoded). */
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#define RX_RELAXA_RNUM 0x0000000f /* Number of associated relocations. */
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/* These mark the place where alignment is requested, and the place where the filler bytes end. */
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#define RX_RELAXA_ALIGN 0x10000000 /* Start alignment; the remaining bits are the alignment value. */
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#define RX_RELAXA_ELIGN 0x20000000 /* End alignment; the remaining bits are the alignment value. */
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#define RX_RELAXA_ANUM 0x00ffffff /* Alignment amount, in bytes (i.e. .balign). */
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#endif /* _ELF_RX_H */
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@ -1,3 +1,7 @@
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2009-09-29 DJ Delorie <dj@redhat.com>
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* rx.h: New file.
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2009-09-22 Peter Bergner <bergner@vnet.ibm.com>
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* ppc.h (ppc_cpu_t): Typedef to uint64_t.
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218
include/opcode/rx.h
Normal file
218
include/opcode/rx.h
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@ -0,0 +1,218 @@
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/* Opcode decoder for the Renesas RX
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Copyright 2008, 2009
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Free Software Foundation, Inc.
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Written by DJ Delorie <dj@redhat.com>
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This file is part of GDB, the GNU Debugger and GAS, the GNU Assembler.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation; either version 2 of the License, or
|
||||
(at your option) any later version.
|
||||
|
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This program is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with this program; if not, write to the Free Software
|
||||
Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
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02110-1301, USA. */
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/* The RX decoder in libopcodes is used by the simulator, gdb's
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analyzer, and the disassembler. Given an opcode data source,
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it decodes the next opcode into the following structures. */
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typedef enum
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{
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RX_AnySize = 0,
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RX_Byte, /* undefined extension */
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RX_UByte,
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RX_SByte,
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RX_Word, /* undefined extension */
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RX_UWord,
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RX_SWord,
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RX_3Byte,
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RX_Long,
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} RX_Size;
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typedef enum
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{
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RX_Operand_None,
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RX_Operand_Immediate, /* #addend */
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RX_Operand_Register, /* Rn */
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RX_Operand_Indirect, /* [Rn + addend] */
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RX_Operand_Postinc, /* [Rn+] */
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RX_Operand_Predec, /* [-Rn] */
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RX_Operand_Condition, /* eq, gtu, etc */
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RX_Operand_Flag, /* [UIOSZC] */
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} RX_Operand_Type;
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typedef enum
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{
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RXO_unknown,
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RXO_mov, /* d = s (signed) */
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RXO_movbi, /* d = [s,s2] (signed) */
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RXO_movbir, /* [s,s2] = d (signed) */
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RXO_pushm, /* s..s2 */
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RXO_popm, /* s..s2 */
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RXO_pusha, /* &s */
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RXO_xchg, /* s <-> d */
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RXO_stcc, /* d = s if cond(s2) */
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RXO_rtsd, /* rtsd, 1=imm, 2-0 = reg if reg type */
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/* These are all either d OP= s or, if s2 is set, d = s OP s2. Note
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that d may be "None". */
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RXO_and,
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RXO_or,
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RXO_xor,
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RXO_add,
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RXO_sub,
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RXO_mul,
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RXO_div,
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RXO_divu,
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RXO_shll,
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RXO_shar,
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RXO_shlr,
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RXO_adc, /* d = d + s + carry */
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RXO_sbb, /* d = d - s - ~carry */
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RXO_abs, /* d = |s| */
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RXO_max, /* d = max(d,s) */
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RXO_min, /* d = min(d,s) */
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RXO_emul, /* d:64 = d:32 * s */
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RXO_emulu, /* d:64 = d:32 * s (unsigned) */
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RXO_ediv, /* d:64 / s; d = quot, d+1 = rem */
|
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RXO_edivu, /* d:64 / s; d = quot, d+1 = rem */
|
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|
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RXO_rolc, /* d <<= 1 through carry */
|
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RXO_rorc, /* d >>= 1 through carry*/
|
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RXO_rotl, /* d <<= #s without carry */
|
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RXO_rotr, /* d >>= #s without carry*/
|
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RXO_revw, /* d = revw(s) */
|
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RXO_revl, /* d = revl(s) */
|
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RXO_branch, /* pc = d if cond(s) */
|
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RXO_branchrel,/* pc += d if cond(s) */
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RXO_jsr, /* pc = d */
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RXO_jsrrel, /* pc += d */
|
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RXO_rts,
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RXO_nop,
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RXO_scmpu,
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RXO_smovu,
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RXO_smovb,
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RXO_suntil,
|
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RXO_swhile,
|
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RXO_smovf,
|
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RXO_sstr,
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|
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RXO_rmpa,
|
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RXO_mulhi,
|
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RXO_mullo,
|
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RXO_machi,
|
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RXO_maclo,
|
||||
RXO_mvtachi,
|
||||
RXO_mvtaclo,
|
||||
RXO_mvfachi,
|
||||
RXO_mvfacmi,
|
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RXO_mvfaclo,
|
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RXO_racw,
|
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|
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RXO_sat, /* sat(d) */
|
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RXO_satr,
|
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|
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RXO_fadd, /* d op= s */
|
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RXO_fcmp,
|
||||
RXO_fsub,
|
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RXO_ftoi,
|
||||
RXO_fmul,
|
||||
RXO_fdiv,
|
||||
RXO_round,
|
||||
RXO_itof,
|
||||
|
||||
RXO_bset, /* d |= (1<<s) */
|
||||
RXO_bclr, /* d &= ~(1<<s) */
|
||||
RXO_btst, /* s & (1<<s2) */
|
||||
RXO_bnot, /* d ^= (1<<s) */
|
||||
RXO_bmcc, /* d<s> = cond(s2) */
|
||||
|
||||
RXO_clrpsw, /* flag index in d */
|
||||
RXO_setpsw, /* flag index in d */
|
||||
|
||||
RXO_mvtcp, /* cop# in s2, cop[d] = s */
|
||||
RXO_mvfcp, /* cop# in s2, d = cop[s] */
|
||||
RXO_opecp, /* cop# in s2, do cop[s] */
|
||||
|
||||
RXO_rtfi,
|
||||
RXO_rte,
|
||||
RXO_rtd, /* undocumented */
|
||||
RXO_brk,
|
||||
RXO_dbt, /* undocumented */
|
||||
RXO_int, /* vector id in s */
|
||||
RXO_stop,
|
||||
RXO_wait,
|
||||
|
||||
RXO_sccnd, /* d = cond(s) ? 1 : 0 */
|
||||
} RX_Opcode_ID;
|
||||
|
||||
/* Condition bitpatterns, as registers. */
|
||||
#define RXC_eq 0
|
||||
#define RXC_z 0
|
||||
#define RXC_ne 1
|
||||
#define RXC_nz 1
|
||||
#define RXC_c 2
|
||||
#define RXC_nc 3
|
||||
#define RXC_gtu 4
|
||||
#define RXC_leu 5
|
||||
#define RXC_pz 6
|
||||
#define RXC_n 7
|
||||
#define RXC_ge 8
|
||||
#define RXC_lt 9
|
||||
#define RXC_gt 10
|
||||
#define RXC_le 11
|
||||
#define RXC_o 12
|
||||
#define RXC_no 13
|
||||
#define RXC_always 14
|
||||
#define RXC_never 15
|
||||
|
||||
typedef struct
|
||||
{
|
||||
RX_Operand_Type type;
|
||||
int reg;
|
||||
int addend;
|
||||
RX_Size size;
|
||||
} RX_Opcode_Operand;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
RX_Opcode_ID id;
|
||||
int n_bytes;
|
||||
int prefix;
|
||||
char * syntax;
|
||||
RX_Size size;
|
||||
/* By convention, these are destination, source1, source2. */
|
||||
RX_Opcode_Operand op[3];
|
||||
|
||||
/* The logic here is:
|
||||
newflags = (oldflags & ~(int)flags_0) | flags_1 | (op_flags & flags_s)
|
||||
Only the O, S, Z, and C flags are affected. */
|
||||
char flags_0; /* This also clears out flags-to-be-set. */
|
||||
char flags_1;
|
||||
char flags_s;
|
||||
} RX_Opcode_Decoded;
|
||||
|
||||
/* Within the syntax, %c-style format specifiers are as follows:
|
||||
|
||||
%% = '%' character
|
||||
%0 = operand[0] (destination)
|
||||
%1 = operand[1] (source)
|
||||
%2 = operand[2] (2nd source)
|
||||
%s = operation size (b/w/l)
|
||||
%SN = operand size [N] (N=0,1,2)
|
||||
%aN = op[N] as an address (N=0,1,2)
|
||||
|
||||
Register numbers 0..15 are general registers. 16..31 are control
|
||||
registers. 32..47 are condition codes. */
|
||||
|
||||
int rx_decode_opcode (unsigned long, RX_Opcode_Decoded *, int (*)(void *), void *);
|
Loading…
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Reference in New Issue
Block a user