AArch32: Fix the build for M class semihosting
The M class cores don't support Semihosting v2 mixed mode, but we were accidentally using the new immediates for it. My last patch changed the immediates which broke the build because doing a full multi-lib build including M architectures now results in an assembler error instead of silently doing the wrong thing. This fixes the issue by changing the defines around such that According to the specs any M class build uses the normal semihosting instructions. Regtested on arm-none-eabi and no issues, using a build with m class multilibs too.
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@ -30,7 +30,9 @@
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/* Now the SWI numbers and reason codes for RDI (Angel) monitors. */
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#if defined (SEMIHOST_V2) && defined (SEMIHOST_V2_MIXED_MODE)
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#if defined (SEMIHOST_V2) \
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&& defined (SEMIHOST_V2_MIXED_MODE) \
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&& !defined (THUMB_VXM)
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#define AngelSWI_ARM 0xE10F0070 /* HLT #0xF000 A32. */
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#ifdef __thumb__
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#define AngelSWI 0xBABC /* HLT #0x3c T32. */
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