127 lines
4.0 KiB
Diff
127 lines
4.0 KiB
Diff
From 1f242cb932c85b7ffafb2b1bfa3b2c1a50a10f25 Mon Sep 17 00:00:00 2001
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From: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
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Date: Wed, 28 Jun 2023 09:39:33 +0200
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Subject: [PATCH 180/196] ARM: vfp: Move sending signals outside of
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vfp_lock()ed section.
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VFP_bounce() is invoked from within vfp_support_entry() and may send a
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signal. Sending a signal uses spinlock_t which becomes a sleeping lock
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on PREEMPT_RT and must not be acquired within a preempt-disabled
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section.
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Move the vfp_raise_sigfpe() block outside of the vfp_lock() section.
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Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
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---
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arch/arm/vfp/vfpmodule.c | 29 ++++++++++++++++++-----------
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1 file changed, 18 insertions(+), 11 deletions(-)
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diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c
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index 9543f011d0ed..9fde36fcb80c 100644
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--- a/arch/arm/vfp/vfpmodule.c
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+++ b/arch/arm/vfp/vfpmodule.c
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@@ -268,7 +268,7 @@ static void vfp_panic(char *reason, u32 inst)
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/*
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* Process bitmask of exception conditions.
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*/
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-static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_regs *regs)
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+static int vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr)
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{
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int si_code = 0;
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@@ -276,8 +276,7 @@ static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_
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if (exceptions == VFP_EXCEPTION_ERROR) {
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vfp_panic("unhandled bounce", inst);
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- vfp_raise_sigfpe(FPE_FLTINV, regs);
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- return;
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+ return FPE_FLTINV;
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}
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/*
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@@ -305,8 +304,7 @@ static void vfp_raise_exceptions(u32 exceptions, u32 inst, u32 fpscr, struct pt_
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RAISE(FPSCR_OFC, FPSCR_OFE, FPE_FLTOVF);
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RAISE(FPSCR_IOC, FPSCR_IOE, FPE_FLTINV);
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- if (si_code)
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- vfp_raise_sigfpe(si_code, regs);
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+ return si_code;
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}
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/*
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@@ -352,6 +350,8 @@ static u32 vfp_emulate_instruction(u32 inst, u32 fpscr, struct pt_regs *regs)
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static void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
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{
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u32 fpscr, orig_fpscr, fpsid, exceptions;
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+ int si_code2 = 0;
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+ int si_code = 0;
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pr_debug("VFP: bounce: trigger %08x fpexc %08x\n", trigger, fpexc);
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@@ -397,8 +397,8 @@ static void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
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* unallocated VFP instruction but with FPSCR.IXE set and not
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* on VFP subarch 1.
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*/
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- vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr, regs);
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- return;
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+ si_code = vfp_raise_exceptions(VFP_EXCEPTION_ERROR, trigger, fpscr);
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+ goto exit;
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}
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/*
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@@ -422,14 +422,14 @@ static void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
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*/
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exceptions = vfp_emulate_instruction(trigger, fpscr, regs);
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if (exceptions)
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- vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);
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+ si_code2 = vfp_raise_exceptions(exceptions, trigger, orig_fpscr);
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/*
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* If there isn't a second FP instruction, exit now. Note that
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* the FPEXC.FP2V bit is valid only if FPEXC.EX is 1.
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*/
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if ((fpexc & (FPEXC_EX | FPEXC_FP2V)) != (FPEXC_EX | FPEXC_FP2V))
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- return;
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+ goto exit;
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/*
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* The barrier() here prevents fpinst2 being read
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@@ -441,7 +441,13 @@ static void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
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emulate:
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exceptions = vfp_emulate_instruction(trigger, orig_fpscr, regs);
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if (exceptions)
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- vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);
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+ si_code = vfp_raise_exceptions(exceptions, trigger, orig_fpscr);
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+exit:
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+ vfp_unlock();
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+ if (si_code2)
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+ vfp_raise_sigfpe(si_code2, regs);
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+ if (si_code)
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+ vfp_raise_sigfpe(si_code, regs);
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}
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static void vfp_enable(void *unused)
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@@ -773,6 +779,7 @@ static int vfp_support_entry(struct pt_regs *regs, u32 trigger)
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* replay the instruction that trapped.
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*/
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fmxr(FPEXC, fpexc);
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+ vfp_unlock();
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} else {
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/* Check for synchronous or asynchronous exceptions */
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if (!(fpexc & (FPEXC_EX | FPEXC_DEX))) {
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@@ -794,10 +801,10 @@ static int vfp_support_entry(struct pt_regs *regs, u32 trigger)
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}
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}
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bounce: regs->ARM_pc += 4;
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+ /* VFP_bounce() will invoke vfp_unlock() */
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VFP_bounce(trigger, fpexc, regs);
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}
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- vfp_unlock();
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return 0;
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}
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--
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2.43.2
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