11 Commits

Author	SHA1	Message	Date
ameerj	112b8f00f0	shader: Add FP64 register load/store helpers	2021-07-22 21:51:24 -04:00
ReinUsesLisp	f91859efd2	shader: Implement I2F	2021-07-22 21:51:23 -04:00
ameerj	72990df7ba	shader: Implement DADD	2021-07-22 21:51:23 -04:00
ReinUsesLisp	3a63fa0477	shader: Partial implementation of LDC	2021-07-22 21:51:23 -04:00
ReinUsesLisp	e44752ddc8	shader: FMUL, select, RRO, and MUFU fixes	2021-07-22 21:51:22 -04:00
ReinUsesLisp	274897dfd5	spirv: Fixes and Intel specific workarounds	2021-07-22 21:51:22 -04:00
ReinUsesLisp	704c6f353f	shader: Rename, implement FADD.SAT and P2R (imm)	2021-07-22 21:51:22 -04:00
ReinUsesLisp	85cce78583	shader: Primitive Vulkan integration	2021-07-22 21:51:22 -04:00
ReinUsesLisp	be94ee88d2	shader: Make typed IR	2021-07-22 21:51:21 -04:00
ReinUsesLisp	d24a16045f	shader: Initial instruction support	2021-07-22 21:51:21 -04:00
ReinUsesLisp	2d48a7b4d0	shader: Initial recompiler work	2021-07-22 21:51:21 -04:00