- changed HW IO map to use virtual addresses

- added hooks to catch LCD IO read/writes
This commit is contained in:
bunnei 2014-04-26 14:21:40 -04:00
parent 9e047e32d4
commit f78794961e
4 changed files with 64 additions and 42 deletions

View File

@ -12,49 +12,42 @@
namespace HW { namespace HW {
enum { enum {
ADDRESS_CONFIG = 0x10000000, VADDR_HASH = 0x1EC01000,
ADDRESS_IRQ = 0x10001000, VADDR_CSND = 0x1EC03000,
ADDRESS_NDMA = 0x10002000, VADDR_DSP = 0x1EC40000,
ADDRESS_TIMER = 0x10003000, VADDR_PDN = 0x1EC41000,
ADDRESS_CTRCARD = 0x10004000, VADDR_CODEC = 0x1EC41000,
ADDRESS_CTRCARD_2 = 0x10005000, VADDR_SPI = 0x1EC42000,
ADDRESS_SDMC_NAND = 0x10006000, VADDR_SPI_2 = 0x1EC43000, // Only used under TWL_FIRM?
ADDRESS_SDMC_NAND_2 = 0x10007000, // Apparently not used on retail VADDR_I2C = 0x1EC44000,
ADDRESS_PXI = 0x10008000, VADDR_CODEC_2 = 0x1EC45000,
ADDRESS_AES = 0x10009000, VADDR_HID = 0x1EC46000,
ADDRESS_SHA = 0x1000A000, VADDR_PAD = 0x1EC46000,
ADDRESS_RSA = 0x1000B000, VADDR_PTM = 0x1EC46000,
ADDRESS_XDMA = 0x1000C000, VADDR_GPIO = 0x1EC47000,
ADDRESS_SPICARD = 0x1000D800, VADDR_I2C_2 = 0x1EC48000,
ADDRESS_CONFIG_2 = 0x10010000, VADDR_SPI_3 = 0x1EC60000,
ADDRESS_HASH = 0x10101000, VADDR_I2C_3 = 0x1EC61000,
ADDRESS_CSND = 0x10103000, VADDR_MIC = 0x1EC62000,
ADDRESS_DSP = 0x10140000, VADDR_PXI = 0x1EC63000, // 0xFFFD2000
ADDRESS_PDN = 0x10141000, //VADDR_NTRCARD
ADDRESS_CODEC = 0x10141000, VADDR_CDMA = 0xFFFDA000, // CoreLink DMA-330? Info
ADDRESS_SPI = 0x10142000, VADDR_DSP_2 = 0x1ED03000,
ADDRESS_SPI_2 = 0x10143000, VADDR_HASH_2 = 0x1EE01000,
ADDRESS_I2C = 0x10144000, VADDR_LCD = 0x1EF00000,
ADDRESS_CODEC_2 = 0x10145000,
ADDRESS_HID = 0x10146000,
ADDRESS_PAD = 0x10146000,
ADDRESS_PTM = 0x10146000,
ADDRESS_I2C_2 = 0x10148000,
ADDRESS_SPI_3 = 0x10160000,
ADDRESS_I2C_3 = 0x10161000,
ADDRESS_MIC = 0x10162000,
ADDRESS_PXI_2 = 0x10163000,
ADDRESS_NTRCARD = 0x10164000,
ADDRESS_DSP_2 = 0x10203000,
ADDRESS_HASH_2 = 0x10301000,
}; };
template <typename T> template <typename T>
inline void Read(T &var, const u32 addr) { inline void Read(T &var, const u32 addr) {
switch (addr & 0xFFFFF000) { switch (addr & 0xFFFFF000) {
case ADDRESS_NDMA: // TODO(bunnei): What is the virtual address of NDMA?
NDMA::Read(var, addr); // case VADDR_NDMA:
// NDMA::Read(var, addr);
// break;
case VADDR_LCD:
LCD::Read(var, addr);
break; break;
default: default:
@ -66,8 +59,13 @@ template <typename T>
inline void Write(u32 addr, const T data) { inline void Write(u32 addr, const T data) {
switch (addr & 0xFFFFF000) { switch (addr & 0xFFFFF000) {
case ADDRESS_NDMA: // TODO(bunnei): What is the virtual address of NDMA?
NDMA::Write(addr, data); // case VADDR_NDMA
// NDMA::Write(addr, data);
// break;
case VADDR_LCD:
LCD::Write(addr, data);
break; break;
default: default:

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@ -18,12 +18,26 @@ u64 g_last_ticks = 0; ///< Last CPU ticks
template <typename T> template <typename T>
inline void Read(T &var, const u32 addr) { inline void Read(T &var, const u32 addr) {
ERROR_LOG(LCD, "unknown Read%d @ 0x%08X", sizeof(var) * 8, addr);
} }
template <typename T> template <typename T>
inline void Write(u32 addr, const T data) { inline void Write(u32 addr, const T data) {
ERROR_LOG(LCD, "unknown Write%d 0x%08X @ 0x%08X", sizeof(data) * 8, data, addr);
} }
// Explicitly instantiate template functions because we aren't defining this in the header:
template void Read<u64>(u64 &var, const u32 addr);
template void Read<u32>(u32 &var, const u32 addr);
template void Read<u16>(u16 &var, const u32 addr);
template void Read<u8>(u8 &var, const u32 addr);
template void Write<u64>(u32 addr, const u64 data);
template void Write<u32>(u32 addr, const u32 data);
template void Write<u16>(u32 addr, const u16 data);
template void Write<u8>(u32 addr, const u8 data);
/// Update hardware /// Update hardware
void Update() { void Update() {
u64 current_ticks = Core::g_app_core->GetTicks(); u64 current_ticks = Core::g_app_core->GetTicks();

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@ -48,7 +48,9 @@ enum {
FCRAM_VADDR = 0x08000000, ///< FCRAM virtual address FCRAM_VADDR = 0x08000000, ///< FCRAM virtual address
FCRAM_VADDR_END = (FCRAM_VADDR + FCRAM_SIZE), ///< FCRAM end of virtual space FCRAM_VADDR_END = (FCRAM_VADDR + FCRAM_SIZE), ///< FCRAM end of virtual space
HARDWARE_IO_VADDR = 0x1EC00000, HARDWARE_IO_PADDR = 0x10000000, ///< IO physical address start
HARDWARE_IO_VADDR = 0x1EC00000, ///< IO virtual address start
HARDWARE_IO_PADDR_END = (HARDWARE_IO_PADDR + HARDWARE_IO_SIZE),
HARDWARE_IO_VADDR_END = (HARDWARE_IO_VADDR + HARDWARE_IO_SIZE), HARDWARE_IO_VADDR_END = (HARDWARE_IO_VADDR + HARDWARE_IO_SIZE),
VRAM_VADDR = 0x1F000000, VRAM_VADDR = 0x1F000000,

View File

@ -21,8 +21,16 @@ u32 _AddressPhysicalToVirtual(const u32 addr) {
// Our memory interface read/write functions assume virtual addresses. Put any physical address // Our memory interface read/write functions assume virtual addresses. Put any physical address
// to virtual address translations here. This is obviously quite hacky... But we're not doing // to virtual address translations here. This is obviously quite hacky... But we're not doing
// any MMU emulation yet or anything // any MMU emulation yet or anything
if ((addr >= FCRAM_PADDR) && (addr < (FCRAM_PADDR_END))) { if ((addr >= FCRAM_PADDR) && (addr < FCRAM_PADDR_END)) {
return (addr & FCRAM_MASK) | FCRAM_VADDR; return (addr & FCRAM_MASK) | FCRAM_VADDR;
// Hardware IO
// TODO(bunnei): FixMe
// This isn't going to work... The physical address of HARDWARE_IO conflicts with the virtual
// address of shared memory.
//} else if ((addr >= HARDWARE_IO_PADDR) && (addr < HARDWARE_IO_PADDR_END)) {
// return (addr + 0x0EB00000);
} }
return addr; return addr;
} }
@ -132,7 +140,7 @@ u8 *GetPointer(const u32 addr) {
return g_vram + (vaddr & VRAM_MASK); return g_vram + (vaddr & VRAM_MASK);
} else { } else {
ERROR_LOG(MEMMAP, "Unknown GetPointer @ 0x%08x", vaddr); ERROR_LOG(MEMMAP, "unknown GetPointer @ 0x%08x", vaddr);
return 0; return 0;
} }
} }