VideoCore/Shader: Remove dynamic control flow in (Get)UniformOffset
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		| @@ -161,21 +161,16 @@ struct ShaderSetup { | |||||||
|         std::array<Math::Vec4<u8>, 4> i; |         std::array<Math::Vec4<u8>, 4> i; | ||||||
|     } uniforms; |     } uniforms; | ||||||
|  |  | ||||||
|     static size_t UniformOffset(RegisterType type, unsigned index) { |     static size_t GetFloatUniformOffset(unsigned index) { | ||||||
|         switch (type) { |  | ||||||
|         case RegisterType::FloatUniform: |  | ||||||
|         return offsetof(ShaderSetup, uniforms.f) + index * sizeof(Math::Vec4<float24>); |         return offsetof(ShaderSetup, uniforms.f) + index * sizeof(Math::Vec4<float24>); | ||||||
|  |  | ||||||
|         case RegisterType::BoolUniform: |  | ||||||
|             return offsetof(ShaderSetup, uniforms.b) + index * sizeof(bool); |  | ||||||
|  |  | ||||||
|         case RegisterType::IntUniform: |  | ||||||
|             return offsetof(ShaderSetup, uniforms.i) + index * sizeof(Math::Vec4<u8>); |  | ||||||
|  |  | ||||||
|         default: |  | ||||||
|             UNREACHABLE(); |  | ||||||
|             return 0; |  | ||||||
|     } |     } | ||||||
|  |  | ||||||
|  |     static size_t GetBoolUniformOffset(unsigned index) { | ||||||
|  |         return offsetof(ShaderSetup, uniforms.b) + index * sizeof(bool); | ||||||
|  |     } | ||||||
|  |  | ||||||
|  |     static size_t GetIntUniformOffset(unsigned index) { | ||||||
|  |         return offsetof(ShaderSetup, uniforms.i) + index * sizeof(Math::Vec4<u8>); | ||||||
|     } |     } | ||||||
|  |  | ||||||
|     std::array<u32, 1024> program_code; |     std::array<u32, 1024> program_code; | ||||||
|   | |||||||
| @@ -185,7 +185,7 @@ void JitShader::Compile_SwizzleSrc(Instruction instr, unsigned src_num, SourceRe | |||||||
|  |  | ||||||
|     if (src_reg.GetRegisterType() == RegisterType::FloatUniform) { |     if (src_reg.GetRegisterType() == RegisterType::FloatUniform) { | ||||||
|         src_ptr = SETUP; |         src_ptr = SETUP; | ||||||
|         src_offset = ShaderSetup::UniformOffset(RegisterType::FloatUniform, src_reg.GetIndex()); |         src_offset = ShaderSetup::GetFloatUniformOffset(src_reg.GetIndex()); | ||||||
|     } else { |     } else { | ||||||
|         src_ptr = STATE; |         src_ptr = STATE; | ||||||
|         src_offset = UnitState<false>::InputOffset(src_reg); |         src_offset = UnitState<false>::InputOffset(src_reg); | ||||||
| @@ -348,8 +348,7 @@ void JitShader::Compile_EvaluateCondition(Instruction instr) { | |||||||
| } | } | ||||||
|  |  | ||||||
| void JitShader::Compile_UniformCondition(Instruction instr) { | void JitShader::Compile_UniformCondition(Instruction instr) { | ||||||
|     size_t offset = |     size_t offset = ShaderSetup::GetBoolUniformOffset(instr.flow_control.bool_uniform_id); | ||||||
|         ShaderSetup::UniformOffset(RegisterType::BoolUniform, instr.flow_control.bool_uniform_id); |  | ||||||
|     cmp(byte[SETUP + offset], 0); |     cmp(byte[SETUP + offset], 0); | ||||||
| } | } | ||||||
|  |  | ||||||
| @@ -732,8 +731,7 @@ void JitShader::Compile_LOOP(Instruction instr) { | |||||||
|     // This decodes the fields from the integer uniform at index instr.flow_control.int_uniform_id. |     // This decodes the fields from the integer uniform at index instr.flow_control.int_uniform_id. | ||||||
|     // The Y (LOOPCOUNT_REG) and Z (LOOPINC) component are kept multiplied by 16 (Left shifted by |     // The Y (LOOPCOUNT_REG) and Z (LOOPINC) component are kept multiplied by 16 (Left shifted by | ||||||
|     // 4 bits) to be used as an offset into the 16-byte vector registers later |     // 4 bits) to be used as an offset into the 16-byte vector registers later | ||||||
|     size_t offset = |     size_t offset = ShaderSetup::GetIntUniformOffset(instr.flow_control.int_uniform_id); | ||||||
|         ShaderSetup::UniformOffset(RegisterType::IntUniform, instr.flow_control.int_uniform_id); |  | ||||||
|     mov(LOOPCOUNT, dword[SETUP + offset]); |     mov(LOOPCOUNT, dword[SETUP + offset]); | ||||||
|     mov(LOOPCOUNT_REG, LOOPCOUNT); |     mov(LOOPCOUNT_REG, LOOPCOUNT); | ||||||
|     shr(LOOPCOUNT_REG, 4); |     shr(LOOPCOUNT_REG, 4); | ||||||
|   | |||||||
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