shader_decode: SULD.D fix decode SNORM component
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6f2b7087c2
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@ -350,25 +350,24 @@ u32 ShaderIR::DecodeImage(NodeBlock& bb, u32 pc) {
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Node converted_value = [&] {
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Node converted_value = [&] {
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switch (component_type) {
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switch (component_type) {
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case ComponentType::SNORM: {
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case ComponentType::SNORM: {
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is_signed = true;
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// range [-1.0, 1.0]
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// range [-1.0, 1.0]
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auto cnv_value =
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auto cnv_value = Operation(OperationCode::FMul, original_value, Immediate(127.f));
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Operation(OperationCode::FAdd, original_value, Immediate(1.f));
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cnv_value = SignedOperation(OperationCode::ICastFloat, is_signed,
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cnv_value = Operation(OperationCode::FMul, std::move(cnv_value),
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Immediate(127.f));
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is_signed = false;
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return SignedOperation(OperationCode::ICastFloat, is_signed,
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std::move(cnv_value));
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std::move(cnv_value));
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return BitfieldExtract(std::move(cnv_value), 0, 8);
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}
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}
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case ComponentType::UNORM: {
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case ComponentType::UNORM: {
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is_signed = false;
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// range [0.0, 1.0]
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// range [0.0, 1.0]
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auto cnv_value =
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auto cnv_value =
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Operation(OperationCode::FMul, original_value, Immediate(255.f));
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Operation(OperationCode::FMul, original_value, Immediate(255.f));
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is_signed = false;
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return SignedOperation(OperationCode::ICastFloat, is_signed,
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return SignedOperation(OperationCode::ICastFloat, is_signed,
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std::move(cnv_value));
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std::move(cnv_value));
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}
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}
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case ComponentType::SINT: // range [-128,128]
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case ComponentType::SINT: // range [-128,127]
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return Operation(OperationCode::IAdd, original_value, Immediate(128));
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is_signed = true;
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return original_value;
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case ComponentType::UINT: // range [0, 255]
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case ComponentType::UINT: // range [0, 255]
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is_signed = false;
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is_signed = false;
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return original_value;
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return original_value;
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