gl_shader_decompiler: Support multi-destination for TEXS.
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bdd68fc210
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@ -261,6 +261,11 @@ union Instruction {
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BitField<50, 1, u64> saturate_a;
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BitField<50, 1, u64> saturate_a;
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} conversion;
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} conversion;
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union {
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// TODO(bunnei): This is just a guess, needs to be verified
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BitField<52, 1, u64> enable_g_component;
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} texs;
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BitField<61, 1, u64> is_b_imm;
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BitField<61, 1, u64> is_b_imm;
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BitField<60, 1, u64> is_b_gpr;
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BitField<60, 1, u64> is_b_gpr;
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BitField<59, 1, u64> is_c_gpr;
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BitField<59, 1, u64> is_c_gpr;
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@ -903,9 +903,25 @@ private:
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++shader.scope;
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++shader.scope;
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shader.AddLine(coord);
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shader.AddLine(coord);
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const std::string texture = "texture(" + sampler + ", coords)";
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const std::string texture = "texture(" + sampler + ", coords)";
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for (unsigned elem = 0; elem < instr.attribute.fmt20.size; ++elem) {
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regs.SetRegisterToFloat(instr.gpr0, elem, texture, 1, 4, false, elem);
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// TEXS has two destination registers. RG goes into gpr0+0 and gpr0+1, and BA goes
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// into gpr28+0 and gpr28+1
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size_t offset{};
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for (const auto& dest : {instr.gpr0.Value(), instr.gpr28.Value()}) {
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for (unsigned elem = 0; elem < 2; ++elem) {
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if (dest + elem >= Register::ZeroIndex) {
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// Skip invalid register values
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break;
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}
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}
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regs.SetRegisterToFloat(dest, elem + offset, texture, 1, 4, false, elem);
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if (!instr.texs.enable_g_component) {
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// Skip the second component
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break;
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}
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}
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offset += 2;
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}
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--shader.scope;
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--shader.scope;
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shader.AddLine("}");
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shader.AddLine("}");
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break;
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break;
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