Lioncash d53c9cde1a armstate: Correct FIQ register banking ...

FIQ has seven banked registers (R8 to R14), not two.

2016-03-21 18:56:27 -04:00

..

audio_core

DSP: Implement Pipe 2

2016-03-06 21:25:44 +00:00

citra

Merge pull request #1526 from bunnei/sdl-rgb8

2016-03-15 15:48:59 -04:00

citra_qt

Merge pull request #1466 from LittleWhite-tb/gamelist-update-recent

2016-03-16 23:42:24 -07:00

common

vector_math: Add missing member in Vec4's SetZero function

2016-03-18 01:49:34 -04:00

core

armstate: Correct FIQ register banking

2016-03-21 18:56:27 -04:00

video_core

Merge pull request #1538 from lioncash/dot

2016-03-20 00:35:06 -04:00

CMakeLists.txt

Dependencies: Remove GLFW, Add SDL2

2016-03-02 14:09:02 +00:00