Merge pull request #3287 from ReinUsesLisp/ldg-stg-16
shader_ir/memory: Implement u16 and u8 for STG and LDG
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commit
55f95e7f26
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@ -6,6 +6,7 @@
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#include <vector>
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#include <vector>
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#include <fmt/format.h>
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#include <fmt/format.h>
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#include "common/alignment.h"
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#include "common/assert.h"
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#include "common/assert.h"
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#include "common/common_types.h"
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#include "common/common_types.h"
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#include "common/logging/log.h"
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#include "common/logging/log.h"
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@ -22,34 +23,39 @@ using Tegra::Shader::Register;
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namespace {
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namespace {
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u32 GetLdgMemorySize(Tegra::Shader::UniformType uniform_type) {
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bool IsUnaligned(Tegra::Shader::UniformType uniform_type) {
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return uniform_type == Tegra::Shader::UniformType::UnsignedByte ||
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uniform_type == Tegra::Shader::UniformType::UnsignedShort;
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}
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u32 GetUnalignedMask(Tegra::Shader::UniformType uniform_type) {
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switch (uniform_type) {
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switch (uniform_type) {
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case Tegra::Shader::UniformType::UnsignedByte:
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case Tegra::Shader::UniformType::UnsignedByte:
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case Tegra::Shader::UniformType::Single:
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return 0b11;
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return 1;
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case Tegra::Shader::UniformType::UnsignedShort:
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case Tegra::Shader::UniformType::Double:
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return 0b10;
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return 2;
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case Tegra::Shader::UniformType::Quad:
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case Tegra::Shader::UniformType::UnsignedQuad:
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return 4;
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default:
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default:
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UNIMPLEMENTED_MSG("Unimplemented size={}!", static_cast<u32>(uniform_type));
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UNREACHABLE();
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return 1;
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return 0;
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}
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}
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}
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}
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u32 GetStgMemorySize(Tegra::Shader::UniformType uniform_type) {
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u32 GetMemorySize(Tegra::Shader::UniformType uniform_type) {
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switch (uniform_type) {
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switch (uniform_type) {
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case Tegra::Shader::UniformType::UnsignedByte:
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return 8;
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case Tegra::Shader::UniformType::UnsignedShort:
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return 16;
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case Tegra::Shader::UniformType::Single:
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case Tegra::Shader::UniformType::Single:
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return 1;
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return 32;
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case Tegra::Shader::UniformType::Double:
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case Tegra::Shader::UniformType::Double:
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return 2;
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return 64;
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case Tegra::Shader::UniformType::Quad:
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case Tegra::Shader::UniformType::Quad:
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case Tegra::Shader::UniformType::UnsignedQuad:
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case Tegra::Shader::UniformType::UnsignedQuad:
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return 4;
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return 128;
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default:
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default:
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UNIMPLEMENTED_MSG("Unimplemented size={}!", static_cast<u32>(uniform_type));
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UNIMPLEMENTED_MSG("Unimplemented size={}!", static_cast<u32>(uniform_type));
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return 1;
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return 32;
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}
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}
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}
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}
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@ -184,9 +190,10 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
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}();
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}();
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const auto [real_address_base, base_address, descriptor] =
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const auto [real_address_base, base_address, descriptor] =
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TrackGlobalMemory(bb, instr, false);
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TrackGlobalMemory(bb, instr, true, false);
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const u32 count = GetLdgMemorySize(type);
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const u32 size = GetMemorySize(type);
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const u32 count = Common::AlignUp(size, 32) / 32;
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if (!real_address_base || !base_address) {
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if (!real_address_base || !base_address) {
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// Tracking failed, load zeroes.
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// Tracking failed, load zeroes.
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for (u32 i = 0; i < count; ++i) {
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for (u32 i = 0; i < count; ++i) {
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@ -200,14 +207,15 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
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const Node real_address = Operation(OperationCode::UAdd, real_address_base, it_offset);
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const Node real_address = Operation(OperationCode::UAdd, real_address_base, it_offset);
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Node gmem = MakeNode<GmemNode>(real_address, base_address, descriptor);
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Node gmem = MakeNode<GmemNode>(real_address, base_address, descriptor);
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if (type == Tegra::Shader::UniformType::UnsignedByte) {
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// To handle unaligned loads get the bytes used to dereference global memory and extract
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// To handle unaligned loads get the byte used to dereferenced global memory
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// those bytes from the loaded u32.
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// and extract that byte from the loaded uint32.
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if (IsUnaligned(type)) {
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Node byte = Operation(OperationCode::UBitwiseAnd, real_address, Immediate(3));
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Node mask = Immediate(GetUnalignedMask(type));
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byte = Operation(OperationCode::ULogicalShiftLeft, std::move(byte), Immediate(3));
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Node offset = Operation(OperationCode::UBitwiseAnd, real_address, std::move(mask));
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offset = Operation(OperationCode::ULogicalShiftLeft, offset, Immediate(3));
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gmem = Operation(OperationCode::UBitfieldExtract, std::move(gmem), std::move(byte),
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gmem = Operation(OperationCode::UBitfieldExtract, std::move(gmem),
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Immediate(8));
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std::move(offset), Immediate(size));
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}
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}
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SetTemporary(bb, i, gmem);
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SetTemporary(bb, i, gmem);
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@ -295,19 +303,32 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
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}
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}
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}();
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}();
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// For unaligned reads we have to read memory too.
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const bool is_read = IsUnaligned(type);
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const auto [real_address_base, base_address, descriptor] =
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const auto [real_address_base, base_address, descriptor] =
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TrackGlobalMemory(bb, instr, true);
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TrackGlobalMemory(bb, instr, is_read, true);
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if (!real_address_base || !base_address) {
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if (!real_address_base || !base_address) {
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// Tracking failed, skip the store.
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// Tracking failed, skip the store.
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break;
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break;
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}
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}
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const u32 count = GetStgMemorySize(type);
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const u32 size = GetMemorySize(type);
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const u32 count = Common::AlignUp(size, 32) / 32;
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for (u32 i = 0; i < count; ++i) {
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for (u32 i = 0; i < count; ++i) {
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const Node it_offset = Immediate(i * 4);
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const Node it_offset = Immediate(i * 4);
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const Node real_address = Operation(OperationCode::UAdd, real_address_base, it_offset);
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const Node real_address = Operation(OperationCode::UAdd, real_address_base, it_offset);
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const Node gmem = MakeNode<GmemNode>(real_address, base_address, descriptor);
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const Node gmem = MakeNode<GmemNode>(real_address, base_address, descriptor);
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const Node value = GetRegister(instr.gpr0.Value() + i);
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Node value = GetRegister(instr.gpr0.Value() + i);
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if (IsUnaligned(type)) {
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Node mask = Immediate(GetUnalignedMask(type));
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Node offset = Operation(OperationCode::UBitwiseAnd, real_address, std::move(mask));
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offset = Operation(OperationCode::ULogicalShiftLeft, offset, Immediate(3));
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value = Operation(OperationCode::UBitfieldInsert, gmem, std::move(value), offset,
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Immediate(size));
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}
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bb.push_back(Operation(OperationCode::Assign, gmem, value));
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bb.push_back(Operation(OperationCode::Assign, gmem, value));
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}
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}
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break;
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break;
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@ -336,7 +357,7 @@ u32 ShaderIR::DecodeMemory(NodeBlock& bb, u32 pc) {
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std::tuple<Node, Node, GlobalMemoryBase> ShaderIR::TrackGlobalMemory(NodeBlock& bb,
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std::tuple<Node, Node, GlobalMemoryBase> ShaderIR::TrackGlobalMemory(NodeBlock& bb,
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Instruction instr,
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Instruction instr,
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bool is_write) {
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bool is_read, bool is_write) {
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const auto addr_register{GetRegister(instr.gmem.gpr)};
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const auto addr_register{GetRegister(instr.gmem.gpr)};
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const auto immediate_offset{static_cast<u32>(instr.gmem.offset)};
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const auto immediate_offset{static_cast<u32>(instr.gmem.offset)};
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@ -351,11 +372,8 @@ std::tuple<Node, Node, GlobalMemoryBase> ShaderIR::TrackGlobalMemory(NodeBlock&
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const GlobalMemoryBase descriptor{index, offset};
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const GlobalMemoryBase descriptor{index, offset};
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const auto& [entry, is_new] = used_global_memory.try_emplace(descriptor);
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const auto& [entry, is_new] = used_global_memory.try_emplace(descriptor);
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auto& usage = entry->second;
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auto& usage = entry->second;
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if (is_write) {
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usage.is_written |= is_write;
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usage.is_written = true;
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usage.is_read |= is_read;
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} else {
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usage.is_read = true;
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}
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const auto real_address =
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const auto real_address =
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Operation(OperationCode::UAdd, NO_PRECISE, Immediate(immediate_offset), addr_register);
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Operation(OperationCode::UAdd, NO_PRECISE, Immediate(immediate_offset), addr_register);
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@ -394,7 +394,7 @@ private:
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std::tuple<Node, Node, GlobalMemoryBase> TrackGlobalMemory(NodeBlock& bb,
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std::tuple<Node, Node, GlobalMemoryBase> TrackGlobalMemory(NodeBlock& bb,
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Tegra::Shader::Instruction instr,
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Tegra::Shader::Instruction instr,
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bool is_write);
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bool is_read, bool is_write);
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/// Register new amending code and obtain the reference id.
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/// Register new amending code and obtain the reference id.
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std::size_t DeclareAmend(Node new_amend);
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std::size_t DeclareAmend(Node new_amend);
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