dyncom: remove load_r15 from arm_inst
It's entirely unused. Also allows getting rid of more clunky macros.
This commit is contained in:
		| @@ -711,7 +711,6 @@ struct arm_inst { | |||||||
|     unsigned int idx; |     unsigned int idx; | ||||||
|     unsigned int cond; |     unsigned int cond; | ||||||
|     int br; |     int br; | ||||||
|     int load_r15; |  | ||||||
|     char component[0]; |     char component[0]; | ||||||
| }; | }; | ||||||
|  |  | ||||||
| @@ -1250,10 +1249,6 @@ static get_addr_fp_t get_calc_addr_op(unsigned int inst) { | |||||||
|  |  | ||||||
| #define INTERPRETER_TRANSLATE(s) glue(InterpreterTranslate_, s) | #define INTERPRETER_TRANSLATE(s) glue(InterpreterTranslate_, s) | ||||||
|  |  | ||||||
| #define CHECK_RN            (inst_cream->Rn == 15) |  | ||||||
| #define CHECK_RM            (inst_cream->Rm == 15) |  | ||||||
| #define CHECK_RS            (inst_cream->Rs == 15) |  | ||||||
|  |  | ||||||
| static ARM_INST_PTR INTERPRETER_TRANSLATE(adc)(unsigned int inst, int index) | static ARM_INST_PTR INTERPRETER_TRANSLATE(adc)(unsigned int inst, int index) | ||||||
| { | { | ||||||
|     arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(adc_inst)); |     arm_inst *inst_base = (arm_inst *)AllocBuffer(sizeof(arm_inst) + sizeof(adc_inst)); | ||||||
| @@ -1262,19 +1257,17 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(adc)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->I  = BIT(inst, 25); |     inst_cream->I  = BIT(inst, 25); | ||||||
|     inst_cream->S  = BIT(inst, 20); |     inst_cream->S  = BIT(inst, 20); | ||||||
|     inst_cream->Rn = BITS(inst, 16, 19); |     inst_cream->Rn = BITS(inst, 16, 19); | ||||||
|     inst_cream->Rd = BITS(inst, 12, 15); |     inst_cream->Rd = BITS(inst, 12, 15); | ||||||
|     if (CHECK_RN)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|     inst_cream->shifter_operand = BITS(inst, 0, 11); |     inst_cream->shifter_operand = BITS(inst, 0, 11); | ||||||
|     inst_cream->shtop_func = get_shtop(inst); |     inst_cream->shtop_func = get_shtop(inst); | ||||||
|     if (inst_cream->Rd == 15) { |  | ||||||
|  |     if (inst_cream->Rd == 15) | ||||||
|         inst_base->br = INDIRECT_BRANCH; |         inst_base->br = INDIRECT_BRANCH; | ||||||
|     } |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| static ARM_INST_PTR INTERPRETER_TRANSLATE(add)(unsigned int inst, int index) | static ARM_INST_PTR INTERPRETER_TRANSLATE(add)(unsigned int inst, int index) | ||||||
| @@ -1285,19 +1278,17 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(add)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->I  = BIT(inst, 25); |     inst_cream->I  = BIT(inst, 25); | ||||||
|     inst_cream->S  = BIT(inst, 20); |     inst_cream->S  = BIT(inst, 20); | ||||||
|     inst_cream->Rn = BITS(inst, 16, 19); |     inst_cream->Rn = BITS(inst, 16, 19); | ||||||
|     inst_cream->Rd = BITS(inst, 12, 15); |     inst_cream->Rd = BITS(inst, 12, 15); | ||||||
|     if (CHECK_RN)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|     inst_cream->shifter_operand = BITS(inst, 0, 11); |     inst_cream->shifter_operand = BITS(inst, 0, 11); | ||||||
|     inst_cream->shtop_func = get_shtop(inst); |     inst_cream->shtop_func = get_shtop(inst); | ||||||
|     if (inst_cream->Rd == 15) { |  | ||||||
|  |     if (inst_cream->Rd == 15) | ||||||
|         inst_base->br = INDIRECT_BRANCH; |         inst_base->br = INDIRECT_BRANCH; | ||||||
|     } |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| static ARM_INST_PTR INTERPRETER_TRANSLATE(and)(unsigned int inst, int index) | static ARM_INST_PTR INTERPRETER_TRANSLATE(and)(unsigned int inst, int index) | ||||||
| @@ -1308,18 +1299,17 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(and)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->I  = BIT(inst, 25); |     inst_cream->I  = BIT(inst, 25); | ||||||
|     inst_cream->S  = BIT(inst, 20); |     inst_cream->S  = BIT(inst, 20); | ||||||
|     inst_cream->Rn = BITS(inst, 16, 19); |     inst_cream->Rn = BITS(inst, 16, 19); | ||||||
|     inst_cream->Rd = BITS(inst, 12, 15); |     inst_cream->Rd = BITS(inst, 12, 15); | ||||||
|     if (CHECK_RN)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|     inst_cream->shifter_operand = BITS(inst, 0, 11); |     inst_cream->shifter_operand = BITS(inst, 0, 11); | ||||||
|     inst_cream->shtop_func = get_shtop(inst); |     inst_cream->shtop_func = get_shtop(inst); | ||||||
|  | 	 | ||||||
|     if (inst_cream->Rd == 15)  |     if (inst_cream->Rd == 15)  | ||||||
|         inst_base->br = INDIRECT_BRANCH; |         inst_base->br = INDIRECT_BRANCH; | ||||||
|  |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| static ARM_INST_PTR INTERPRETER_TRANSLATE(bbl)(unsigned int inst, int index) | static ARM_INST_PTR INTERPRETER_TRANSLATE(bbl)(unsigned int inst, int index) | ||||||
| @@ -1352,14 +1342,11 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(bic)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->I  = BIT(inst, 25); |     inst_cream->I  = BIT(inst, 25); | ||||||
|     inst_cream->S  = BIT(inst, 20); |     inst_cream->S  = BIT(inst, 20); | ||||||
|     inst_cream->Rn = BITS(inst, 16, 19); |     inst_cream->Rn = BITS(inst, 16, 19); | ||||||
|     inst_cream->Rd = BITS(inst, 12, 15); |     inst_cream->Rd = BITS(inst, 12, 15); | ||||||
|     if (CHECK_RN)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|     inst_cream->shifter_operand = BITS(inst, 0, 11); |     inst_cream->shifter_operand = BITS(inst, 0, 11); | ||||||
|     inst_cream->shtop_func = get_shtop(inst); |     inst_cream->shtop_func = get_shtop(inst); | ||||||
|  |  | ||||||
| @@ -1376,7 +1363,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(bkpt)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->imm = (BITS(inst, 8, 19) << 4) | BITS(inst, 0, 3); |     inst_cream->imm = (BITS(inst, 8, 19) << 4) | BITS(inst, 0, 3); | ||||||
|  |  | ||||||
| @@ -1426,7 +1412,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(cdp)(unsigned int inst, int index) { | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->CRm      = BITS(inst,  0,  3); |     inst_cream->CRm      = BITS(inst,  0,  3); | ||||||
|     inst_cream->CRd      = BITS(inst, 12, 15); |     inst_cream->CRd      = BITS(inst, 12, 15); | ||||||
| @@ -1456,12 +1441,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(clz)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->Rm = BITS(inst,  0,  3); |     inst_cream->Rm = BITS(inst,  0,  3); | ||||||
|     inst_cream->Rd = BITS(inst, 12, 15); |     inst_cream->Rd = BITS(inst, 12, 15); | ||||||
|     if (CHECK_RM)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|  |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| @@ -1473,15 +1455,12 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(cmn)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->I  = BIT(inst, 25); |     inst_cream->I  = BIT(inst, 25); | ||||||
|     inst_cream->Rn = BITS(inst, 16, 19); |     inst_cream->Rn = BITS(inst, 16, 19); | ||||||
|  |  | ||||||
|     if (CHECK_RN)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|     inst_cream->shifter_operand = BITS(inst, 0, 11); |     inst_cream->shifter_operand = BITS(inst, 0, 11); | ||||||
|     inst_cream->shtop_func = get_shtop(inst); |     inst_cream->shtop_func = get_shtop(inst); | ||||||
|  |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| static ARM_INST_PTR INTERPRETER_TRANSLATE(cmp)(unsigned int inst, int index) | static ARM_INST_PTR INTERPRETER_TRANSLATE(cmp)(unsigned int inst, int index) | ||||||
| @@ -1492,14 +1471,12 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(cmp)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->I  = BIT(inst, 25); |     inst_cream->I  = BIT(inst, 25); | ||||||
|     inst_cream->Rn = BITS(inst, 16, 19); |     inst_cream->Rn = BITS(inst, 16, 19); | ||||||
|     if (CHECK_RN)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|     inst_cream->shifter_operand = BITS(inst, 0, 11); |     inst_cream->shifter_operand = BITS(inst, 0, 11); | ||||||
|     inst_cream->shtop_func = get_shtop(inst); |     inst_cream->shtop_func = get_shtop(inst); | ||||||
|  |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| static ARM_INST_PTR INTERPRETER_TRANSLATE(cps)(unsigned int inst, int index) | static ARM_INST_PTR INTERPRETER_TRANSLATE(cps)(unsigned int inst, int index) | ||||||
| @@ -1549,19 +1526,17 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(eor)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->I  = BIT(inst, 25); |     inst_cream->I  = BIT(inst, 25); | ||||||
|     inst_cream->S  = BIT(inst, 20); |     inst_cream->S  = BIT(inst, 20); | ||||||
|     inst_cream->Rn = BITS(inst, 16, 19); |     inst_cream->Rn = BITS(inst, 16, 19); | ||||||
|     inst_cream->Rd = BITS(inst, 12, 15); |     inst_cream->Rd = BITS(inst, 12, 15); | ||||||
|     if (CHECK_RN)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|     inst_cream->shifter_operand = BITS(inst, 0, 11); |     inst_cream->shifter_operand = BITS(inst, 0, 11); | ||||||
|     inst_cream->shtop_func = get_shtop(inst); |     inst_cream->shtop_func = get_shtop(inst); | ||||||
|     if (inst_cream->Rd == 15) { |  | ||||||
|  |     if (inst_cream->Rd == 15) | ||||||
|         inst_base->br = INDIRECT_BRANCH; |         inst_base->br = INDIRECT_BRANCH; | ||||||
|     } |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| static ARM_INST_PTR INTERPRETER_TRANSLATE(ldc)(unsigned int inst, int index) | static ARM_INST_PTR INTERPRETER_TRANSLATE(ldc)(unsigned int inst, int index) | ||||||
| @@ -1598,13 +1573,10 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sxth)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->Rd     = BITS(inst, 12, 15); |     inst_cream->Rd     = BITS(inst, 12, 15); | ||||||
|     inst_cream->Rm     = BITS(inst,  0,  3); |     inst_cream->Rm     = BITS(inst,  0,  3); | ||||||
|     inst_cream->rotate = BITS(inst, 10, 11); |     inst_cream->rotate = BITS(inst, 10, 11); | ||||||
|     if (CHECK_RM)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|  |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| @@ -1616,14 +1588,13 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(ldr)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->inst = inst; |     inst_cream->inst = inst; | ||||||
|     inst_cream->get_addr = get_calc_addr_op(inst); |     inst_cream->get_addr = get_calc_addr_op(inst); | ||||||
|  |  | ||||||
|     if (BITS(inst, 12, 15) == 15) { |     if (BITS(inst, 12, 15) == 15) | ||||||
|         inst_base->br = INDIRECT_BRANCH; |         inst_base->br = INDIRECT_BRANCH; | ||||||
|     } |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
|  |  | ||||||
| @@ -1635,14 +1606,13 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(ldrcond)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->inst = inst; |     inst_cream->inst = inst; | ||||||
|     inst_cream->get_addr = get_calc_addr_op(inst); |     inst_cream->get_addr = get_calc_addr_op(inst); | ||||||
|  |  | ||||||
|     if (BITS(inst, 12, 15) == 15) { |     if (BITS(inst, 12, 15) == 15) | ||||||
|         inst_base->br = INDIRECT_BRANCH; |         inst_base->br = INDIRECT_BRANCH; | ||||||
|     } |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
|  |  | ||||||
| @@ -1654,13 +1624,10 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(uxth)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->Rd     = BITS(inst, 12, 15); |     inst_cream->Rd     = BITS(inst, 12, 15); | ||||||
|     inst_cream->rotate = BITS(inst, 10, 11); |     inst_cream->rotate = BITS(inst, 10, 11); | ||||||
|     inst_cream->Rm     = BITS(inst,  0,  3); |     inst_cream->Rm     = BITS(inst,  0,  3); | ||||||
|     if (CHECK_RM)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|  |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| @@ -1672,14 +1639,11 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtah)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->Rn     = BITS(inst, 16, 19); |     inst_cream->Rn     = BITS(inst, 16, 19); | ||||||
|     inst_cream->Rd     = BITS(inst, 12, 15); |     inst_cream->Rd     = BITS(inst, 12, 15); | ||||||
|     inst_cream->rotate = BITS(inst, 10, 11); |     inst_cream->rotate = BITS(inst, 10, 11); | ||||||
|     inst_cream->Rm     = BITS(inst,  0,  3); |     inst_cream->Rm     = BITS(inst,  0,  3); | ||||||
|     if (CHECK_RM || CHECK_RN)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|  |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| @@ -1868,7 +1832,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(mcrr)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->crm      = BITS(inst, 0, 3); |     inst_cream->crm      = BITS(inst, 0, 3); | ||||||
|     inst_cream->opcode_1 = BITS(inst, 4, 7); |     inst_cream->opcode_1 = BITS(inst, 4, 7); | ||||||
| @@ -1887,7 +1850,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(mla)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->S  = BIT(inst, 20); |     inst_cream->S  = BIT(inst, 20); | ||||||
|     inst_cream->Rn = BITS(inst, 12, 15); |     inst_cream->Rn = BITS(inst, 12, 15); | ||||||
| @@ -1895,9 +1857,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(mla)(unsigned int inst, int index) | |||||||
|     inst_cream->Rs = BITS(inst,  8, 11); |     inst_cream->Rs = BITS(inst,  8, 11); | ||||||
|     inst_cream->Rm = BITS(inst,  0,  3); |     inst_cream->Rm = BITS(inst,  0,  3); | ||||||
|  |  | ||||||
|     if (CHECK_RM || CHECK_RN || CHECK_RS)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|  |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| static ARM_INST_PTR INTERPRETER_TRANSLATE(mov)(unsigned int inst, int index) | static ARM_INST_PTR INTERPRETER_TRANSLATE(mov)(unsigned int inst, int index) | ||||||
| @@ -1980,15 +1939,12 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(mul)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->S  = BIT(inst, 20); |     inst_cream->S  = BIT(inst, 20); | ||||||
|     inst_cream->Rm = BITS(inst, 0, 3); |     inst_cream->Rm = BITS(inst, 0, 3); | ||||||
|     inst_cream->Rs = BITS(inst, 8, 11); |     inst_cream->Rs = BITS(inst, 8, 11); | ||||||
|     inst_cream->Rd = BITS(inst, 16, 19); |     inst_cream->Rd = BITS(inst, 16, 19); | ||||||
|  |  | ||||||
|     if (CHECK_RM || CHECK_RS)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| static ARM_INST_PTR INTERPRETER_TRANSLATE(mvn)(unsigned int inst, int index) | static ARM_INST_PTR INTERPRETER_TRANSLATE(mvn)(unsigned int inst, int index) | ||||||
| @@ -2020,7 +1976,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(orr)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->I  = BIT(inst, 25); |     inst_cream->I  = BIT(inst, 25); | ||||||
|     inst_cream->S  = BIT(inst, 20); |     inst_cream->S  = BIT(inst, 20); | ||||||
| @@ -2029,11 +1984,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(orr)(unsigned int inst, int index) | |||||||
|     inst_cream->shifter_operand = BITS(inst, 0, 11); |     inst_cream->shifter_operand = BITS(inst, 0, 11); | ||||||
|     inst_cream->shtop_func = get_shtop(inst); |     inst_cream->shtop_func = get_shtop(inst); | ||||||
|  |  | ||||||
|     if (CHECK_RN)  |     if (inst_cream->Rd == 15) | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|     if (inst_cream->Rd == 15) { |  | ||||||
|         inst_base->br = INDIRECT_BRANCH; |         inst_base->br = INDIRECT_BRANCH; | ||||||
|     } |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
|  |  | ||||||
| @@ -2045,7 +1998,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(nop)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| @@ -2058,7 +2010,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(pkhbt)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->Rd  = BITS(inst, 12, 15); |     inst_cream->Rd  = BITS(inst, 12, 15); | ||||||
|     inst_cream->Rn  = BITS(inst, 16, 19); |     inst_cream->Rn  = BITS(inst, 16, 19); | ||||||
| @@ -2080,7 +2031,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(pld)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| @@ -2093,7 +2043,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(qadd)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->op1 = BITS(inst, 21, 22); |     inst_cream->op1 = BITS(inst, 21, 22); | ||||||
|     inst_cream->Rm  = BITS(inst, 0, 3); |     inst_cream->Rm  = BITS(inst, 0, 3); | ||||||
| @@ -2123,7 +2072,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(qadd8)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->Rm  = BITS(inst, 0, 3); |     inst_cream->Rm  = BITS(inst, 0, 3); | ||||||
|     inst_cream->Rn  = BITS(inst, 16, 19); |     inst_cream->Rn  = BITS(inst, 16, 19); | ||||||
| @@ -2162,7 +2110,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(rev)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->Rm  = BITS(inst,  0,  3); |     inst_cream->Rm  = BITS(inst,  0,  3); | ||||||
|     inst_cream->Rd  = BITS(inst, 12, 15); |     inst_cream->Rd  = BITS(inst, 12, 15); | ||||||
| @@ -2188,7 +2135,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(rfe)(unsigned int inst, int index) | |||||||
|     inst_base->cond = AL; |     inst_base->cond = AL; | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = INDIRECT_BRANCH; |     inst_base->br   = INDIRECT_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->inst = inst; |     inst_cream->inst = inst; | ||||||
|     inst_cream->get_addr = get_calc_addr_op(inst); |     inst_cream->get_addr = get_calc_addr_op(inst); | ||||||
| @@ -2204,7 +2150,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(rsb)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->I  = BIT(inst, 25); |     inst_cream->I  = BIT(inst, 25); | ||||||
|     inst_cream->S  = BIT(inst, 20); |     inst_cream->S  = BIT(inst, 20); | ||||||
| @@ -2212,12 +2157,10 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(rsb)(unsigned int inst, int index) | |||||||
|     inst_cream->Rd = BITS(inst, 12, 15); |     inst_cream->Rd = BITS(inst, 12, 15); | ||||||
|     inst_cream->shifter_operand = BITS(inst, 0, 11); |     inst_cream->shifter_operand = BITS(inst, 0, 11); | ||||||
|     inst_cream->shtop_func = get_shtop(inst); |     inst_cream->shtop_func = get_shtop(inst); | ||||||
|     if (CHECK_RN)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|  |  | ||||||
|     if (inst_cream->Rd == 15) { |     if (inst_cream->Rd == 15) | ||||||
|         inst_base->br = INDIRECT_BRANCH; |         inst_base->br = INDIRECT_BRANCH; | ||||||
|     } |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| static ARM_INST_PTR INTERPRETER_TRANSLATE(rsc)(unsigned int inst, int index) | static ARM_INST_PTR INTERPRETER_TRANSLATE(rsc)(unsigned int inst, int index) | ||||||
| @@ -2228,7 +2171,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(rsc)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->I  = BIT(inst, 25); |     inst_cream->I  = BIT(inst, 25); | ||||||
|     inst_cream->S  = BIT(inst, 20); |     inst_cream->S  = BIT(inst, 20); | ||||||
| @@ -2236,12 +2178,10 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(rsc)(unsigned int inst, int index) | |||||||
|     inst_cream->Rd = BITS(inst, 12, 15); |     inst_cream->Rd = BITS(inst, 12, 15); | ||||||
|     inst_cream->shifter_operand = BITS(inst, 0, 11); |     inst_cream->shifter_operand = BITS(inst, 0, 11); | ||||||
|     inst_cream->shtop_func = get_shtop(inst); |     inst_cream->shtop_func = get_shtop(inst); | ||||||
|     if (CHECK_RN) |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|  |  | ||||||
|     if (inst_cream->Rd == 15) { |     if (inst_cream->Rd == 15) | ||||||
|         inst_base->br = INDIRECT_BRANCH; |         inst_base->br = INDIRECT_BRANCH; | ||||||
|     } |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| static ARM_INST_PTR INTERPRETER_TRANSLATE(sadd8)(unsigned int inst, int index) | static ARM_INST_PTR INTERPRETER_TRANSLATE(sadd8)(unsigned int inst, int index) | ||||||
| @@ -2252,7 +2192,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sadd8)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->Rm  = BITS(inst, 0, 3); |     inst_cream->Rm  = BITS(inst, 0, 3); | ||||||
|     inst_cream->Rn  = BITS(inst, 16, 19); |     inst_cream->Rn  = BITS(inst, 16, 19); | ||||||
| @@ -2291,7 +2230,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sbc)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->I  = BIT(inst, 25); |     inst_cream->I  = BIT(inst, 25); | ||||||
|     inst_cream->S  = BIT(inst, 20); |     inst_cream->S  = BIT(inst, 20); | ||||||
| @@ -2299,12 +2237,10 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sbc)(unsigned int inst, int index) | |||||||
|     inst_cream->Rd = BITS(inst, 12, 15); |     inst_cream->Rd = BITS(inst, 12, 15); | ||||||
|     inst_cream->shifter_operand = BITS(inst, 0, 11); |     inst_cream->shifter_operand = BITS(inst, 0, 11); | ||||||
|     inst_cream->shtop_func = get_shtop(inst); |     inst_cream->shtop_func = get_shtop(inst); | ||||||
|     if (CHECK_RN) |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|  |  | ||||||
|     if (inst_cream->Rd == 15) { |     if (inst_cream->Rd == 15) | ||||||
|         inst_base->br = INDIRECT_BRANCH; |         inst_base->br = INDIRECT_BRANCH; | ||||||
|     } |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| static ARM_INST_PTR INTERPRETER_TRANSLATE(sel)(unsigned int inst, int index) | static ARM_INST_PTR INTERPRETER_TRANSLATE(sel)(unsigned int inst, int index) | ||||||
| @@ -2315,7 +2251,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sel)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->Rm  = BITS(inst, 0, 3); |     inst_cream->Rm  = BITS(inst, 0, 3); | ||||||
|     inst_cream->Rn  = BITS(inst, 16, 19); |     inst_cream->Rn  = BITS(inst, 16, 19); | ||||||
| @@ -2334,7 +2269,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(setend)(unsigned int inst, int index) | |||||||
|     inst_base->cond = AL; |     inst_base->cond = AL; | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->set_bigend = BIT(inst, 9); |     inst_cream->set_bigend = BIT(inst, 9); | ||||||
|  |  | ||||||
| @@ -2348,7 +2282,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sev)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| @@ -2361,7 +2294,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(shadd8)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->op1 = BITS(inst, 20, 21); |     inst_cream->op1 = BITS(inst, 20, 21); | ||||||
|     inst_cream->op2 = BITS(inst, 5, 7); |     inst_cream->op2 = BITS(inst, 5, 7); | ||||||
| @@ -2400,7 +2332,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smla)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->x  = BIT(inst, 5); |     inst_cream->x  = BIT(inst, 5); | ||||||
|     inst_cream->y  = BIT(inst, 6); |     inst_cream->y  = BIT(inst, 6); | ||||||
| @@ -2420,7 +2351,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smlad)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->m   = BIT(inst, 5); |     inst_cream->m   = BIT(inst, 5); | ||||||
|     inst_cream->Rn  = BITS(inst, 0, 3); |     inst_cream->Rn  = BITS(inst, 0, 3); | ||||||
| @@ -2453,7 +2383,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smlal)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->S    = BIT(inst, 20); |     inst_cream->S    = BIT(inst, 20); | ||||||
|     inst_cream->Rm   = BITS(inst, 0, 3); |     inst_cream->Rm   = BITS(inst, 0, 3); | ||||||
| @@ -2461,8 +2390,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smlal)(unsigned int inst, int index) | |||||||
|     inst_cream->RdHi = BITS(inst, 16, 19); |     inst_cream->RdHi = BITS(inst, 16, 19); | ||||||
|     inst_cream->RdLo = BITS(inst, 12, 15); |     inst_cream->RdLo = BITS(inst, 12, 15); | ||||||
|  |  | ||||||
|     if (CHECK_RM || CHECK_RS)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
|  |  | ||||||
| @@ -2474,7 +2401,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smlalxy)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->x    = BIT(inst, 5); |     inst_cream->x    = BIT(inst, 5); | ||||||
|     inst_cream->y    = BIT(inst, 6); |     inst_cream->y    = BIT(inst, 6); | ||||||
| @@ -2494,7 +2420,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smlaw)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->Ra = BITS(inst, 12, 15); |     inst_cream->Ra = BITS(inst, 12, 15); | ||||||
|     inst_cream->Rm = BITS(inst, 8, 11); |     inst_cream->Rm = BITS(inst, 8, 11); | ||||||
| @@ -2513,7 +2438,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smlald)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->Rm   = BITS(inst, 8, 11); |     inst_cream->Rm   = BITS(inst, 8, 11); | ||||||
|     inst_cream->Rn   = BITS(inst, 0, 3); |     inst_cream->Rn   = BITS(inst, 0, 3); | ||||||
| @@ -2538,7 +2462,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smmla)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->m   = BIT(inst, 5); |     inst_cream->m   = BIT(inst, 5); | ||||||
|     inst_cream->Ra  = BITS(inst, 12, 15); |     inst_cream->Ra  = BITS(inst, 12, 15); | ||||||
| @@ -2567,7 +2490,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smul)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->Rd = BITS(inst, 16, 19); |     inst_cream->Rd = BITS(inst, 16, 19); | ||||||
|     inst_cream->Rs = BITS(inst,  8, 11); |     inst_cream->Rs = BITS(inst,  8, 11); | ||||||
| @@ -2576,8 +2498,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smul)(unsigned int inst, int index) | |||||||
|     inst_cream->x  = BIT(inst, 5); |     inst_cream->x  = BIT(inst, 5); | ||||||
|     inst_cream->y  = BIT(inst, 6); |     inst_cream->y  = BIT(inst, 6); | ||||||
|  |  | ||||||
|     if (CHECK_RM || CHECK_RS)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
|  |  | ||||||
| } | } | ||||||
| @@ -2589,7 +2509,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smull)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->S    = BIT(inst, 20); |     inst_cream->S    = BIT(inst, 20); | ||||||
|     inst_cream->Rm   = BITS(inst, 0, 3); |     inst_cream->Rm   = BITS(inst, 0, 3); | ||||||
| @@ -2597,8 +2516,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smull)(unsigned int inst, int index) | |||||||
|     inst_cream->RdHi = BITS(inst, 16, 19); |     inst_cream->RdHi = BITS(inst, 16, 19); | ||||||
|     inst_cream->RdLo = BITS(inst, 12, 15); |     inst_cream->RdLo = BITS(inst, 12, 15); | ||||||
|  |  | ||||||
|     if (CHECK_RM || CHECK_RS)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
|  |  | ||||||
| @@ -2610,15 +2527,12 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(smulw)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->m  = BIT(inst, 6); |     inst_cream->m  = BIT(inst, 6); | ||||||
|     inst_cream->Rm = BITS(inst, 8, 11); |     inst_cream->Rm = BITS(inst, 8, 11); | ||||||
|     inst_cream->Rn = BITS(inst, 0, 3); |     inst_cream->Rn = BITS(inst, 0, 3); | ||||||
|     inst_cream->Rd = BITS(inst, 16, 19); |     inst_cream->Rd = BITS(inst, 16, 19); | ||||||
|  |  | ||||||
|     if (CHECK_RM || CHECK_RN)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
|  |  | ||||||
| @@ -2630,7 +2544,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(srs)(unsigned int inst, int index) | |||||||
|     inst_base->cond = AL; |     inst_base->cond = AL; | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->inst     = inst; |     inst_cream->inst     = inst; | ||||||
|     inst_cream->get_addr = get_calc_addr_op(inst); |     inst_cream->get_addr = get_calc_addr_op(inst); | ||||||
| @@ -2646,7 +2559,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(ssat)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->Rn = BITS(inst, 0, 3); |     inst_cream->Rn = BITS(inst, 0, 3); | ||||||
|     inst_cream->Rd = BITS(inst, 12, 15); |     inst_cream->Rd = BITS(inst, 12, 15); | ||||||
| @@ -2664,7 +2576,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(ssat16)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->Rn      = BITS(inst, 0, 3); |     inst_cream->Rn      = BITS(inst, 0, 3); | ||||||
|     inst_cream->Rd      = BITS(inst, 12, 15); |     inst_cream->Rd      = BITS(inst, 12, 15); | ||||||
| @@ -2703,14 +2614,11 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtb)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->Rd     = BITS(inst, 12, 15); |     inst_cream->Rd     = BITS(inst, 12, 15); | ||||||
|     inst_cream->Rm     = BITS(inst,  0,  3); |     inst_cream->Rm     = BITS(inst,  0,  3); | ||||||
|     inst_cream->rotate = BITS(inst, 10, 11); |     inst_cream->rotate = BITS(inst, 10, 11); | ||||||
|  |  | ||||||
|     if (CHECK_RM)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| static ARM_INST_PTR INTERPRETER_TRANSLATE(str)(unsigned int inst, int index) | static ARM_INST_PTR INTERPRETER_TRANSLATE(str)(unsigned int inst, int index) | ||||||
| @@ -2738,14 +2646,11 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtb)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->Rd     = BITS(inst, 12, 15); |     inst_cream->Rd     = BITS(inst, 12, 15); | ||||||
|     inst_cream->rotate = BITS(inst, 10, 11); |     inst_cream->rotate = BITS(inst, 10, 11); | ||||||
|     inst_cream->Rm     = BITS(inst,  0,  3); |     inst_cream->Rm     = BITS(inst,  0,  3); | ||||||
|  |  | ||||||
|     if (CHECK_RM)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab)(unsigned int inst, int index) | static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab)(unsigned int inst, int index) | ||||||
| @@ -2756,7 +2661,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->Rd     = BITS(inst, 12, 15); |     inst_cream->Rd     = BITS(inst, 12, 15); | ||||||
|     inst_cream->rotate = BITS(inst, 10, 11); |     inst_cream->rotate = BITS(inst, 10, 11); | ||||||
| @@ -2902,7 +2806,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sub)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->I  = BIT(inst, 25); |     inst_cream->I  = BIT(inst, 25); | ||||||
|     inst_cream->S  = BIT(inst, 20); |     inst_cream->S  = BIT(inst, 20); | ||||||
| @@ -2910,11 +2813,9 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sub)(unsigned int inst, int index) | |||||||
|     inst_cream->Rd = BITS(inst, 12, 15); |     inst_cream->Rd = BITS(inst, 12, 15); | ||||||
|     inst_cream->shifter_operand = BITS(inst, 0, 11); |     inst_cream->shifter_operand = BITS(inst, 0, 11); | ||||||
|     inst_cream->shtop_func = get_shtop(inst); |     inst_cream->shtop_func = get_shtop(inst); | ||||||
|     if (inst_cream->Rd == 15) { |  | ||||||
|  |     if (inst_cream->Rd == 15) | ||||||
|         inst_base->br = INDIRECT_BRANCH; |         inst_base->br = INDIRECT_BRANCH; | ||||||
|     } |  | ||||||
|     if (CHECK_RN)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|  |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| @@ -2972,7 +2873,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab)(unsigned int inst, int index){ | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->Rd     = BITS(inst, 12, 15); |     inst_cream->Rd     = BITS(inst, 12, 15); | ||||||
|     inst_cream->rotate = BITS(inst, 10, 11); |     inst_cream->rotate = BITS(inst, 10, 11); | ||||||
| @@ -2990,7 +2890,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtab16)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->Rm = BITS(inst, 0, 3); |     inst_cream->Rm = BITS(inst, 0, 3); | ||||||
|     inst_cream->Rn = BITS(inst, 16, 19); |     inst_cream->Rn = BITS(inst, 16, 19); | ||||||
| @@ -3011,7 +2910,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(sxtah)(unsigned int inst, int index) { | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->Rd     = BITS(inst, 12, 15); |     inst_cream->Rd     = BITS(inst, 12, 15); | ||||||
|     inst_cream->rotate = BITS(inst, 10, 11); |     inst_cream->rotate = BITS(inst, 10, 11); | ||||||
| @@ -3029,15 +2927,12 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(teq)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->I               = BIT(inst, 25); |     inst_cream->I               = BIT(inst, 25); | ||||||
|     inst_cream->Rn              = BITS(inst, 16, 19); |     inst_cream->Rn              = BITS(inst, 16, 19); | ||||||
|     inst_cream->shifter_operand = BITS(inst, 0, 11); |     inst_cream->shifter_operand = BITS(inst, 0, 11); | ||||||
|     inst_cream->shtop_func      = get_shtop(inst); |     inst_cream->shtop_func      = get_shtop(inst); | ||||||
|  |  | ||||||
|     if (CHECK_RN)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| static ARM_INST_PTR INTERPRETER_TRANSLATE(tst)(unsigned int inst, int index) | static ARM_INST_PTR INTERPRETER_TRANSLATE(tst)(unsigned int inst, int index) | ||||||
| @@ -3048,7 +2943,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(tst)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->I  = BIT(inst, 25); |     inst_cream->I  = BIT(inst, 25); | ||||||
|     inst_cream->S  = BIT(inst, 20); |     inst_cream->S  = BIT(inst, 20); | ||||||
| @@ -3056,12 +2950,10 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(tst)(unsigned int inst, int index) | |||||||
|     inst_cream->Rd = BITS(inst, 12, 15); |     inst_cream->Rd = BITS(inst, 12, 15); | ||||||
|     inst_cream->shifter_operand = BITS(inst, 0, 11); |     inst_cream->shifter_operand = BITS(inst, 0, 11); | ||||||
|     inst_cream->shtop_func = get_shtop(inst); |     inst_cream->shtop_func = get_shtop(inst); | ||||||
|     if (inst_cream->Rd == 15) { |  | ||||||
|         inst_base->br = INDIRECT_BRANCH; |  | ||||||
|     } |  | ||||||
|  |  | ||||||
|     if (CHECK_RN)  |     if (inst_cream->Rd == 15) | ||||||
|         inst_base->load_r15 = 1; |         inst_base->br = INDIRECT_BRANCH; | ||||||
|  |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
|  |  | ||||||
| @@ -3073,7 +2965,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(uadd8)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->op1 = BITS(inst, 20, 21); |     inst_cream->op1 = BITS(inst, 20, 21); | ||||||
|     inst_cream->op2 = BITS(inst, 5, 7); |     inst_cream->op2 = BITS(inst, 5, 7); | ||||||
| @@ -3112,7 +3003,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(uhadd8)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->op1 = BITS(inst, 20, 21); |     inst_cream->op1 = BITS(inst, 20, 21); | ||||||
|     inst_cream->op2 = BITS(inst, 5, 7); |     inst_cream->op2 = BITS(inst, 5, 7); | ||||||
| @@ -3150,16 +3040,12 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(umaal)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->Rm   = BITS(inst, 8, 11); |     inst_cream->Rm   = BITS(inst, 8, 11); | ||||||
|     inst_cream->Rn   = BITS(inst, 0, 3); |     inst_cream->Rn   = BITS(inst, 0, 3); | ||||||
|     inst_cream->RdLo = BITS(inst, 12, 15); |     inst_cream->RdLo = BITS(inst, 12, 15); | ||||||
|     inst_cream->RdHi = BITS(inst, 16, 19); |     inst_cream->RdHi = BITS(inst, 16, 19); | ||||||
|  |  | ||||||
|     if (CHECK_RM || CHECK_RN) |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|  |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| static ARM_INST_PTR INTERPRETER_TRANSLATE(umlal)(unsigned int inst, int index) | static ARM_INST_PTR INTERPRETER_TRANSLATE(umlal)(unsigned int inst, int index) | ||||||
| @@ -3170,7 +3056,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(umlal)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->S    = BIT(inst, 20); |     inst_cream->S    = BIT(inst, 20); | ||||||
|     inst_cream->Rm   = BITS(inst, 0, 3); |     inst_cream->Rm   = BITS(inst, 0, 3); | ||||||
| @@ -3178,9 +3063,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(umlal)(unsigned int inst, int index) | |||||||
|     inst_cream->RdHi = BITS(inst, 16, 19); |     inst_cream->RdHi = BITS(inst, 16, 19); | ||||||
|     inst_cream->RdLo = BITS(inst, 12, 15); |     inst_cream->RdLo = BITS(inst, 12, 15); | ||||||
|  |  | ||||||
|     if (CHECK_RM || CHECK_RS)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|  |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| static ARM_INST_PTR INTERPRETER_TRANSLATE(umull)(unsigned int inst, int index) | static ARM_INST_PTR INTERPRETER_TRANSLATE(umull)(unsigned int inst, int index) | ||||||
| @@ -3191,7 +3073,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(umull)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->S    = BIT(inst, 20); |     inst_cream->S    = BIT(inst, 20); | ||||||
|     inst_cream->Rm   = BITS(inst, 0, 3); |     inst_cream->Rm   = BITS(inst, 0, 3); | ||||||
| @@ -3199,8 +3080,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(umull)(unsigned int inst, int index) | |||||||
|     inst_cream->RdHi = BITS(inst, 16, 19); |     inst_cream->RdHi = BITS(inst, 16, 19); | ||||||
|     inst_cream->RdLo = BITS(inst, 12, 15); |     inst_cream->RdLo = BITS(inst, 12, 15); | ||||||
|  |  | ||||||
|     if (CHECK_RM || CHECK_RS)  |  | ||||||
|         inst_base->load_r15 = 1; |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
|  |  | ||||||
| @@ -3273,7 +3152,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(uqadd8)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->Rm  = BITS(inst, 0, 3); |     inst_cream->Rm  = BITS(inst, 0, 3); | ||||||
|     inst_cream->Rn  = BITS(inst, 16, 19); |     inst_cream->Rn  = BITS(inst, 16, 19); | ||||||
| @@ -3311,7 +3189,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(usada8)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->op1 = BITS(inst, 20, 24); |     inst_cream->op1 = BITS(inst, 20, 24); | ||||||
|     inst_cream->op2 = BITS(inst, 5, 7); |     inst_cream->op2 = BITS(inst, 5, 7); | ||||||
| @@ -3343,7 +3220,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(uxtab16)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->Rm     = BITS(inst, 0, 3); |     inst_cream->Rm     = BITS(inst, 0, 3); | ||||||
|     inst_cream->Rn     = BITS(inst, 16, 19); |     inst_cream->Rn     = BITS(inst, 16, 19); | ||||||
| @@ -3364,7 +3240,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(wfe)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| @@ -3375,7 +3250,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(wfi)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
| @@ -3386,7 +3260,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(yield)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     return inst_base; |     return inst_base; | ||||||
| } | } | ||||||
|   | |||||||
| @@ -27,7 +27,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmla)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->dp_operation = BIT(inst, 8); |     inst_cream->dp_operation = BIT(inst, 8); | ||||||
|     inst_cream->instr = inst; |     inst_cream->instr = inst; | ||||||
| @@ -77,7 +76,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmls)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->dp_operation = BIT(inst, 8); |     inst_cream->dp_operation = BIT(inst, 8); | ||||||
|     inst_cream->instr = inst; |     inst_cream->instr = inst; | ||||||
| @@ -127,7 +125,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmla)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->dp_operation = BIT(inst, 8); |     inst_cream->dp_operation = BIT(inst, 8); | ||||||
|     inst_cream->instr = inst; |     inst_cream->instr = inst; | ||||||
| @@ -178,7 +175,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmls)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->dp_operation = BIT(inst, 8); |     inst_cream->dp_operation = BIT(inst, 8); | ||||||
|     inst_cream->instr = inst; |     inst_cream->instr = inst; | ||||||
| @@ -228,7 +224,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vnmul)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->dp_operation = BIT(inst, 8); |     inst_cream->dp_operation = BIT(inst, 8); | ||||||
|     inst_cream->instr = inst; |     inst_cream->instr = inst; | ||||||
| @@ -278,7 +273,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmul)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->dp_operation = BIT(inst, 8); |     inst_cream->dp_operation = BIT(inst, 8); | ||||||
|     inst_cream->instr = inst; |     inst_cream->instr = inst; | ||||||
| @@ -328,7 +322,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vadd)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->dp_operation = BIT(inst, 8); |     inst_cream->dp_operation = BIT(inst, 8); | ||||||
|     inst_cream->instr = inst; |     inst_cream->instr = inst; | ||||||
| @@ -378,7 +371,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vsub)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->dp_operation = BIT(inst, 8); |     inst_cream->dp_operation = BIT(inst, 8); | ||||||
|     inst_cream->instr = inst; |     inst_cream->instr = inst; | ||||||
| @@ -428,7 +420,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vdiv)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->dp_operation = BIT(inst, 8); |     inst_cream->dp_operation = BIT(inst, 8); | ||||||
|     inst_cream->instr = inst; |     inst_cream->instr = inst; | ||||||
| @@ -480,7 +471,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovi)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->single = BIT(inst, 8) == 0; |     inst_cream->single = BIT(inst, 8) == 0; | ||||||
|     inst_cream->d      = (inst_cream->single ? BITS(inst,12,15)<<1 | BIT(inst,22) : BITS(inst,12,15) | BIT(inst,22)<<4); |     inst_cream->d      = (inst_cream->single ? BITS(inst,12,15)<<1 | BIT(inst,22) : BITS(inst,12,15) | BIT(inst,22)<<4); | ||||||
| @@ -529,7 +519,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovr)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->single = BIT(inst, 8) == 0; |     inst_cream->single = BIT(inst, 8) == 0; | ||||||
|     inst_cream->d      = (inst_cream->single ? BITS(inst,12,15)<<1 | BIT(inst,22) : BITS(inst,12,15) | BIT(inst,22)<<4); |     inst_cream->d      = (inst_cream->single ? BITS(inst,12,15)<<1 | BIT(inst,22) : BITS(inst,12,15) | BIT(inst,22)<<4); | ||||||
| @@ -572,7 +561,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vabs)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->dp_operation = BIT(inst, 8); |     inst_cream->dp_operation = BIT(inst, 8); | ||||||
|     inst_cream->instr = inst; |     inst_cream->instr = inst; | ||||||
| @@ -623,7 +611,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vneg)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->dp_operation = BIT(inst, 8); |     inst_cream->dp_operation = BIT(inst, 8); | ||||||
|     inst_cream->instr = inst; |     inst_cream->instr = inst; | ||||||
| @@ -673,7 +660,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vsqrt)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->dp_operation = BIT(inst, 8); |     inst_cream->dp_operation = BIT(inst, 8); | ||||||
|     inst_cream->instr = inst; |     inst_cream->instr = inst; | ||||||
| @@ -723,7 +709,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcmp)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->dp_operation = BIT(inst, 8); |     inst_cream->dp_operation = BIT(inst, 8); | ||||||
|     inst_cream->instr = inst; |     inst_cream->instr = inst; | ||||||
| @@ -773,7 +758,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcmp2)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->dp_operation = BIT(inst, 8); |     inst_cream->dp_operation = BIT(inst, 8); | ||||||
|     inst_cream->instr = inst; |     inst_cream->instr = inst; | ||||||
| @@ -823,7 +807,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbds)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->dp_operation = BIT(inst, 8); |     inst_cream->dp_operation = BIT(inst, 8); | ||||||
|     inst_cream->instr = inst; |     inst_cream->instr = inst; | ||||||
| @@ -875,7 +858,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbff)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->dp_operation = BIT(inst, 8); |     inst_cream->dp_operation = BIT(inst, 8); | ||||||
|     inst_cream->instr = inst; |     inst_cream->instr = inst; | ||||||
| @@ -925,7 +907,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vcvtbfi)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->dp_operation = BIT(inst, 8); |     inst_cream->dp_operation = BIT(inst, 8); | ||||||
|     inst_cream->instr = inst; |     inst_cream->instr = inst; | ||||||
| @@ -982,7 +963,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrs)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->to_arm = BIT(inst, 20) == 1; |     inst_cream->to_arm = BIT(inst, 20) == 1; | ||||||
|     inst_cream->t      = BITS(inst, 12, 15); |     inst_cream->t      = BITS(inst, 12, 15); | ||||||
| @@ -1027,7 +1007,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmsr)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->reg = BITS(inst, 16, 19); |     inst_cream->reg = BITS(inst, 16, 19); | ||||||
|     inst_cream->Rd  = BITS(inst, 12, 15); |     inst_cream->Rd  = BITS(inst, 12, 15); | ||||||
| @@ -1076,7 +1055,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrc)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->d     = BITS(inst, 16, 19)|BIT(inst, 7)<<4; |     inst_cream->d     = BITS(inst, 16, 19)|BIT(inst, 7)<<4; | ||||||
|     inst_cream->t     = BITS(inst, 12, 15); |     inst_cream->t     = BITS(inst, 12, 15); | ||||||
| @@ -1121,7 +1099,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmrs)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->reg = BITS(inst, 16, 19); |     inst_cream->reg = BITS(inst, 16, 19); | ||||||
|     inst_cream->Rt  = BITS(inst, 12, 15); |     inst_cream->Rt  = BITS(inst, 12, 15); | ||||||
| @@ -1205,7 +1182,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbcr)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->d     = BITS(inst, 16, 19)|BIT(inst, 7)<<4; |     inst_cream->d     = BITS(inst, 16, 19)|BIT(inst, 7)<<4; | ||||||
|     inst_cream->t     = BITS(inst, 12, 15); |     inst_cream->t     = BITS(inst, 12, 15); | ||||||
| @@ -1257,7 +1233,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrrss)(unsigned int inst, int inde | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->to_arm = BIT(inst, 20) == 1; |     inst_cream->to_arm = BIT(inst, 20) == 1; | ||||||
|     inst_cream->t      = BITS(inst, 12, 15); |     inst_cream->t      = BITS(inst, 12, 15); | ||||||
| @@ -1306,7 +1281,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vmovbrrd)(unsigned int inst, int index | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->to_arm = BIT(inst, 20) == 1; |     inst_cream->to_arm = BIT(inst, 20) == 1; | ||||||
|     inst_cream->t      = BITS(inst, 12, 15); |     inst_cream->t      = BITS(inst, 12, 15); | ||||||
| @@ -1360,7 +1334,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vstr)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->single = BIT(inst, 8) == 0; |     inst_cream->single = BIT(inst, 8) == 0; | ||||||
|     inst_cream->add    = BIT(inst, 23); |     inst_cream->add    = BIT(inst, 23); | ||||||
| @@ -1427,7 +1400,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vpush)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->single  = BIT(inst, 8) == 0; |     inst_cream->single  = BIT(inst, 8) == 0; | ||||||
|     inst_cream->d       = (inst_cream->single ? BITS(inst, 12, 15)<<1|BIT(inst, 22) : BITS(inst, 12, 15)|BIT(inst, 22)<<4); |     inst_cream->d       = (inst_cream->single ? BITS(inst, 12, 15)<<1|BIT(inst, 22) : BITS(inst, 12, 15)|BIT(inst, 22)<<4); | ||||||
| @@ -1503,7 +1475,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vstm)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->single = BIT(inst, 8) == 0; |     inst_cream->single = BIT(inst, 8) == 0; | ||||||
|     inst_cream->add    = BIT(inst, 23); |     inst_cream->add    = BIT(inst, 23); | ||||||
| @@ -1582,7 +1553,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vpop)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->single  = BIT(inst, 8) == 0; |     inst_cream->single  = BIT(inst, 8) == 0; | ||||||
|     inst_cream->d       = (inst_cream->single ? (BITS(inst, 12, 15)<<1)|BIT(inst, 22) : BITS(inst, 12, 15)|(BIT(inst, 22)<<4)); |     inst_cream->d       = (inst_cream->single ? (BITS(inst, 12, 15)<<1)|BIT(inst, 22) : BITS(inst, 12, 15)|(BIT(inst, 22)<<4)); | ||||||
| @@ -1656,7 +1626,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vldr)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->single = BIT(inst, 8) == 0; |     inst_cream->single = BIT(inst, 8) == 0; | ||||||
|     inst_cream->add    = BIT(inst, 23); |     inst_cream->add    = BIT(inst, 23); | ||||||
| @@ -1726,7 +1695,6 @@ static ARM_INST_PTR INTERPRETER_TRANSLATE(vldm)(unsigned int inst, int index) | |||||||
|     inst_base->cond = BITS(inst, 28, 31); |     inst_base->cond = BITS(inst, 28, 31); | ||||||
|     inst_base->idx  = index; |     inst_base->idx  = index; | ||||||
|     inst_base->br   = NON_BRANCH; |     inst_base->br   = NON_BRANCH; | ||||||
|     inst_base->load_r15 = 0; |  | ||||||
|  |  | ||||||
|     inst_cream->single = BIT(inst, 8) == 0; |     inst_cream->single = BIT(inst, 8) == 0; | ||||||
|     inst_cream->add    = BIT(inst, 23); |     inst_cream->add    = BIT(inst, 23); | ||||||
|   | |||||||
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