arm: Adios armemu
This commit is contained in:
Lioncash
@ -19,213 +19,45 @@
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#include "core/arm/skyeye_common/armemu.h"
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#include "core/arm/skyeye_common/vfp/vfp.h"
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//chy 2005-07-08
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//#include "ansidecl.h"
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//chy -------
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//#include "iwmmxt.h"
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// Dummy Co-processors.
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/* Dummy Co-processors. */
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static unsigned
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NoCoPro3R(ARMul_State * state,
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unsigned a, ARMword b)
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static unsigned int NoCoPro3R(ARMul_State* state, unsigned int a, ARMword b)
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{
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return ARMul_CANT;
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}
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static unsigned
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NoCoPro4R(ARMul_State * state,
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unsigned a,
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ARMword b, ARMword c)
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static unsigned int NoCoPro4R(ARMul_State* state, unsigned int a, ARMword b, ARMword c)
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{
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return ARMul_CANT;
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}
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static unsigned
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NoCoPro4W(ARMul_State * state,
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unsigned a,
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ARMword b, ARMword * c)
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static unsigned int NoCoPro4W(ARMul_State* state, unsigned int a, ARMword b, ARMword* c)
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{
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return ARMul_CANT;
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}
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static unsigned
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NoCoPro5R(ARMul_State * state,
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unsigned a,
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ARMword b,
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ARMword c, ARMword d)
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static unsigned int NoCoPro5R(ARMul_State* state, unsigned int a, ARMword b, ARMword c, ARMword d)
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{
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return ARMul_CANT;
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}
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static unsigned
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NoCoPro5W(ARMul_State * state,
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unsigned a,
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ARMword b,
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ARMword * c, ARMword * d)
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static unsigned int NoCoPro5W(ARMul_State* state, unsigned int a, ARMword b, ARMword* c, ARMword* d)
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{
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return ARMul_CANT;
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}
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/* The XScale Co-processors. */
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/* Coprocessor 15: System Control. */
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static void write_cp14_reg(unsigned, ARMword);
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static ARMword read_cp14_reg(unsigned);
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/* Check an access to a register. */
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static unsigned
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check_cp15_access(ARMul_State * state,
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unsigned reg,
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unsigned CRm, unsigned opcode_1, unsigned opcode_2)
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// Install co-processor instruction handlers in this routine.
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unsigned int ARMul_CoProInit(ARMul_State* state)
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{
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/* Do not allow access to these register in USER mode. */
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//chy 2006-02-16 , should not consider system mode, don't conside 26bit mode
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if (state->Mode == USER26MODE || state->Mode == USER32MODE)
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return ARMul_CANT;
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/* Opcode_1should be zero. */
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if (opcode_1 != 0)
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return ARMul_CANT;
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/* Different register have different access requirements. */
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switch (reg) {
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case 0:
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case 1:
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/* CRm must be 0. Opcode_2 can be anything. */
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if (CRm != 0)
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return ARMul_CANT;
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break;
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case 2:
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case 3:
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/* CRm must be 0. Opcode_2 must be zero. */
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if ((CRm != 0) || (opcode_2 != 0))
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return ARMul_CANT;
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break;
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case 4:
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/* Access not allowed. */
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return ARMul_CANT;
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case 5:
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case 6:
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/* Opcode_2 must be zero. CRm must be 0. */
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if ((CRm != 0) || (opcode_2 != 0))
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return ARMul_CANT;
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break;
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case 7:
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/* Permissable combinations:
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Opcode_2 CRm
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0 5
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0 6
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0 7
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1 5
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1 6
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1 10
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4 10
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5 2
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6 5 */
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switch (opcode_2) {
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default:
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return ARMul_CANT;
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case 6:
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if (CRm != 5)
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return ARMul_CANT;
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break;
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case 5:
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if (CRm != 2)
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return ARMul_CANT;
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break;
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case 4:
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if (CRm != 10)
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return ARMul_CANT;
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break;
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case 1:
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if ((CRm != 5) && (CRm != 6) && (CRm != 10))
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return ARMul_CANT;
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break;
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case 0:
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if ((CRm < 5) || (CRm > 7))
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return ARMul_CANT;
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break;
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}
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break;
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case 8:
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/* Permissable combinations:
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Opcode_2 CRm
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0 5
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0 6
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0 7
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1 5
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1 6 */
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if (opcode_2 > 1)
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return ARMul_CANT;
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if ((CRm < 5) || (CRm > 7))
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return ARMul_CANT;
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if (opcode_2 == 1 && CRm == 7)
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return ARMul_CANT;
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break;
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case 9:
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/* Opcode_2 must be zero or one. CRm must be 1 or 2. */
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if (((CRm != 0) && (CRm != 1))
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|| ((opcode_2 != 1) && (opcode_2 != 2)))
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return ARMul_CANT;
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break;
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case 10:
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/* Opcode_2 must be zero or one. CRm must be 4 or 8. */
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if (((CRm != 0) && (CRm != 1))
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|| ((opcode_2 != 4) && (opcode_2 != 8)))
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return ARMul_CANT;
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break;
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case 11:
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/* Access not allowed. */
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return ARMul_CANT;
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case 12:
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/* Access not allowed. */
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return ARMul_CANT;
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case 13:
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/* Opcode_2 must be zero. CRm must be 0. */
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if ((CRm != 0) || (opcode_2 != 0))
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return ARMul_CANT;
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break;
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case 14:
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/* Opcode_2 must be 0. CRm must be 0, 3, 4, 8 or 9. */
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if (opcode_2 != 0)
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return ARMul_CANT;
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if ((CRm != 0) && (CRm != 3) && (CRm != 4) && (CRm != 8)
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&& (CRm != 9))
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return ARMul_CANT;
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break;
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case 15:
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/* Opcode_2 must be zero. CRm must be 1. */
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if ((CRm != 1) || (opcode_2 != 0))
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return ARMul_CANT;
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break;
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default:
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/* Should never happen. */
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return ARMul_CANT;
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}
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return ARMul_DONE;
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}
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/* Install co-processor instruction handlers in this routine. */
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unsigned
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ARMul_CoProInit(ARMul_State * state)
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{
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unsigned int i;
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/* Initialise tham all first. */
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for (i = 0; i < 16; i++)
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// Initialise tham all first.
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for (unsigned int i = 0; i < 16; i++)
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ARMul_CoProDetach(state, i);
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/* Install CoPro Instruction handlers here.
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The format is:
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ARMul_CoProAttach (state, CP Number, Init routine, Exit routine
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LDC routine, STC routine, MRC routine, MCR routine,
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CDP routine, Read Reg routine, Write Reg routine). */
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// Install CoPro Instruction handlers here.
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// The format is:
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// ARMul_CoProAttach (state, CP Number, Init routine, Exit routine
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// LDC routine, STC routine, MRC routine, MCR routine,
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// CDP routine, Read Reg routine, Write Reg routine).
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if (state->is_v6) {
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ARMul_CoProAttach(state, 10, VFPInit, NULL, VFPLDC, VFPSTC,
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VFPMRC, VFPMCR, VFPMRRC, VFPMCRR, VFPCDP, NULL, NULL);
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@ -235,57 +67,44 @@ ARMul_CoProInit(ARMul_State * state)
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/*ARMul_CoProAttach (state, 15, MMUInit, NULL, NULL, NULL,
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MMUMRC, MMUMCR, NULL, NULL, NULL, NULL, NULL);*/
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}
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//chy 2003-09-03 do it in future!!!!????
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#if 0
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if (state->is_iWMMXt) {
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ARMul_CoProAttach(state, 0, NULL, NULL, IwmmxtLDC, IwmmxtSTC,
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NULL, NULL, IwmmxtCDP, NULL, NULL);
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ARMul_CoProAttach(state, 1, NULL, NULL, NULL, NULL,
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IwmmxtMRC, IwmmxtMCR, IwmmxtCDP, NULL,
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NULL);
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}
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#endif
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/* No handlers below here. */
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// No handlers below here.
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/* Call all the initialisation routines. */
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for (i = 0; i < 16; i++)
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// Call all the initialisation routines.
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for (unsigned int i = 0; i < 16; i++)
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if (state->CPInit[i])
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(state->CPInit[i]) (state);
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return TRUE;
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}
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/* Install co-processor finalisation routines in this routine. */
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void
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ARMul_CoProExit(ARMul_State * state)
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// Install co-processor finalisation routines in this routine.
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void ARMul_CoProExit(ARMul_State * state)
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{
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register unsigned i;
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for (i = 0; i < 16; i++)
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for (unsigned int i = 0; i < 16; i++)
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if (state->CPExit[i])
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(state->CPExit[i]) (state);
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for (i = 0; i < 16; i++) /* Detach all handlers. */
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// Detach all handlers.
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for (unsigned int i = 0; i < 16; i++)
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ARMul_CoProDetach(state, i);
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}
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/* Routines to hook Co-processors into ARMulator. */
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// Routines to hook Co-processors into ARMulator.
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void
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ARMul_CoProAttach(ARMul_State * state,
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ARMul_CoProAttach(ARMul_State* state,
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unsigned number,
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ARMul_CPInits * init,
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ARMul_CPExits * exit,
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ARMul_LDCs * ldc,
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ARMul_STCs * stc,
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ARMul_MRCs * mrc,
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ARMul_MCRs * mcr,
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ARMul_MRRCs * mrrc,
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ARMul_MCRRs * mcrr,
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ARMul_CDPs * cdp,
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ARMul_CPReads * read, ARMul_CPWrites * write)
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ARMul_CPInits* init,
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ARMul_CPExits* exit,
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ARMul_LDCs* ldc,
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ARMul_STCs* stc,
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ARMul_MRCs* mrc,
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ARMul_MCRs* mcr,
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ARMul_MRRCs* mrrc,
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ARMul_MCRRs* mcrr,
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ARMul_CDPs* cdp,
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ARMul_CPReads* read, ARMul_CPWrites* write)
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{
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if (init != NULL)
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state->CPInit[number] = init;
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@ -311,8 +130,7 @@ ARMul_CPReads * read, ARMul_CPWrites * write)
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state->CPWrite[number] = write;
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}
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void
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ARMul_CoProDetach(ARMul_State * state, unsigned number)
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void ARMul_CoProDetach(ARMul_State* state, unsigned number)
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{
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ARMul_CoProAttach(state, number, NULL, NULL,
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NoCoPro4R, NoCoPro4W, NoCoPro4W, NoCoPro4R,
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