Memory: Use a table based lookup scheme to read from memory regions
This commit is contained in:
Yuri Kunde Schlesner
parent
52158c1b8d
commit
dd4430609a
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@ -212,6 +212,7 @@ set(HEADERS
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loader/ncch.h
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mem_map.h
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memory.h
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memory_setup.h
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settings.h
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system.h
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)
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@ -7,8 +7,11 @@
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#include "common/common_types.h"
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#include "common/logging/log.h"
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#include "core/hle/config_mem.h"
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#include "core/hle/shared_page.h"
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#include "core/mem_map.h"
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#include "core/memory.h"
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#include "core/memory_setup.h"
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////////////////////////////////////////////////////////////////////////////////////////////////////
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@ -26,18 +29,19 @@ namespace {
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struct MemoryArea {
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u8** ptr;
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size_t size;
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u32 base;
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u32 size;
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};
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// We don't declare the IO regions in here since its handled by other means.
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static MemoryArea memory_areas[] = {
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{&g_exefs_code, PROCESS_IMAGE_MAX_SIZE},
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{&g_heap, HEAP_SIZE },
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{&g_shared_mem, SHARED_MEMORY_SIZE },
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{&g_heap_linear, LINEAR_HEAP_SIZE },
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{&g_vram, VRAM_SIZE },
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{&g_dsp_mem, DSP_RAM_SIZE },
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{&g_tls_mem, TLS_AREA_SIZE },
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{&g_exefs_code, PROCESS_IMAGE_VADDR, PROCESS_IMAGE_MAX_SIZE},
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{&g_heap, HEAP_VADDR, HEAP_SIZE },
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{&g_shared_mem, SHARED_MEMORY_VADDR, SHARED_MEMORY_SIZE },
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{&g_heap_linear, LINEAR_HEAP_VADDR, LINEAR_HEAP_SIZE },
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{&g_vram, VRAM_VADDR, VRAM_SIZE },
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{&g_dsp_mem, DSP_RAM_VADDR, DSP_RAM_SIZE },
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{&g_tls_mem, TLS_AREA_VADDR, TLS_AREA_SIZE },
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};
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/// Represents a block of memory mapped by ControlMemory/MapMemoryBlock
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@ -132,9 +136,14 @@ VAddr PhysicalToVirtualAddress(const PAddr addr) {
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}
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void Init() {
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InitMemoryMap();
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for (MemoryArea& area : memory_areas) {
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*area.ptr = new u8[area.size];
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MapMemoryRegion(area.base, area.size, *area.ptr);
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}
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MapMemoryRegion(CONFIG_MEMORY_VADDR, CONFIG_MEMORY_SIZE, (u8*)&ConfigMem::config_mem);
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MapMemoryRegion(SHARED_PAGE_VADDR, SHARED_PAGE_SIZE, (u8*)&SharedPage::shared_page);
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LOG_DEBUG(HW_Memory, "initialized OK, RAM at %p", g_heap);
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}
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@ -1,7 +1,10 @@
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// Copyright 2014 Citra Emulator Project
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// Copyright 2015 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include <array>
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#include "common/assert.h"
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#include "common/common_types.h"
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#include "common/logging/log.h"
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#include "common/swap.h"
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@ -14,126 +17,134 @@
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namespace Memory {
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const u32 PAGE_MASK = PAGE_SIZE - 1;
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const int PAGE_BITS = 12;
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enum class PageType {
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/// Page is unmapped and should cause an access error.
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Unmapped,
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/// Page is mapped to regular memory. This is the only type you can get pointers to.
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Memory,
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/// Page is mapped to a I/O region. Writing and reading to this page is handled by functions.
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Special,
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};
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/**
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* A (reasonably) fast way of allowing switchable and remmapable process address spaces. It loosely
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* mimics the way a real CPU page table works, but instead is optimized for minimal decoding and
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* fetching requirements when acessing. In the usual case of an access to regular memory, it only
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* requires an indexed fetch and a check for NULL.
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*/
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struct PageTable {
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static const size_t NUM_ENTRIES = 1 << (32 - PAGE_BITS);
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/**
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* Array of memory pointers backing each page. An entry can only be non-null if the
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* corresponding entry in the `attributes` array is of type `Memory`.
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*/
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std::array<u8*, NUM_ENTRIES> pointers;
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/**
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* Array of fine grained page attributes. If it is set to any value other than `Memory`, then
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* the corresponding entry in `pointer` MUST be set to null.
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*/
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std::array<PageType, NUM_ENTRIES> attributes;
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};
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/// Singular page table used for the singleton process
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static PageTable main_page_table;
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/// Currently active page table
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static PageTable* current_page_table = &main_page_table;
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static void MapPages(u32 base, u32 size, u8* memory, PageType type) {
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LOG_DEBUG(HW_Memory, "Mapping %p onto %08X-%08X", memory, base * PAGE_SIZE, (base + size) * PAGE_SIZE);
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u32 end = base + size;
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while (base != end) {
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ASSERT_MSG(base < PageTable::NUM_ENTRIES, "out of range mapping at %08X", base);
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if (current_page_table->attributes[base] != PageType::Unmapped) {
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LOG_ERROR(HW_Memory, "overlapping memory ranges at %08X", base * PAGE_SIZE);
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}
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current_page_table->attributes[base] = type;
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current_page_table->pointers[base] = memory;
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base += 1;
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memory += PAGE_SIZE;
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}
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}
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void InitMemoryMap() {
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main_page_table.pointers.fill(nullptr);
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main_page_table.attributes.fill(PageType::Unmapped);
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}
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void MapMemoryRegion(VAddr base, u32 size, u8* target) {
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ASSERT_MSG((size & PAGE_MASK) == 0, "non-page aligned size: %08X", size);
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ASSERT_MSG((base & PAGE_MASK) == 0, "non-page aligned base: %08X", base);
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MapPages(base / PAGE_SIZE, size / PAGE_SIZE, target, PageType::Memory);
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}
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void MapIoRegion(VAddr base, u32 size) {
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ASSERT_MSG((size & PAGE_MASK) == 0, "non-page aligned size: %08X", size);
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ASSERT_MSG((base & PAGE_MASK) == 0, "non-page aligned base: %08X", base);
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MapPages(base / PAGE_SIZE, size / PAGE_SIZE, nullptr, PageType::Special);
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}
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template <typename T>
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inline void Read(T &var, const VAddr vaddr) {
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// TODO: Figure out the fastest order of tests for both read and write (they are probably different).
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// TODO: Make sure this represents the mirrors in a correct way.
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// Could just do a base-relative read, too.... TODO
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T Read(const VAddr vaddr) {
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const u8* page_pointer = current_page_table->pointers[vaddr >> PAGE_BITS];
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if (page_pointer) {
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return *reinterpret_cast<const T*>(page_pointer + (vaddr & PAGE_MASK));
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}
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// Kernel memory command buffer
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if (vaddr >= TLS_AREA_VADDR && vaddr < TLS_AREA_VADDR_END) {
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var = *((const T*)&g_tls_mem[vaddr - TLS_AREA_VADDR]);
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// ExeFS:/.code is loaded here
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} else if ((vaddr >= PROCESS_IMAGE_VADDR) && (vaddr < PROCESS_IMAGE_VADDR_END)) {
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var = *((const T*)&g_exefs_code[vaddr - PROCESS_IMAGE_VADDR]);
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// FCRAM - linear heap
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} else if ((vaddr >= LINEAR_HEAP_VADDR) && (vaddr < LINEAR_HEAP_VADDR_END)) {
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var = *((const T*)&g_heap_linear[vaddr - LINEAR_HEAP_VADDR]);
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// FCRAM - application heap
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} else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
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var = *((const T*)&g_heap[vaddr - HEAP_VADDR]);
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// Shared memory
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} else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) {
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var = *((const T*)&g_shared_mem[vaddr - SHARED_MEMORY_VADDR]);
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// Config memory
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} else if ((vaddr >= CONFIG_MEMORY_VADDR) && (vaddr < CONFIG_MEMORY_VADDR_END)) {
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const u8* raw_memory = (const u8*)&ConfigMem::config_mem;
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var = *((const T*)&raw_memory[vaddr - CONFIG_MEMORY_VADDR]);
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// Shared page
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} else if ((vaddr >= SHARED_PAGE_VADDR) && (vaddr < SHARED_PAGE_VADDR_END)) {
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const u8* raw_memory = (const u8*)&SharedPage::shared_page;
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var = *((const T*)&raw_memory[vaddr - SHARED_PAGE_VADDR]);
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// DSP memory
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} else if ((vaddr >= DSP_RAM_VADDR) && (vaddr < DSP_RAM_VADDR_END)) {
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var = *((const T*)&g_dsp_mem[vaddr - DSP_RAM_VADDR]);
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// VRAM
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} else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
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var = *((const T*)&g_vram[vaddr - VRAM_VADDR]);
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} else {
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LOG_ERROR(HW_Memory, "unknown Read%lu @ 0x%08X", sizeof(var) * 8, vaddr);
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PageType type = current_page_table->attributes[vaddr >> PAGE_BITS];
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switch (type) {
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case PageType::Unmapped:
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LOG_ERROR(HW_Memory, "unmapped Read%lu @ 0x%08X", sizeof(T) * 8, vaddr);
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return 0;
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case PageType::Memory:
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ASSERT_MSG(false, "Mapped memory page without a pointer @ %08X", vaddr);
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case PageType::Special:
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LOG_ERROR(HW_Memory, "I/O reads aren't implemented yet @ %08X", vaddr);
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return 0;
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default:
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UNREACHABLE();
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}
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}
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template <typename T>
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inline void Write(const VAddr vaddr, const T data) {
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void Write(const VAddr vaddr, const T data) {
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u8* page_pointer = current_page_table->pointers[vaddr >> PAGE_BITS];
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if (page_pointer) {
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*reinterpret_cast<T*>(page_pointer + (vaddr & PAGE_MASK)) = data;
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return;
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}
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// Kernel memory command buffer
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if (vaddr >= TLS_AREA_VADDR && vaddr < TLS_AREA_VADDR_END) {
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*(T*)&g_tls_mem[vaddr - TLS_AREA_VADDR] = data;
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// ExeFS:/.code is loaded here
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} else if ((vaddr >= PROCESS_IMAGE_VADDR) && (vaddr < PROCESS_IMAGE_VADDR_END)) {
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*(T*)&g_exefs_code[vaddr - PROCESS_IMAGE_VADDR] = data;
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// FCRAM - linear heap
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} else if ((vaddr >= LINEAR_HEAP_VADDR) && (vaddr < LINEAR_HEAP_VADDR_END)) {
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*(T*)&g_heap_linear[vaddr - LINEAR_HEAP_VADDR] = data;
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// FCRAM - application heap
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} else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
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*(T*)&g_heap[vaddr - HEAP_VADDR] = data;
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// Shared memory
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} else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) {
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*(T*)&g_shared_mem[vaddr - SHARED_MEMORY_VADDR] = data;
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// VRAM
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} else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
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*(T*)&g_vram[vaddr - VRAM_VADDR] = data;
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// DSP memory
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} else if ((vaddr >= DSP_RAM_VADDR) && (vaddr < DSP_RAM_VADDR_END)) {
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*(T*)&g_dsp_mem[vaddr - DSP_RAM_VADDR] = data;
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//} else if ((vaddr & 0xFFFF0000) == 0x1FF80000) {
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// ASSERT_MSG(MEMMAP, false, "umimplemented write to Configuration Memory");
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//} else if ((vaddr & 0xFFFFF000) == 0x1FF81000) {
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// ASSERT_MSG(MEMMAP, false, "umimplemented write to shared page");
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// Error out...
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} else {
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LOG_ERROR(HW_Memory, "unknown Write%lu 0x%08X @ 0x%08X", sizeof(data) * 8, (u32)data, vaddr);
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PageType type = current_page_table->attributes[vaddr >> PAGE_BITS];
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switch (type) {
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case PageType::Unmapped:
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LOG_ERROR(HW_Memory, "unmapped Write%lu 0x%08X @ 0x%08X", sizeof(data) * 8, (u32) data, vaddr);
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return;
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case PageType::Memory:
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ASSERT_MSG(false, "Mapped memory page without a pointer @ %08X", vaddr);
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case PageType::Special:
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LOG_ERROR(HW_Memory, "I/O writes aren't implemented yet @ %08X", vaddr);
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return;
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default:
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UNREACHABLE();
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}
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}
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u8* GetPointer(const VAddr vaddr) {
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// Kernel memory command buffer
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if (vaddr >= TLS_AREA_VADDR && vaddr < TLS_AREA_VADDR_END) {
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return g_tls_mem + (vaddr - TLS_AREA_VADDR);
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// ExeFS:/.code is loaded here
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} else if ((vaddr >= PROCESS_IMAGE_VADDR) && (vaddr < PROCESS_IMAGE_VADDR_END)) {
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return g_exefs_code + (vaddr - PROCESS_IMAGE_VADDR);
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// FCRAM - linear heap
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} else if ((vaddr >= LINEAR_HEAP_VADDR) && (vaddr < LINEAR_HEAP_VADDR_END)) {
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return g_heap_linear + (vaddr - LINEAR_HEAP_VADDR);
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// FCRAM - application heap
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} else if ((vaddr >= HEAP_VADDR) && (vaddr < HEAP_VADDR_END)) {
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return g_heap + (vaddr - HEAP_VADDR);
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// Shared memory
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} else if ((vaddr >= SHARED_MEMORY_VADDR) && (vaddr < SHARED_MEMORY_VADDR_END)) {
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return g_shared_mem + (vaddr - SHARED_MEMORY_VADDR);
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// VRAM
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} else if ((vaddr >= VRAM_VADDR) && (vaddr < VRAM_VADDR_END)) {
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return g_vram + (vaddr - VRAM_VADDR);
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} else {
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LOG_ERROR(HW_Memory, "unknown GetPointer @ 0x%08x", vaddr);
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return 0;
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u8* page_pointer = current_page_table->pointers[vaddr >> PAGE_BITS];
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if (page_pointer) {
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return page_pointer + (vaddr & PAGE_MASK);
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}
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LOG_ERROR(HW_Memory, "unknown GetPointer @ 0x%08x", vaddr);
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return nullptr;
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}
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u8* GetPhysicalPointer(PAddr address) {
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@ -141,27 +152,19 @@ u8* GetPhysicalPointer(PAddr address) {
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}
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u8 Read8(const VAddr addr) {
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u8 data = 0;
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Read<u8>(data, addr);
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return data;
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return Read<u8>(addr);
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}
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u16 Read16(const VAddr addr) {
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u16_le data = 0;
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Read<u16_le>(data, addr);
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return data;
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return Read<u16_le>(addr);
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}
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u32 Read32(const VAddr addr) {
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u32_le data = 0;
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Read<u32_le>(data, addr);
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return data;
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return Read<u32_le>(addr);
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}
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u64 Read64(const VAddr addr) {
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u64_le data = 0;
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Read<u64_le>(data, addr);
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return data;
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return Read<u64_le>(addr);
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}
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void Write8(const VAddr addr, const u8 data) {
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@ -8,6 +8,10 @@
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namespace Memory {
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/**
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* Page size used by the ARM architecture. This is the smallest granularity with which memory can
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* be mapped.
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*/
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const u32 PAGE_SIZE = 0x1000;
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/// Physical memory regions as seen from the ARM11
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@ -0,0 +1,29 @@
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// Copyright 2015 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#pragma once
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#include "common/common_types.h"
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namespace Memory {
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void InitMemoryMap();
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/**
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* Maps an allocated buffer onto a region of the emulated process address space.
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*
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* @param base The address to start mapping at. Must be page-aligned.
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* @param size The amount of bytes to map. Must be page-aligned.
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* @param target Buffer with the memory backing the mapping. Must be of length at least `size`.
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*/
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void MapMemoryRegion(VAddr base, u32 size, u8* target);
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/**
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* Maps a region of the emulated process address space as a IO region.
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* @note Currently this can only be used to mark a region as being IO, since actual memory-mapped
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* IO isn't yet supported.
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*/
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void MapIoRegion(VAddr base, u32 size);
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}
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