Merge interim hekate bugfixes
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@@ -276,12 +276,16 @@ static void _clock_sdmmc_set_reset(u32 id)
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{
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case SDMMC_1:
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_SET) = L_SET_SDMMC1_RST;
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break;
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case SDMMC_2:
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_SET) = L_SET_SDMMC2_RST;
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break;
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case SDMMC_3:
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_U_SET) = U_SET_SDMMC3_RST;
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break;
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case SDMMC_4:
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_SET) = L_SET_SDMMC4_RST;
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break;
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}
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}
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@@ -291,12 +295,16 @@ static void _clock_sdmmc_clear_reset(u32 id)
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{
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case SDMMC_1:
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_CLR) = L_CLR_SDMMC1_RST;
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break;
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case SDMMC_2:
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_CLR) = L_CLR_SDMMC2_RST;
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break;
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case SDMMC_3:
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_U_CLR) = U_CLR_SDMMC3_RST;
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break;
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case SDMMC_4:
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CLOCK(CLK_RST_CONTROLLER_RST_DEV_L_CLR) = L_CLR_SDMMC4_RST;
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break;
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}
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}
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@@ -322,12 +330,16 @@ static void _clock_sdmmc_set_enable(u32 id)
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{
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case SDMMC_1:
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_L_SET) = L_SET_CLK_ENB_SDMMC1;
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break;
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case SDMMC_2:
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_L_SET) = L_SET_CLK_ENB_SDMMC2;
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break;
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case SDMMC_3:
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_U_SET) = U_SET_CLK_ENB_SDMMC3;
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break;
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case SDMMC_4:
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_L_SET) = L_SET_CLK_ENB_SDMMC4;
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break;
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}
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}
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@@ -337,12 +349,16 @@ static void _clock_sdmmc_clear_enable(u32 id)
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{
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case SDMMC_1:
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_L_CLR) = L_CLR_CLK_ENB_SDMMC1;
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break;
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case SDMMC_2:
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_L_CLR) = L_CLR_CLK_ENB_SDMMC2;
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break;
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case SDMMC_3:
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_U_CLR) = U_CLR_CLK_ENB_SDMMC3;
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break;
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case SDMMC_4:
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CLOCK(CLK_RST_CONTROLLER_CLK_ENB_L_CLR) = L_CLR_CLK_ENB_SDMMC4;
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break;
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}
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}
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@@ -457,6 +473,7 @@ void clock_sdmmc_get_params(u32 *pout, u16 *pdivisor, u32 type)
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case 5:
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*pout = 25000;
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*pdivisor = 64;
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break;
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case 6:
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case 8:
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*pout = 25000;
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@@ -465,9 +482,11 @@ void clock_sdmmc_get_params(u32 *pout, u16 *pdivisor, u32 type)
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case 7:
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*pout = 50000;
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*pdivisor = 1;
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break;
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case 10:
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*pout = 100000;
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*pdivisor = 1;
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break;
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case 13:
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*pout = 40800;
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*pdivisor = 1;
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