54 lines
2.0 KiB
ArmAsm
54 lines
2.0 KiB
ArmAsm
// Copyright (c) 2018 Andreas Auernhammer. All rights reserved.
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// Use of this source code is governed by a license that can be
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// found in the LICENSE file.
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// +build 386,!gccgo,!appengine,!nacl amd64,!gccgo,!appengine,!nacl
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#include "textflag.h"
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DATA ·sigma<>+0x00(SB)/4, $0x61707865
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DATA ·sigma<>+0x04(SB)/4, $0x3320646e
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DATA ·sigma<>+0x08(SB)/4, $0x79622d32
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DATA ·sigma<>+0x0C(SB)/4, $0x6b206574
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GLOBL ·sigma<>(SB), (NOPTR+RODATA), $16 // The 4 ChaCha initialization constants
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// SSE2/SSE3/AVX constants
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DATA ·one<>+0x00(SB)/8, $1
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DATA ·one<>+0x08(SB)/8, $0
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GLOBL ·one<>(SB), (NOPTR+RODATA), $16 // The constant 1 as 128 bit value
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DATA ·rol16<>+0x00(SB)/8, $0x0504070601000302
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DATA ·rol16<>+0x08(SB)/8, $0x0D0C0F0E09080B0A
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GLOBL ·rol16<>(SB), (NOPTR+RODATA), $16 // The PSHUFB 16 bit left rotate constant
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DATA ·rol8<>+0x00(SB)/8, $0x0605040702010003
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DATA ·rol8<>+0x08(SB)/8, $0x0E0D0C0F0A09080B
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GLOBL ·rol8<>(SB), (NOPTR+RODATA), $16 // The PSHUFB 8 bit left rotate constant
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// AVX2 constants
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DATA ·one_AVX2<>+0x00(SB)/8, $0
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DATA ·one_AVX2<>+0x08(SB)/8, $0
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DATA ·one_AVX2<>+0x10(SB)/8, $1
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DATA ·one_AVX2<>+0x18(SB)/8, $0
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GLOBL ·one_AVX2<>(SB), (NOPTR+RODATA), $32 // The constant 1 as 256 bit value
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DATA ·two_AVX2<>+0x00(SB)/8, $2
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DATA ·two_AVX2<>+0x08(SB)/8, $0
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DATA ·two_AVX2<>+0x10(SB)/8, $2
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DATA ·two_AVX2<>+0x18(SB)/8, $0
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GLOBL ·two_AVX2<>(SB), (NOPTR+RODATA), $32
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DATA ·rol16_AVX2<>+0x00(SB)/8, $0x0504070601000302
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DATA ·rol16_AVX2<>+0x08(SB)/8, $0x0D0C0F0E09080B0A
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DATA ·rol16_AVX2<>+0x10(SB)/8, $0x0504070601000302
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DATA ·rol16_AVX2<>+0x18(SB)/8, $0x0D0C0F0E09080B0A
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GLOBL ·rol16_AVX2<>(SB), (NOPTR+RODATA), $32 // The VPSHUFB 16 bit left rotate constant
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DATA ·rol8_AVX2<>+0x00(SB)/8, $0x0605040702010003
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DATA ·rol8_AVX2<>+0x08(SB)/8, $0x0E0D0C0F0A09080B
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DATA ·rol8_AVX2<>+0x10(SB)/8, $0x0605040702010003
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DATA ·rol8_AVX2<>+0x18(SB)/8, $0x0E0D0C0F0A09080B
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GLOBL ·rol8_AVX2<>(SB), (NOPTR+RODATA), $32 // The VPSHUFB 8 bit left rotate constant
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