mirror of
https://github.com/superseriousbusiness/gotosocial
synced 2024-12-12 00:26:39 +01:00
acc333c40b
When GTS is running in a container runtime which has configured CPU or memory limits or under an init system that uses cgroups to impose CPU and memory limits the values the Go runtime sees for GOMAXPROCS and GOMEMLIMIT are still based on the host resources, not the cgroup. At least for the throttling middlewares which use GOMAXPROCS to configure their queue size, this can result in GTS running with values too big compared to the resources that will actuall be available to it. This introduces 2 dependencies which can pick up resource contraints from the current cgroup and tune the Go runtime accordingly. This should result in the different queues being appropriately sized and in general more predictable performance. These dependencies are a no-op on non-Linux systems or if running in a cgroup that doesn't set a limit on CPU or memory. The automatic tuning of GOMEMLIMIT can be disabled by either explicitly setting GOMEMLIMIT yourself or by setting AUTOMEMLIMIT=off. The automatic tuning of GOMAXPROCS can similarly be counteracted by setting GOMAXPROCS yourself.
150 lines
3.2 KiB
Go
150 lines
3.2 KiB
Go
package asm
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//go:generate stringer -output alu_string.go -type=Source,Endianness,ALUOp
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// Source of ALU / ALU64 / Branch operations
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//
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// msb lsb
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// +----+-+---+
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// |op |S|cls|
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// +----+-+---+
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type Source uint8
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const sourceMask OpCode = 0x08
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// Source bitmask
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const (
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// InvalidSource is returned by getters when invoked
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// on non ALU / branch OpCodes.
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InvalidSource Source = 0xff
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// ImmSource src is from constant
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ImmSource Source = 0x00
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// RegSource src is from register
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RegSource Source = 0x08
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)
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// The Endianness of a byte swap instruction.
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type Endianness uint8
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const endianMask = sourceMask
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// Endian flags
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const (
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InvalidEndian Endianness = 0xff
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// Convert to little endian
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LE Endianness = 0x00
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// Convert to big endian
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BE Endianness = 0x08
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)
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// ALUOp are ALU / ALU64 operations
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//
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// msb lsb
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// +----+-+---+
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// |OP |s|cls|
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// +----+-+---+
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type ALUOp uint8
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const aluMask OpCode = 0xf0
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const (
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// InvalidALUOp is returned by getters when invoked
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// on non ALU OpCodes
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InvalidALUOp ALUOp = 0xff
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// Add - addition
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Add ALUOp = 0x00
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// Sub - subtraction
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Sub ALUOp = 0x10
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// Mul - multiplication
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Mul ALUOp = 0x20
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// Div - division
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Div ALUOp = 0x30
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// Or - bitwise or
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Or ALUOp = 0x40
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// And - bitwise and
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And ALUOp = 0x50
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// LSh - bitwise shift left
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LSh ALUOp = 0x60
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// RSh - bitwise shift right
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RSh ALUOp = 0x70
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// Neg - sign/unsign signing bit
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Neg ALUOp = 0x80
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// Mod - modulo
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Mod ALUOp = 0x90
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// Xor - bitwise xor
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Xor ALUOp = 0xa0
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// Mov - move value from one place to another
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Mov ALUOp = 0xb0
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// ArSh - arithmatic shift
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ArSh ALUOp = 0xc0
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// Swap - endian conversions
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Swap ALUOp = 0xd0
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)
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// HostTo converts from host to another endianness.
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func HostTo(endian Endianness, dst Register, size Size) Instruction {
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var imm int64
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switch size {
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case Half:
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imm = 16
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case Word:
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imm = 32
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case DWord:
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imm = 64
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default:
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return Instruction{OpCode: InvalidOpCode}
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}
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return Instruction{
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OpCode: OpCode(ALUClass).SetALUOp(Swap).SetSource(Source(endian)),
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Dst: dst,
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Constant: imm,
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}
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}
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// Op returns the OpCode for an ALU operation with a given source.
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func (op ALUOp) Op(source Source) OpCode {
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return OpCode(ALU64Class).SetALUOp(op).SetSource(source)
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}
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// Reg emits `dst (op) src`.
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func (op ALUOp) Reg(dst, src Register) Instruction {
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return Instruction{
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OpCode: op.Op(RegSource),
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Dst: dst,
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Src: src,
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}
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}
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// Imm emits `dst (op) value`.
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func (op ALUOp) Imm(dst Register, value int32) Instruction {
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return Instruction{
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OpCode: op.Op(ImmSource),
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Dst: dst,
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Constant: int64(value),
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}
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}
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// Op32 returns the OpCode for a 32-bit ALU operation with a given source.
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func (op ALUOp) Op32(source Source) OpCode {
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return OpCode(ALUClass).SetALUOp(op).SetSource(source)
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}
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// Reg32 emits `dst (op) src`, zeroing the upper 32 bit of dst.
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func (op ALUOp) Reg32(dst, src Register) Instruction {
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return Instruction{
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OpCode: op.Op32(RegSource),
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Dst: dst,
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Src: src,
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}
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}
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// Imm32 emits `dst (op) value`, zeroing the upper 32 bit of dst.
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func (op ALUOp) Imm32(dst Register, value int32) Instruction {
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return Instruction{
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OpCode: op.Op32(ImmSource),
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Dst: dst,
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Constant: int64(value),
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}
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}
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