70e52cba1b
* rl78/rl78-sim.ld: Add .saddr/.frodata section. * rl78/rl78.ld: Likewise. * rl78/rl78-sim.ld: Make room for virtual register banks. * rl78/rl78.ld: Likewise. * rl78/vregs.h: New. * rl78-sys.h: Use it. * rl78/swrite.S: New. * rl78/Makefile.in: Build it. * rl78/write.c: Use it.
114 lines
3.0 KiB
C
114 lines
3.0 KiB
C
/*
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Copyright (c) 2010 Red Hat Incorporated.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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The name of Red Hat Incorporated may not be used to endorse
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or promote products derived from this software without specific
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prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL RED HAT INCORPORATED BE LIABLE FOR ANY
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DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/* These definitions are for the RL78/G13, which the simulator
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simulates. */
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typedef unsigned char UQI __attribute__((mode(QI)));
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typedef unsigned int UHI __attribute__((mode(HI)));
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#define s8(x) (*(volatile UQI *)(x))
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#define s16(x) (*(volatile UHI *)(x))
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#define P(x) s8(0xfff00+(x))
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#define PM(x) s8(0xfff20+(x))
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#define PER0 s8(0xf00f0)
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#define SSR00 s16(0xf0100)
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#define SMR00 s16(0xf0110)
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#define SCR00 s16(0xf0118)
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#define SS0 s16(0xf0122)
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#define SPS0 s16(0xf0126)
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#define SO0 s16(0xf0128)
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#define SOE0 s16(0xf012a)
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#define SOL0 s16(0xf0134)
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#define SDR00 s16(0xfff10)
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static int initted = 0;
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static void
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init_uart0 ()
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{
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initted = 1;
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PER0 = 0xff;
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SPS0 = 0x0011; /* 16 MHz */
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SMR00 = 0x0022; /* uart mode */
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SCR00 = 0x8097; /* 8-N-1 */
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SDR00 = 0x8a00; /* baud in MSB - 115200 */
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SOL0 = 0x0000; /* not inverted */
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SO0 = 0x000f; /* initial value */
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SOE0 = 0x0001; /* enable TxD0 */
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P(1) |= 0b00000100;
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PM(1) &= 0b11111011;
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SS0 = 0x0001;
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}
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static void
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tputc (char c)
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{
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/* Wait for transmit buffer to be empty. */
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while (SSR00 & 0x0020)
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asm("");
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/* Transmit that byte. */
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SDR00 = c;
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}
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/* defaults to 0 unless open() is linked in */
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int _open_present;
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int
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_write(int fd, char *ptr, int len)
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{
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int rv = len;
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if (_open_present && fd > 2)
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return _SYS_write (fd, ptr, len);
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if (!initted)
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init_uart0 ();
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while (len != 0)
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{
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if (*ptr == '\n')
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tputc ('\r');
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tputc (*ptr);
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ptr ++;
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len --;
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}
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return rv;
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}
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char * write (int) __attribute__((weak, alias ("_write")));
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