44 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			44 lines
		
	
	
		
			2.2 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /* mc68681reg.h -- Motorola mc68681 DUART register offsets.
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|  * Copyright (c) 1995 Cygnus Support
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|  *
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|  * The authors hereby grant permission to use, copy, modify, distribute,
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|  * and license this software and its documentation for any purpose, provided
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|  * that existing copyright notices are retained in all copies and that this
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|  * notice is included verbatim in any distributions. No written agreement,
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|  * license, or royalty fee is required for any of the authorized uses.
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|  * Modifications to this software may be copyrighted by their authors
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|  * and need not follow the licensing terms described here, provided that
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|  * the new terms are clearly indicated on the first page of each file where
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|  * they apply.
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|  */
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| 
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| #define DUART_MR1A	0x00		/* Mode Register A */
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| #define DUART_MR1A	0x00		/* Mode Register A */
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| #define DUART_SRA	0x01		/* Status Register A */
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| #define DUART_CSRA	0x01		/* Clock-Select Register A */
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| #define DUART_CRA	0x02		/* Command Register A */
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| #define DUART_RBA	0x03		/* Receive Buffer A */
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| #define DUART_TBA	0x03		/* Transmit Buffer A */
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| #define DUART_IPCR	0x04		/* Input Port Change Register */
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| #define DUART_ACR	0x04    	/* Auxiliary Control Register */
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| #define DUART_ISR	0x05		/* Interrupt Status Register */
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| #define DUART_IMR	0x05		/* Interrupt Mask Register */
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| #define DUART_CUR	0x06		/* Counter Mode: current MSB */
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| #define DUART_CTUR	0x06		/* Counter/Timer upper reg */
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| #define DUART_CLR	0x07		/* Counter Mode: current LSB */
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| #define DUART_CTLR	0x07		/* Counter/Timer lower reg */
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| #define DUART_MR1B	0x08		/* Mode Register B */
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| #define DUART_MR2B	0x08    	/* Mode Register B */
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| #define DUART_SRB	0x09		/* Status Register B */
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| #define DUART_CSRB	0x09		/* Clock-Select Register B */
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| #define DUART_CRB	0x0A		/* Command Register B */
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| #define DUART_RBB	0x0B		/* Receive Buffer B */
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| #define DUART_TBB	0x0B		/* Transmit Buffer A */
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| #define DUART_IVR	0x0C		/* Interrupt Vector Register */
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| #define DUART_IP	0x0D		/* Input Port */
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| #define DUART_OPCR	0x0D		/* Output Port Configuration Reg. */
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| #define DUART_STRTCC	0x0E		/* Start-Counter command */
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| #define DUART_OPRSET	0x0E		/* Output Port Reg, SET bits */
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| #define DUART_STOPCC	0x0F		/* Stop-Counter command */
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| #define DUART_OPRRST	0x0F		/* Output Port Reg, ReSeT bits */
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