652 lines
19 KiB
ArmAsm
652 lines
19 KiB
ArmAsm
/*
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* Copyright (c) 1995, 1996, 1998 Cygnus Support
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*
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* The authors hereby grant permission to use, copy, modify, distribute,
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* and license this software and its documentation for any purpose, provided
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* that existing copyright notices are retained in all copies and that this
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* notice is included verbatim in any distributions. No written agreement,
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* license, or royalty fee is required for any of the authorized uses.
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* Modifications to this software may be copyrighted by their authors
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* and need not follow the licensing terms described here, provided that
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* the new terms are clearly indicated on the first page of each file where
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* they apply.
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*/
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#include "asm.h"
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#include "slite.h"
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.text
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.align 4
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/*
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* The trap table has to be the first code in a boot PROM. But because
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* the Memory Configuration comes up thinking we only have 4K of PROM, we
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* cannot have a full trap table and still have room left over to
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* reprogram the Memory Configuration register correctly. This file
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* uses an abbreviated trap which has every entry which might be used
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* before RTEMS installs its own trap table.
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*/
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.globl _trap_table
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_trap_table:
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TRAP(SYM(ercinit)); ! 00 reset trap
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BAD_TRAP; ! 01 instruction access exception
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TRAP(SYM(no_fpu)); ! 02 illegal instruction
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BAD_TRAP; ! 03 privileged instruction
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BAD_TRAP; ! 04 fp disabled
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TRAP(SYM(win_overflow)); ! 05 window overflow
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TRAP(SYM(win_underflow)); ! 06 window underflow
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BAD_TRAP; ! 07 memory address not aligned
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BAD_TRAP; ! 08 fp exception
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BAD_TRAP; ! 09 data access exception
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BAD_TRAP; ! 0A tag overflow
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/* Trap levels from 0B to 0x10 are not defined (used for MEC init) */
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SYM(ercinit):
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sethi %hi(_ERC32_MEC), %g1 ! 0B
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sethi %hi(0x001C1000), %g2
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or %g1,%lo(0x001C1000),%g1
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st %g2, [%g1 + 0x10]
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st %g0, [%g1 + 0x18] ! 0C
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nop
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nop
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nop
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TRAP(SYM(hard_reset)); ! 0D undefined
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BAD_TRAP; ! 0E undefined
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BAD_TRAP; ! 0F undefined
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BAD_TRAP; ! 10 undefined
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/*
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* ERC32 defined traps
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*/
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BAD_TRAP; ! 11 masked errors
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BAD_TRAP; ! 12 external 1
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BAD_TRAP; ! 13 external 2
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BAD_TRAP; ! 14 UART A RX/TX
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BAD_TRAP; ! 15 UART B RX/TX
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BAD_TRAP; ! 16 correctable memory error
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BAD_TRAP; ! 17 UART error
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BAD_TRAP; ! 18 DMA access error
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BAD_TRAP; ! 19 DMA timeout
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BAD_TRAP; ! 1A external 3
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BAD_TRAP; ! 1B external 4
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BAD_TRAP; ! 1C general purpose timer
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BAD_TRAP; ! 1D real time clock
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BAD_TRAP; ! 1E external 5
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BAD_TRAP; ! 1F watchdog timeout
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 20 - 23 undefined
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BAD_TRAP; ! 24 cp_disabled
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BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 25 - 27 undefined
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BAD_TRAP; ! 28 cp_exception
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BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 29 - 2B undefined
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 2C - 2F undefined
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 30 - 33 undefined
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 34 - 37 undefined
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 38 - 3B undefined
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 3C - 3F undefined
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 40 - 43 undefined
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 44 - 47 undefined
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 48 - 4B undefined
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 4C - 4F undefined
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 50 - 53 undefined
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 54 - 57 undefined
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 58 - 5B undefined
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 5C - 5F undefined
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 60 - 63 undefined
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 64 - 67 undefined
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 68 - 6B undefined
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 6C - 6F undefined
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 70 - 73 undefined
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 74 - 77 undefined
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 78 - 7B undefined
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BAD_TRAP; BAD_TRAP; BAD_TRAP; BAD_TRAP; ! 7C - 7F undefined
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/*
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* Software traps
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*
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* NOTE: At the risk of being redundant... this is not a full
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* table. The setjmp on the SPARC requires a window flush trap
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* handler and RTEMS will preserve the entries that were
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* installed before.
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*/
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SOFT_TRAP; ! 80
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#if 0
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SOFT_TRAP; ! 81
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#else
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TRAP(SYM(trap_low)) ! 81
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#endif
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SOFT_TRAP; ! 82
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TRAP(SYM(win_flush)); ! 83 flush windows SW trap
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 84 - 87
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 88 - 8B
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 8C - 8F
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 90 - 93
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 94 - 97
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 98 - 9B
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! 9C - 9F
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! A0 - A3
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! A4 - A7
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! A8 - AB
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! AC - AF
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! B0 - B3
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! B4 - B7
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! B8 - BB
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! BC - BF
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! C0 - C3
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! C4 - C7
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! C8 - CB
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! CC - CF
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! D0 - D3
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! D4 - D7
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! D8 - DB
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! DC - DF
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! E0 - E3
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! E4 - E7
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! E8 - EB
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! EC - EF
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! F0 - F3
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! F4 - F7
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! F8 - FB
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SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; SOFT_TRAP; ! FC - FF
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/*
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* Startup code for standalone system. Wash IU and FPU (if present)
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* registers. The registers have to be written to initiate the parity
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* bits.
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*/
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.globl SYM(hard_reset)
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SYM(hard_reset):
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sethi %hi(0x01FE0),%o0
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or %o0,%lo(0x01FE0),%o0
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mov %o0, %psr ! Set valid PSR
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nop
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mov %g0, %wim ! Set window invalid mask register
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mov %g0, %y ! Init Y-register
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nop
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sethi %hi(SYM(hard_reset)), %g1
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mov %g1, %tbr ! Set TBR
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sethi %hi(SP_INIT),%sp
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or %g0, 1, %o0
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ld [%g0], %f0 ! Check if FPU is present
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tst %o0
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bz fixiu
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nop
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ba fixfpu
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! FPU disabled trap address
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clr %i0
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jmpl %l2, %g0
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rett %l2 + 4
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nop
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! Wash register files (fix for 90C601E & 90C602E)
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fixfpu:
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ld [%g0], %f0
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ld [%g0], %f1
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ld [%g0], %f2
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ld [%g0], %f3
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ld [%g0], %f4
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ld [%g0], %f5
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ld [%g0], %f6
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ld [%g0], %f7
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ld [%g0], %f8
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ld [%g0], %f9
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ld [%g0], %f10
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ld [%g0], %f11
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ld [%g0], %f12
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ld [%g0], %f13
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ld [%g0], %f14
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ld [%g0], %f15
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ld [%g0], %f16
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ld [%g0], %f17
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ld [%g0], %f18
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ld [%g0], %f19
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ld [%g0], %f20
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ld [%g0], %f21
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ld [%g0], %f22
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ld [%g0], %f23
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ld [%g0], %f24
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ld [%g0], %f25
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ld [%g0], %f26
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ld [%g0], %f27
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ld [%g0], %f28
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ld [%g0], %f29
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ld [%g0], %f30
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ld [%g0], %f31
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fixiu:
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clr %g1
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clr %g2
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clr %g3
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clr %g4
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clr %g5
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clr %g6
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clr %g7
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set 8,%g1
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wl0:
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clr %i0
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clr %i1
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clr %i2
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clr %i3
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clr %i4
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clr %i5
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clr %i6
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clr %i7
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clr %l0
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clr %l1
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clr %l2
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clr %l3
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clr %l4
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clr %l5
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clr %l6
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clr %l7
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save
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subcc %g1, 1, %g1
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bne wl0
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nop
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!
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! Start the real-time clock with a tick of 150 clocks
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!
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rtc:
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set 0x1f80000, %l0 ! MEC register base
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set 149, %l1
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st %l1, [%l0 + 0x84] ! RTC scaler = 149
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set 0x0d00, %l1
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st %l1, [%l0 + 0x98] ! Start RTC
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st %g0, [%l0 + 0x64] ! Disable watchdog for now
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ld [%l0], %g1
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or %g1, 1, %g1
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st %g1, [%l0] ! Enable power-down mode
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_init:
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set PSR_INIT, %g1 ! Initialize psr
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mov %g1, %psr
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set WIM_INIT, %g1 ! Initialize WIM
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mov %g1, %wim
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set _trap_table, %g1 ! Initialize TBR
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mov %g1, %tbr
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nop;nop;nop
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set PSR_INIT, %g1
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wr %g1, 0x20, %psr ! enable traps
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nop; nop; nop;
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call SYM(start)
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nop
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/*
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* Register window overflow handler. Come here when save would move us
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* into the invalid window. This routine runs with traps disabled, and
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* must be careful not to touch the condition codes, as PSR is never
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* restored.
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*
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* We are called with %l0 = wim, %l1 = pc, %l2 = npc
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*/
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.globl SYM(win_overflow)
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SYM(win_overflow):
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mov %g1, %l3 ! Save g1, we use it to hold the wim
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srl %l0, 1, %g1 ! Rotate wim right
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sll %l0, NUMBER_OF_REGISTER_WINDOWS - 1, %l0
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or %l0, %g1, %g1
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save %g0, %g0, %g0 ! Slip into next window
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mov %g1, %wim ! Install the new wim
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nop
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nop
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nop
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std %l0, [%sp + 0 * 4] ! save L & I registers
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std %l2, [%sp + 2 * 4]
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std %l4, [%sp + 4 * 4]
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std %l6, [%sp + 6 * 4]
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std %i0, [%sp + 8 * 4]
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std %i2, [%sp + 10 * 4]
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std %i4, [%sp + 12 * 4]
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std %i6, [%sp + 14 * 4]
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restore ! Go back to trap window.
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mov %l3, %g1 ! Restore %g1
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jmpl %l1, %g0
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rett %l2
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/*
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* Register window underflow handler. Come here when restore would move us
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* into the invalid window. This routine runs with traps disabled, and
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* must be careful not to touch the condition codes, as PSR is never
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* restored.
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*
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* We are called with %l0 = wim, %l1 = pc, %l2 = npc
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*/
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.globl SYM(win_underflow)
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SYM(win_underflow):
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sll %l0, 1, %l3 ! Rotate wim left
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srl %l0, NUMBER_OF_REGISTER_WINDOWS - 1, %l0
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or %l0, %l3, %l0
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mov %l0, %wim ! Install the new wim
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restore ! Users window
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restore ! His callers window
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ldd [%sp + 0 * 4], %l0 ! restore L & I registers
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ldd [%sp + 2 * 4], %l2
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ldd [%sp + 4 * 4], %l4
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ldd [%sp + 6 * 4], %l6
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ldd [%sp + 8 * 4], %i0
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ldd [%sp + 10 * 4], %i2
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ldd [%sp + 12 * 4], %i4
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ldd [%sp + 14 * 4], %i6
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save %g0, %g0, %g0 ! Back to trap window
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save %g0, %g0, %g0
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jmpl %l1, %g0
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rett %l2
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/*
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* Register window flush handler, triggered by a "ta 3" instruction.
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* We are called with %l0 = wim, %l1 = pc, %l2 = npc
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*/
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.globl SYM(win_flush)
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SYM(win_flush):
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mov %psr, %l0
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or %l0,0xf00,%l3 ! Disable interrupts
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mov %l3,%psr
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nop
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nop
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nop
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mov %wim, %l3
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srl %l3, %l0, %l4 ! wim >> cwp
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cmp %l4, 1
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bne flush_window_fine ! Branch if not in the invalid window
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nop
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/* Handle window overflow. We can't trap here. */
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mov %g1, %l4 ! Save g1, we use it to hold the wim
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srl %l3, 1, %g1 ! Rotate wim right
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sll %l3, NUMBER_OF_REGISTER_WINDOWS - 1, %l3
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or %l3, %g1, %g1
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mov %g0, %wim ! Clear wim so that subsequent save
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nop ! wont trap
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nop
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nop
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save %g0, %g0, %g0 ! Slip into next window
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mov %g1, %wim ! Install the new wim
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std %l0, [%sp + 0 * 4] ! save L & I registers
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std %l2, [%sp + 2 * 4]
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std %l4, [%sp + 4 * 4]
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std %l6, [%sp + 6 * 4]
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std %i0, [%sp + 8 * 4]
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std %i2, [%sp + 10 * 4]
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std %i4, [%sp + 12 * 4]
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std %i6, [%sp + 14 * 4]
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restore ! Go back to trap window.
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mov %l4, %g1 ! Restore %g1
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flush_window_fine:
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mov %psr,%l5 ! enable traps
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or %l5,0x20,%l5
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mov %l5, %psr
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nop
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nop
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nop
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set save_buf,%l5
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st %l2,[%l5]
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! The stack pointer currently contains a bogus value [when a trap
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! occurs CWP is decremented and points to an unused window].
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! Give it something useful before we flush every window.
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! This does what a "save %sp,-64,$sp" would, except that CWP has
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! already been decremented.
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add %fp, -64, %sp
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save %sp, -64, %sp ! Flush user register window to stack
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save %sp, -64, %sp
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save %sp, -64, %sp
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save %sp, -64, %sp
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save %sp, -64, %sp
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save %sp, -64, %sp
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save %sp, -64, %sp
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save %sp, -64, %sp
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restore
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restore
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restore
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restore
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restore
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restore
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restore
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restore
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restore ! Make sure we have a valid window
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save %g0, %g0, %g0
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set save_buf, %l2 ! Get our return address back
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ld [%l2],%l2
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|
|
|
mov %psr,%l5 ! disable traps for rett
|
|
andn %l5,0x20,%l5
|
|
mov %l5,%psr
|
|
nop
|
|
nop
|
|
nop
|
|
|
|
jmpl %l2, %g0
|
|
rett %l2+4
|
|
|
|
/*
|
|
* Read the TBR.
|
|
*/
|
|
.globl SYM(rdtbr)
|
|
SYM(rdtbr):
|
|
mov %tbr, %o0
|
|
nop
|
|
retl
|
|
nop
|
|
|
|
/*
|
|
* Read the psr
|
|
*/
|
|
.globl SYM(read_psr)
|
|
SYM(read_psr):
|
|
mov %psr, %o0
|
|
nop
|
|
retl
|
|
nop
|
|
|
|
/*
|
|
* Write the PSR.
|
|
*/
|
|
|
|
.globl SYM(write_psr)
|
|
SYM(write_psr):
|
|
mov %i0, %psr
|
|
nop
|
|
nop
|
|
nop
|
|
retl
|
|
nop
|
|
/*
|
|
* Come here when no fpu exists. This just skips the offending
|
|
* instruction.
|
|
*/
|
|
.globl SYM(no_fpu)
|
|
SYM(no_fpu):
|
|
jmpl %l2, %g0
|
|
rett %l2+4
|
|
|
|
.globl SYM(fltr_proto)
|
|
.align 4
|
|
SYM(fltr_proto): ! First level trap routine prototype
|
|
sethi 0, %l0
|
|
jmpl 0+%l0, %g0
|
|
nop
|
|
nop
|
|
|
|
/*
|
|
* Trap handler for memory errors. This just sets mem_err to be
|
|
* non-zero. It assumes that l1 is non-zero. This should be safe,
|
|
* as it is doubtful that 0 would ever contain code that could mem
|
|
* fault. This routine will skip past the faulting instruction after
|
|
* setting mem_err.
|
|
*/
|
|
.globl SYM(fltr_set_mem_err)
|
|
SYM(fltr_set_mem_err):
|
|
sethi %hi(SYM(mem_err)), %l0
|
|
st %l1, [%l0 + %lo(SYM(mem_err))]
|
|
jmpl %l2, %g0
|
|
rett %l2+4
|
|
|
|
.data
|
|
.align 4
|
|
.ascii "DaTa"
|
|
.long SYM(sdata)
|
|
in_trap_handler:
|
|
.word 0
|
|
save_buf:
|
|
.word 0 /* place to save %g1 */
|
|
.word 0 /* place to save %g2 */
|
|
|
|
.text
|
|
.align 4
|
|
|
|
/*
|
|
* This function is called when any SPARC trap (except window overflow
|
|
* or underflow) occurs. It makes sure that the invalid register
|
|
* window is still available before jumping into C code. It will also
|
|
* restore the world if you return from handle_exception.
|
|
*/
|
|
.globl SYM(trap_low)
|
|
SYM(trap_low):
|
|
mov %psr, %l0
|
|
mov %wim, %l3
|
|
|
|
srl %l3, %l0, %l4 ! wim >> cwp
|
|
cmp %l4, 1
|
|
bne window_fine ! Branch if not in the invalid window
|
|
nop
|
|
|
|
mov %g1, %l4 ! Save g1, we use it to hold the wim
|
|
srl %l3, 1, %g1 ! Rotate wim right
|
|
sll %l3, 8-1, %l5
|
|
or %l5, %g1, %g1
|
|
|
|
save %g0, %g0, %g0 ! Slip into next window
|
|
mov %g1, %wim ! Install the new wim
|
|
|
|
std %l0, [%sp + 0 * 4] ! save L & I registers
|
|
std %l2, [%sp + 2 * 4]
|
|
std %l4, [%sp + 4 * 4]
|
|
std %l6, [%sp + 6 * 4]
|
|
|
|
std %i0, [%sp + 8 * 4]
|
|
std %i2, [%sp + 10 * 4]
|
|
std %i4, [%sp + 12 * 4]
|
|
std %i6, [%sp + 14 * 4]
|
|
|
|
restore ! Go back to trap window.
|
|
mov %l4, %g1 ! Restore g1
|
|
|
|
window_fine:
|
|
sethi %hi(in_trap_handler), %l4
|
|
ld [%lo(in_trap_handler) + %l4], %l5
|
|
tst %l5
|
|
bg recursive_trap
|
|
inc %l5
|
|
|
|
/* use the stack we set in the linker script */
|
|
sethi %hi(__trap_stack), %l6
|
|
or %l6,%lo(__trap_stack),%l6
|
|
mov %l6, %sp ! set the stack pointer
|
|
|
|
recursive_trap:
|
|
st %l5, [%lo(in_trap_handler) + %l4]
|
|
|
|
sub %sp,(16+1+6+1+72)*4,%sp ! Make room for input & locals
|
|
! + hidden arg + arg spill
|
|
! + doubleword alignment
|
|
! + registers[72] local var
|
|
|
|
std %g0, [%sp + (24 + 0) * 4] ! registers[Gx]
|
|
std %g2, [%sp + (24 + 2) * 4]
|
|
std %g4, [%sp + (24 + 4) * 4]
|
|
std %g6, [%sp + (24 + 6) * 4]
|
|
|
|
std %i0, [%sp + (24 + 8) * 4] ! registers[Ox]
|
|
std %i2, [%sp + (24 + 10) * 4]
|
|
std %i4, [%sp + (24 + 12) * 4]
|
|
std %i6, [%sp + (24 + 14) * 4]
|
|
! F0->F31 not implemented
|
|
mov %y, %l4
|
|
mov %tbr, %l5
|
|
st %l4, [%sp + (24 + 64) * 4] ! Y
|
|
st %l0, [%sp + (24 + 65) * 4] ! PSR
|
|
st %l3, [%sp + (24 + 66) * 4] ! WIM
|
|
st %l5, [%sp + (24 + 67) * 4] ! TBR
|
|
st %l1, [%sp + (24 + 68) * 4] ! PC
|
|
st %l2, [%sp + (24 + 69) * 4] ! NPC
|
|
! CPSR and FPSR not implemented
|
|
|
|
or %l0, 0xf20, %l4
|
|
mov %l4, %psr ! Turn on traps, disable interrupts
|
|
|
|
call SYM(handle_exception)
|
|
add %sp, 24 * 4, %o0 ! Pass address of registers
|
|
|
|
/* Reload all of the registers that aren't on the stack */
|
|
|
|
ld [%sp + (24 + 1) * 4], %g1 ! registers[Gx]
|
|
ldd [%sp + (24 + 2) * 4], %g2
|
|
ldd [%sp + (24 + 4) * 4], %g4
|
|
ldd [%sp + (24 + 6) * 4], %g6
|
|
|
|
ldd [%sp + (24 + 8) * 4], %i0 ! registers[Ox]
|
|
ldd [%sp + (24 + 10) * 4], %i2
|
|
ldd [%sp + (24 + 12) * 4], %i4
|
|
ldd [%sp + (24 + 14) * 4], %i6
|
|
|
|
ldd [%sp + (24 + 64) * 4], %l0 ! Y & PSR
|
|
ldd [%sp + (24 + 68) * 4], %l2 ! PC & NPC
|
|
|
|
restore ! Ensure that previous window is valid
|
|
save %g0, %g0, %g0 ! by causing a window_underflow trap
|
|
|
|
mov %l0, %y
|
|
mov %l1, %psr ! Make sure that traps are disabled
|
|
! for rett
|
|
|
|
sethi %hi(in_trap_handler), %l4
|
|
ld [%lo(in_trap_handler) + %l4], %l5
|
|
dec %l5
|
|
st %l5, [%lo(in_trap_handler) + %l4]
|
|
|
|
jmpl %l2, %g0 ! Restore old PC
|
|
rett %l3 ! Restore old nPC
|
|
|
|
|