b3281dd194
Remove FPU availability check, just use the pre-processor flags to indicicate what the user wanted. * mips/abiflags.S: New file. * mips/regs.S (SR_MSA): Define macro. * mips/mti32.ld: Place .MIPS.abiflags and wrap in marker symbols. * mips/mti64.ld: Likewise. * mips/mti64_64.ld: Likewise. * mips/mti64_n32.ld: Likewise.
83 lines
3.7 KiB
ArmAsm
83 lines
3.7 KiB
ArmAsm
/*
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* abiflags.S - MIPS ABI flags.
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*/
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/* Values for the xxx_size bytes of an ABI flags structure. */
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#define AFL_REG_NONE 0x00 /* No registers. */
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#define AFL_REG_32 0x01 /* 32-bit registers. */
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#define AFL_REG_64 0x02 /* 64-bit registers. */
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#define AFL_REG_128 0x03 /* 128-bit registers. */
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/* Masks for the ases word of an ABI flags structure. */
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#define AFL_ASE_DSP 0x00000001 /* DSP ASE. */
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#define AFL_ASE_DSPR2 0x00000002 /* DSP R2 ASE. */
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#define AFL_ASE_EVA 0x00000004 /* Enhanced VA Scheme. */
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#define AFL_ASE_MCU 0x00000008 /* MCU (MicroController) ASE. */
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#define AFL_ASE_MDMX 0x00000010 /* MDMX ASE. */
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#define AFL_ASE_MIPS3D 0x00000020 /* MIPS-3D ASE. */
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#define AFL_ASE_MT 0x00000040 /* MT ASE. */
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#define AFL_ASE_SMARTMIPS 0x00000080 /* SmartMIPS ASE. */
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#define AFL_ASE_VIRT 0x00000100 /* VZ ASE. */
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#define AFL_ASE_MSA 0x00000200 /* MSA ASE. */
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#define AFL_ASE_MIPS16 0x00000400 /* MIPS16 ASE. */
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#define AFL_ASE_MICROMIPS 0x00000800 /* MICROMIPS ASE. */
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#define AFL_ASE_XPA 0x00001000 /* XPA ASE. */
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/* Values for the isa_ext word of an ABI flags structure. */
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#define AFL_EXT_XLR 1 /* RMI Xlr instruction. */
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#define AFL_EXT_OCTEON2 2 /* Cavium Networks Octeon2. */
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#define AFL_EXT_OCTEONP 3 /* Cavium Networks OcteonP. */
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#define AFL_EXT_LOONGSON_3A 4 /* Loongson 3A. */
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#define AFL_EXT_OCTEON 5 /* Cavium Networks Octeon. */
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#define AFL_EXT_5900 6 /* MIPS R5900 instruction. */
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#define AFL_EXT_4650 7 /* MIPS R4650 instruction. */
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#define AFL_EXT_4010 8 /* LSI R4010 instruction. */
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#define AFL_EXT_4100 9 /* NEC VR4100 instruction. */
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#define AFL_EXT_3900 10 /* Toshiba R3900 instruction. */
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#define AFL_EXT_10000 11 /* MIPS R10000 instruction. */
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#define AFL_EXT_SB1 12 /* Broadcom SB-1 instruction. */
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#define AFL_EXT_4111 13 /* NEC VR4111/VR4181 instruction. */
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#define AFL_EXT_4120 14 /* NEC VR4120 instruction. */
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#define AFL_EXT_5400 15 /* NEC VR5400 instruction. */
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#define AFL_EXT_5500 16 /* NEC VR5500 instruction. */
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#define AFL_EXT_LOONGSON_2E 17 /* ST Microelectronics Loongson 2E. */
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#define AFL_EXT_LOONGSON_2F 18 /* ST Microelectronics Loongson 2F. */
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/* Values defined for Tag_GNU_MIPS_ABI_FP. */
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#define Val_GNU_MIPS_ABI_FP_ANY 0 /* Not tagged or not using any ABIs affected by the differences. */
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#define Val_GNU_MIPS_ABI_FP_DOUBLE 1 /* Using hard-float -mdouble-float. */
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#define Val_GNU_MIPS_ABI_FP_SINGLE 2 /* Using hard-float -msingle-float. */
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#define Val_GNU_MIPS_ABI_FP_SOFT 3 /* Using soft-float. */
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#define Val_GNU_MIPS_ABI_FP_OLD_64 4 /* Using -mips32r2 -mfp64. */
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#define Val_GNU_MIPS_ABI_FP_XX 5 /* Using -mfpxx */
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#define Val_GNU_MIPS_ABI_FP_64 6 /* Using -mips32r2 -mfp64. */
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#define Val_GNU_MIPS_ABI_MSA_ANY 0 /* Not tagged or not using any ABIs affected by the differences. */
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#define Val_GNU_MIPS_ABI_MSA_128 1 /* Using 128-bit MSA. */
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/* MIPS ABI flags structure */
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.struct 0
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ABIFlags_version:
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.struct ABIFlags_version + 2
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ABIFlags_isa_level:
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.struct ABIFlags_isa_level + 1
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ABIFlags_isa_rev:
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.struct ABIFlags_isa_rev + 1
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ABIFlags_gpr_size:
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.struct ABIFlags_gpr_size + 1
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ABIFlags_cpr1_size:
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.struct ABIFlags_cpr1_size + 1
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ABIFlags_cpr2_size:
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.struct ABIFlags_cpr2_size + 1
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ABIFlags_fp_abi:
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.struct ABIFlags_fp_abi + 1
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ABIFlags_isa_ext:
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.struct ABIFlags_isa_ext + 4
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ABIFlags_ases:
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.struct ABIFlags_ases + 4
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ABIFlags_flags1:
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.struct ABIFlags_flags1 + 4
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ABIFlags_flags2:
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.struct ABIFlags_flags2 + 4
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/*> EOF abiflags.S <*/
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