13a47bd66a
* m68hc11/sci-inout.S: Supports -mlong-calls.
* m68hc11/sim-valid-m68hc11.ld (.tramp): New section for trampolines.
(.text): Mark the .installN and .finiN section with KEEP.
(.vectors): Likewise for .vectors.
(.gcc_except_table): New section.
* m68hc11/sim-valid-m68hc12.ld (.tramp): New section for trampolines.
(.text): Mark the .installN and .finiN section with KEEP.
(.vectors): Likewise for .vectors.
(.gcc_except_table): New section.
310 lines
8.7 KiB
Plaintext
310 lines
8.7 KiB
Plaintext
/* Linker script for 68HC12 executable (PROM). */
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ENTRY(_start)
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OUTPUT_FORMAT("elf32-m68hc12", "elf32-m68hc12", "elf32-m68hc12")
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OUTPUT_ARCH(m68hc12)
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GROUP(-lc -lbcc -lgcc)
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SEARCH_DIR(.);
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/* Fixed definition of the available memory banks.
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See generic emulation script for a user defined configuration. */
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/* The memory layout below is suitable for gcc validation.
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It takes care of big programs allowing up to 48128 bytes
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of text while allowing some programs that consume some
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memory (comp-goto-1 requires the RAM to be set to 0x4400
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to avoid head<->stack collision in malloc/sbrk). */
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MEMORY
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{
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page0 (rwx) : ORIGIN = 0x00, LENGTH = 256
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text (rx) : ORIGIN = 0x04400, LENGTH = 0x10000 - 0x4400
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data : ORIGIN = 0x01100, LENGTH = 0x2000 - 0x1100
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}
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/* Setup the stack on the top of the data memory bank. */
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PROVIDE (_stack = 0x04400 - 1);
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SECTIONS
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{
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.hash : { *(.hash) }
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.dynsym : { *(.dynsym) }
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.dynstr : { *(.dynstr) }
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.gnu.version : { *(.gnu.version) }
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.gnu.version_d : { *(.gnu.version_d) }
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.gnu.version_r : { *(.gnu.version_r) }
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.rel.text :
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{
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*(.rel.text)
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*(.rel.text.*)
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*(.rel.gnu.linkonce.t.*)
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}
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.rela.text :
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{
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*(.rela.text)
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*(.rela.text.*)
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*(.rela.gnu.linkonce.t.*)
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}
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.rel.data :
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{
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*(.rel.data)
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*(.rel.data.*)
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*(.rel.gnu.linkonce.d.*)
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}
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.rela.data :
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{
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*(.rela.data)
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*(.rela.data.*)
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*(.rela.gnu.linkonce.d.*)
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}
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.rel.rodata :
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{
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*(.rel.rodata)
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*(.rel.rodata.*)
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*(.rel.gnu.linkonce.r.*)
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}
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.rela.rodata :
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{
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*(.rela.rodata)
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*(.rela.rodata.*)
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*(.rela.gnu.linkonce.r.*)
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}
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.rel.sdata :
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{
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*(.rel.sdata)
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*(.rel.sdata.*)
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*(.rel.gnu.linkonce.s.*)
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}
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.rela.sdata :
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{
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*(.rela.sdata)
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*(.rela.sdata.*)
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*(.rela.gnu.linkonce.s.*)
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}
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.rel.sbss :
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{
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*(.rel.sbss)
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*(.rel.sbss.*)
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*(.rel.gnu.linkonce.sb.*)
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}
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.rela.sbss :
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{
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*(.rela.sbss)
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*(.rela.sbss.*)
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*(.rel.gnu.linkonce.sb.*)
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}
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.rel.bss :
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{
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*(.rel.bss)
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*(.rel.bss.*)
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*(.rel.gnu.linkonce.b.*)
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}
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.rela.bss :
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{
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*(.rela.bss)
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*(.rela.bss.*)
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*(.rela.gnu.linkonce.b.*)
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}
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.rela.stext : { *(.rela.stest) }
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.rela.etext : { *(.rela.etest) }
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.rela.sdata : { *(.rela.sdata) }
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.rela.edata : { *(.rela.edata) }
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.rela.eit_v : { *(.rela.eit_v) }
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.rela.ebss : { *(.rela.ebss) }
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.rela.srodata : { *(.rela.srodata) }
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.rela.erodata : { *(.rela.erodata) }
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.rela.got : { *(.rela.got) }
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.rela.ctors : { *(.rela.ctors) }
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.rela.dtors : { *(.rela.dtors) }
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.rela.init : { *(.rela.init) }
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.rela.fini : { *(.rela.fini) }
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.rela.plt : { *(.rela.plt) }
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.rel.stext : { *(.rel.stest) }
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.rel.etext : { *(.rel.etest) }
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.rel.sdata : { *(.rel.sdata) }
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.rel.edata : { *(.rel.edata) }
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.rel.ebss : { *(.rel.ebss) }
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.rel.eit_v : { *(.rel.eit_v) }
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.rel.srodata : { *(.rel.srodata) }
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.rel.erodata : { *(.rel.erodata) }
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.rel.got : { *(.rel.got) }
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.rel.ctors : { *(.rel.ctors) }
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.rel.dtors : { *(.rel.dtors) }
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.rel.init : { *(.rel.init) }
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.rel.fini : { *(.rel.fini) }
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.rel.plt : { *(.rel.plt) }
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/* Concatenate .page0 sections. Put them in the page0 memory bank
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unless we are creating a relocatable file. */
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.page0 :
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{
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*(.page0)
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} > page0
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/* Start of text section. */
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.stext :
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{
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*(.stext)
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} > text
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.init :
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{
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*(.init)
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} =0
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/* Put trampolines at beginning of text at 0x4400 so that they
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are not in memory bank window. */
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.tramp :
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{
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*(.tramp)
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} > text
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.text :
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{
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/* Put startup code at beginning so that _start keeps same address. */
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/* Startup code. */
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KEEP (*(.install0)) /* Section should setup the stack pointer. */
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KEEP (*(.install1)) /* Place holder for applications. */
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KEEP (*(.install2)) /* Optional installation of data sections in RAM. */
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KEEP (*(.install3)) /* Place holder for applications. */
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KEEP (*(.install4)) /* Section that calls the main. */
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*(.init)
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*(.text)
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*(.text.*)
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/* .gnu.warning sections are handled specially by elf32.em. */
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*(.gnu.warning)
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*(.gnu.linkonce.t.*)
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/* Finish code. */
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KEEP (*(.fini0)) /* Beginning of finish code (_exit symbol). */
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KEEP (*(.fini1)) /* Place holder for applications. */
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KEEP (*(.fini2)) /* C++ destructors. */
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KEEP (*(.fini3)) /* Place holder for applications. */
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KEEP (*(.fini4)) /* Runtime exit. */
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_etext = .;
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PROVIDE (etext = .);
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} > text
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.eh_frame :
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{
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*(.eh_frame)
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} > text
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.gcc_except_table :
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{
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*(.gcc_except_table)
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} > text
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.rodata :
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{
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*(.rodata)
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*(.rodata.*)
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*(.gnu.linkonce.r*)
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} > text
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.rodata1 :
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{
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*(.rodata1)
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} > text
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/* Constructor and destructor tables are in ROM. */
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.ctors :
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{
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PROVIDE (__CTOR_LIST__ = .);
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KEEP (*(.ctors))
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PROVIDE(__CTOR_END__ = .);
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} > text
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.dtors :
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{
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PROVIDE(__DTOR_LIST__ = .);
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KEEP (*(.dtors))
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PROVIDE(__DTOR_END__ = .);
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} > text
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/* Start of the data section image in ROM. */
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__data_image = .;
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PROVIDE (__data_image = .);
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/* All read-only sections that normally go in PROM must be above.
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We construct the DATA image section in PROM at end of all these
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read-only sections. The data image must be copied at init time.
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Refer to GNU ld, Section 3.6.8.2 Output Section LMA. */
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.data : AT (__data_image)
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{
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__data_section_start = .;
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PROVIDE (__data_section_start = .);
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*(.sdata)
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*(.data)
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*(.data.*)
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*(.data1)
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*(.gnu.linkonce.d.*)
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CONSTRUCTORS
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_edata = .;
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PROVIDE (edata = .);
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} > data
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__data_section_size = SIZEOF(.data);
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PROVIDE (__data_section_size = SIZEOF(.data));
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__data_image_end = __data_image + __data_section_size;
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/* SCz: this does not work yet... This is supposed to force the loading
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of _map_data.o (from libgcc.a) when the .data section is not empty.
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By doing so, this should bring the code that copies the .data section
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from ROM to RAM at init time.
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___pre_comp_data_size = SIZEOF(.data);
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__install_data_sections = ___pre_comp_data_size > 0 ?
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__map_data_sections : 0;
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*/
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/* .install :
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{
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. = _data_image_end;
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} > text */
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/* Relocation for some bss and data sections. */
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.bss :
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{
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__bss_start = .;
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*(.softregs)
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*(.sbss)
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*(.scommon)
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*(.dynbss)
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*(.bss)
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*(.bss.*)
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*(.gnu.linkonce.b.*)
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*(COMMON)
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PROVIDE (_end = .);
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} > data
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__bss_size = SIZEOF(.bss);
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PROVIDE (__bss_size = SIZEOF(.bss));
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/* If the 'vectors_addr' symbol is defined, it indicates the start address
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of interrupt vectors. This depends on the 68HC11 operating mode:
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Addr
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Single chip 0xffc0
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Extended mode 0xffc0
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Bootstrap 0x00c0
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Test 0xbfc0
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In general, the vectors address is 0xffc0. This can be overriden
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with the '-defsym vectors_addr=0xbfc0' ld option.
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Note: for the bootstrap mode, the interrupt vectors are at 0xbfc0 but
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they are redirected to 0x00c0 by the internal PROM. Application's vectors
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must also consist of jump instructions (see Motorola's manual). */
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PROVIDE (_vectors_addr = DEFINED (vectors_addr) ? vectors_addr : 0xffc0);
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.vectors DEFINED (vectors_addr) ? vectors_addr : 0xffc0 :
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{
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KEEP (*(.vectors))
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}
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.excl 0 : { *(.stab.excl) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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/* DWARF debug sections.
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Symbols in the DWARF debugging sections are relative to the beginning
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of the section so we begin them at 0.
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Treatment of DWARF debug section must be at end of the linker
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script to avoid problems when there are undefined symbols. It's necessary
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to avoid that the DWARF section is relocated before such undefined
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symbols are found. */
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/* DWARF 1 */
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.debug 0 : { *(.debug) }
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.line 0 : { *(.line) }
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/* GNU DWARF 1 extensions */
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.debug_srcinfo 0 : { *(.debug_srcinfo) }
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.debug_sfnames 0 : { *(.debug_sfnames) }
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/* DWARF 1.1 and DWARF 2 */
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.debug_aranges 0 : { *(.debug_aranges) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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/* DWARF 2 */
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.debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_line 0 : { *(.debug_line) }
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.debug_frame 0 : { *(.debug_frame) }
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.debug_str 0 : { *(.debug_str) }
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.debug_loc 0 : { *(.debug_loc) }
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.debug_macinfo 0 : { *(.debug_macinfo) }
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}
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