68a9101237
* or1k/Makefile.in: Add libor1k
* or1k/README: New file
* or1k/caches-asm.S: New file
* or1k/exceptions-asm.S: New file
* or1k/exceptions.c: New file
* or1k/impure.c: New file
* or1k/include/or1k-nop.h: New file
* or1k/include/or1k-support.h: New file
* or1k/interrupts-asm.S: New file
* or1k/interrupts.c: New file
* or1k/mmu-asm.S: New file
* or1k/or1k-internals.h: New file
* or1k/or1k_uart.c: New file
* or1k/or1k_uart.h: New file
* or1k/outbyte.S: New file
* or1k/sbrk.c: New file
* or1k/sync-asm.S: New file
* or1k/syscalls.c: New file
* or1k/timer.c: New file
* or1k/util.c: New file
84 lines
2.2 KiB
C
84 lines
2.2 KiB
C
/* or1k_uart.h -- UART definitions for OpenRISC 1000.
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*
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* Copyright (c) 2014 Authors
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*
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* Contributor Stefan Wallentowitz <stefan.wallentowitz@tum.de>
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*
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* The authors hereby grant permission to use, copy, modify, distribute,
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* and license this software and its documentation for any purpose, provided
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* that existing copyright notices are retained in all copies and that this
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* notice is included verbatim in any distributions. No written agreement,
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* license, or royalty fee is required for any of the authorized uses.
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* Modifications to this software may be copyrighted by their authors
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* and need not follow the licensing terms described here, provided that
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* the new terms are clearly indicated on the first page of each file where
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* they apply.
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*/
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/* This is the generic board support for the OpenCores UART device */
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#include <stdint.h>
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#include "board.h"
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extern void (*_or1k_uart_read_cb)(char c);
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void _or1k_uart_interrupt_handler(uint32_t data);
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int _or1k_uart_init(void);
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void _or1k_uart_write(char c);
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#define RB _or1k_board_uart_base + 0
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#define THR _or1k_board_uart_base + 0
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#define IER _or1k_board_uart_base + 1
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#define IIR _or1k_board_uart_base + 2
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#define FCR _or1k_board_uart_base + 2
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#define LCR _or1k_board_uart_base + 3
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#define MCR _or1k_board_uart_base + 4
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#define LSR _or1k_board_uart_base + 5
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#define MSR _or1k_board_uart_base + 6
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#define DLB1 _or1k_board_uart_base + 0
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#define DLB2 _or1k_board_uart_base + 1
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#define IER_RDAI 0
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#define IER_TEI 1
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#define IER_RLSI 2
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#define IER_MSI 3
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#define IIR_RLS 0xC3
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#define IIR_RDA 0xC2
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#define IIR_TO 0xC6
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#define IIR_THRE 0xC1
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#define IIT_MS 0xC0
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#define FCR_CLRRECV 0x1
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#define FCR_CLRTMIT 0x2
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#define FCR_TRIG_1 0x0
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#define FCR_TRIG_4 0x40
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#define FCR_TRIG_8 0x80
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#define FCR_TRIG_14 0xC0
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#define LCR_BPC_MASK 0x3
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#define LCR_SB_MASK 0x4
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#define LCR_BPC_5 0x0
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#define LCR_BPC_6 0x1
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#define LCR_BPC_7 0x2
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#define LCR_BPC_8 0x3
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#define LCR_SB_1 0x0
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#define LCR_SB_2 0x4
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#define LCR_PE 0x8
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#define LCR_EPS 0x10
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#define LCR_SP 0x20
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#define LCR_BC 0x40
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#define LCR_DLA 0x80
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#define LSR_DR 0x0
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#define LSR_OE 0x2
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#define LSR_PE 0x4
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#define LSR_FE 0x8
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#define LSR_BI 0x10
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#define LSR_TFE 0x20
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#define LSR_TEI 0x40
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