24fb7750f3
* bfin/Makefile.in: Add BF60x support. * bfin/basiccrt.S: Add core1 support. * bfin/bf606.ld: New file. * bfin/bf606c0.ld: New file. * bfin/bf606c1.ld: New file. * bfin/bf606m.ld: New file. * bfin/bf607.ld: New file. * bfin/bf607c0.ld: New file. * bfin/bf607c1.ld: New file. * bfin/bf607m.ld: New file. * bfin/bf608.ld: New file. * bfin/bf608c0.ld: New file. * bfin/bf608c1.ld: New file. * bfin/bf608m.ld: New file. * bfin/bf609.ld: New file. * bfin/bf609c0.ld: New file. * bfin/bf609c1.ld: New file. * bfin/bf609m.ld: New file. * bfin/bfin-common-mc0.ld: New file. * bfin/include/cdefBF606.h : New file. * bfin/include/cdefBF607.h : New file. * bfin/include/cdefBF608.h : New file. * bfin/include/cdefBF609.h : New file. * bfin/include/defBF606.h : New file. * bfin/include/defBF607.h : New file. * bfin/include/defBF608.h : New file. * bfin/include/defBF609.h : New file. * bfin/include/sys/_adi_platform.h: Add BF60x support. * bfin/include/sys/anomaly_macros_rtl.h : Clean up.
37 lines
1.6 KiB
Plaintext
37 lines
1.6 KiB
Plaintext
/*
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* The default linker script for standalone executables running on
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* Core 1 of ADSP-BF609 processor (dual core).
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*
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* Copyright (C) 2011 Analog Devices, Inc.
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*
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* The authors hereby grant permission to use, copy, modify, distribute,
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* and license this software and its documentation for any purpose, provided
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* that existing copyright notices are retained in all copies and that this
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* notice is included verbatim in any distributions. No written agreement,
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* license, or royalty fee is required for any of the authorized uses.
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* Modifications to this software may be copyrighted by their authors
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* and need not follow the licensing terms described here, provided that
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* the new terms are clearly indicated on the first page of each file where
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* they apply.
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*/
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MEMORY
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{
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/* These MEM_C1_* are Core A memory region with zero length.
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They just provide dummy memory region to satisfy bfin-common-mc.ld. */
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MEM_C1_L1_CODE : ORIGIN = 0xFFA00000, LENGTH = 0x0
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MEM_C1_L1_CODE_CACHE : ORIGIN = 0xFFA10000, LENGTH = 0x0
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MEM_C1_L1_SCRATCH : ORIGIN = 0xFFB00000, LENGTH = 0x0
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MEM_C1_L1_DATA_B : ORIGIN = 0xFF900000, LENGTH = 0x0
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MEM_C1_L1_DATA_A : ORIGIN = 0xFF800000, LENGTH = 0x0
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MEM_L1_CODE : ORIGIN = 0xFF600000, LENGTH = 0x10000
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MEM_L1_CODE_CACHE : ORIGIN = 0xFF610000, LENGTH = 0x4000
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MEM_L1_SCRATCH : ORIGIN = 0xFF700000, LENGTH = 0x1000
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MEM_L1_DATA_B : ORIGIN = 0xFF500000, LENGTH = 0x8000
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MEM_L1_DATA_A : ORIGIN = 0xFF400000, LENGTH = 0x8000
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MEM_L2 : ORIGIN = 0xC8080000, LENGTH = 0x10000
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MEM_L2_SHARED : ORIGIN = 0xC80A0000, LENGTH = 0x20000
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}
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