b3281dd194
Remove FPU availability check, just use the pre-processor flags to indicicate what the user wanted. * mips/abiflags.S: New file. * mips/regs.S (SR_MSA): Define macro. * mips/mti32.ld: Place .MIPS.abiflags and wrap in marker symbols. * mips/mti64.ld: Likewise. * mips/mti64_64.ld: Likewise. * mips/mti64_n32.ld: Likewise.
317 lines
7.3 KiB
ArmAsm
317 lines
7.3 KiB
ArmAsm
/*
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* crt0.S -- startup file for MIPS.
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*
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* Copyright (c) 1995, 1996, 1997, 2001 Cygnus Support
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*
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* The authors hereby grant permission to use, copy, modify, distribute,
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* and license this software and its documentation for any purpose, provided
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* that existing copyright notices are retained in all copies and that this
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* notice is included verbatim in any distributions. No written agreement,
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* license, or royalty fee is required for any of the authorized uses.
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* Modifications to this software may be copyrighted by their authors
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* and need not follow the licensing terms described here, provided that
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* the new terms are clearly indicated on the first page of each file where
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* they apply.
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*/
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/* This file does not use any floating-point ABI. */
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.gnu_attribute 4,0
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#ifdef __mips16
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/* This file contains 32 bit assembly code. */
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.set nomips16
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#endif
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#include "regs.S"
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#include "abiflags.S"
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/*
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* Set up some room for a stack. We just grab a chunk of memory.
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*/
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#define STACK_SIZE 0x4000
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#define GLOBAL_SIZE 0x2000
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#define STARTUP_STACK_SIZE 0x0100
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/* This is for referencing addresses that are not in the .sdata or
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.sbss section under embedded-pic, or before we've set up gp. */
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#ifdef __mips_embedded_pic
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# ifdef __mips64
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# define LA(t,x) la t,x-PICBASE ; daddu t,s0,t
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# else
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# define LA(t,x) la t,x-PICBASE ; addu t,s0,t
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# endif
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#else /* __mips_embedded_pic */
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# define LA(t,x) la t,x
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#endif /* __mips_embedded_pic */
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.comm __memsize, 12
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.comm __lstack, STARTUP_STACK_SIZE
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.text
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.align 2
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/* Without the following nop, GDB thinks _start is a data variable.
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* This is probably a bug in GDB in handling a symbol that is at the
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* start of the .text section.
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*/
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nop
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.globl hardware_hazard_hook .text
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.globl _start
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.ent _start
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_start:
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#ifdef __mips_embedded_pic
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#define PICBASE start_PICBASE
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.set noreorder
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PICBASE = .+8
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bal PICBASE
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nop
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move s0,$31
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.set reorder
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#endif
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#if __mips<3
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# define STATUS_MASK (SR_CU1|SR_PE)
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#else
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/* Post-mips2 has no SR_PE bit. */
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# ifdef __mips64
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/* Turn on 64-bit addressing and additional float regs. */
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# define STATUS_MASK (SR_CU1|SR_FR|SR_KX|SR_SX|SR_UX)
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# else
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# if __mips_fpr==32
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# define STATUS_MASK (SR_CU1)
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# else
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/* Turn on additional float regs. */
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# define STATUS_MASK (SR_CU1|SR_FR)
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# endif
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# endif
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#endif
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/* Clear Cause register. */
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mtc0 zero,C0_CAUSE
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nop
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/* Read MIPS_abiflags structure and set status/config registers
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accordingly. */
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.weak __MIPS_abiflags_start
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.weak __MIPS_abiflags_end
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LA (t0,__MIPS_abiflags_start)
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LA (t1,__MIPS_abiflags_end)
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addiu t1,t1,-24
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move v0,zero /* Mask for C0_SR. */
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/* Branch to 1f is the .MIPS.abiflags section is not 24 bytes. This
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indicates it is either missing or corrupt. */
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bne t0,t1,1f
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/* Check isa_level. */
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lbu t1,ABIFlags_isa_level(t0)
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sltu v1,t1,3 /* Is MIPS < 3? */
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xori t1,t1,64 /* Is MIPS64? */
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beq v1,zero,4f
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li v1,SR_PE
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or v0,v0,v1 /* Enable soft reset. */
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4:
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li v1,(SR_KX|SR_SX|SR_UX)
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bne t1,zero,5f
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or v0,v0,v1 /* Enable extended addressing. */
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5:
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/* Check fp_abi. */
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lbu t1,ABIFlags_fp_abi(t0)
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xori t1,t1,Val_GNU_MIPS_ABI_FP_SOFT
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li v1,SR_CU1
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beq t1,zero,2f /* Skip MSA and cpr1_size checks. */
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or v0,v0,v1 /* Enable co-processor 1. */
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/* Check cpr1_size. */
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lbu t1,ABIFlags_cpr1_size(t0)
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xori t1,t1,AFL_REG_64
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li v1,SR_FR
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bne t1,zero,3f
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or v0,v0,v1 /* Enable 64-bit FPU registers. */
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3:
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/* Check ases. */
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lw t1,ABIFlags_ases(t0)
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andi t1,t1,AFL_ASE_MSA
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li v1,SR_FR
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beq t1,zero,2f
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or v0,v0,v1 /* Enable 64-bit FPU registers. */
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li v1,SR_MSA
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.set push
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.set mips32
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mtc0 v1,C0_CONFIG,5 /* Enable MSA. */
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.set pop
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b 2f
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1:
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/* MIPS_abiflags structure is not available. Set status/config
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registers based on flags defined by compiler. */
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#ifdef __mips_soft_float
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li v0,(STATUS_MASK-(STATUS_MASK & SR_CU1))
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#else
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li v0,STATUS_MASK
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#endif
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2:
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/* Set C0_SR, */
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mtc0 v0,C0_SR
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nop
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/* Avoid hazard from C0_SR changes. */
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LA (t0, hardware_hazard_hook)
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beq t0,zero,2f
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jalr t0
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2:
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/* Fix high bits, if any, of the PC so that exception handling doesn't get
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confused. */
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LA (v0, 3f)
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jr v0
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3:
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LA (gp, _gp) # set the global data pointer
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.end _start
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/*
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* zero out the bss section.
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*/
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.globl __memsize
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.globl get_mem_info .text
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.globl __stack
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.globl __global
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.ent zerobss
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zerobss:
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LA (v0, _fbss)
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LA (v1, _end)
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beq v0,v1,2f
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1:
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addiu v0,v0,4
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sw zero,-4(v0)
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bne v0,v1,1b
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2:
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la t0, __lstack # make a small stack so we
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addiu sp, t0, STARTUP_STACK_SIZE # can run some C code
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la a0, __memsize # get the usable memory size
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jal get_mem_info
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/* setup the stack pointer */
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LA (t0, __stack) # is __stack set ?
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bne t0,zero,4f
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/* NOTE: a0[0] contains the amount of memory available, and
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not the last memory address. */
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la a0, __memsize
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lw t0,0(a0) # last address of memory available
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la t1,K0BASE # cached kernel memory
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addu t0,t0,t1 # get the end of memory address
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/* Allocate 32 bytes for the register parameters. Allocate 16
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bytes for a null argv and envp. Round the result up to 64
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bytes to preserve alignment. */
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subu t0,t0,64
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4:
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move sp,t0 # set stack pointer
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.end zerobss
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/*
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* initialize target specific stuff. Only execute these
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* functions it they exist.
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*/
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.globl hardware_init_hook .text
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.globl software_init_hook .text
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.type _fini,@function
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.type _init,@function
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.globl atexit .text
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.globl exit .text
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.ent init
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init:
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LA (t9, hardware_init_hook) # init the hardware if needed
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beq t9,zero,6f
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jalr t9
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6:
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LA (t9, software_init_hook) # init the hardware if needed
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beq t9,zero,7f
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jalr t9
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7:
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LA (a0, _fini)
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jal atexit
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#ifdef GCRT0
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.globl _ftext
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.globl _extext
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LA (a0, _ftext)
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LA (a1, _etext)
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jal monstartup
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#endif
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jal _init # run global constructors
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addiu a1,sp,32 # argv = sp + 32
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addiu a2,sp,40 # envp = sp + 40
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#if __mips64
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sd zero,(a1) # argv[argc] = 0
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sd zero,(a2) # envp[0] = 0
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#else
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sw zero,(a1)
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sw zero,(a2)
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#endif
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move a0,zero # set argc to 0
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jal main # call the program start function
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# fall through to the "exit" routine
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move a0,v0 # pass through the exit code
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jal exit # call libc exit to run the G++
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# destructors
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.end init
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/* Assume the PICBASE set up above is no longer valid below here. */
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#ifdef __mips_embedded_pic
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#undef PICBASE
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#endif
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/*
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* _exit -- Exit from the application. Normally we cause a user trap
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* to return to the ROM monitor for another run. NOTE: This is
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* the only other routine we provide in the crt0.o object, since
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* it may be tied to the "_start" routine. It also allows
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* executables that contain a complete world to be linked with
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* just the crt0.o object.
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*/
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.globl hardware_exit_hook .text
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.globl _exit
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.ent _exit
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_exit:
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7:
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#ifdef __mips_embedded_pic
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/* Need to reinit PICBASE, since we might be called via exit()
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rather than via a return path which would restore old s0. */
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#define PICBASE exit_PICBASE
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.set noreorder
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PICBASE = .+8
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bal PICBASE
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nop
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move s0,$31
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.set reorder
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#endif
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#ifdef GCRT0
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LA (t0, _mcleanup)
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jalr t0
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#endif
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LA (t0, hardware_exit_hook)
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beq t0,zero,1f
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jalr t0
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1:
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# break instruction can cope with 0xfffff, but GAS limits the range:
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break 1023
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b 7b # but loop back just in-case
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.end _exit
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/* Assume the PICBASE set up above is no longer valid below here. */
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#ifdef __mips_embedded_pic
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#undef PICBASE
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#endif
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/* EOF crt0.S */
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