205 lines
5.0 KiB
ArmAsm
205 lines
5.0 KiB
ArmAsm
/* Copyright (c) 2008, 2009, 2011 Red Hat Incorporated.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions
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are met:
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Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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The name of Red Hat Incorporated may not be used to endorse
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or promote products derived from this software without specific
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prior written permission.
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This software is provided by the copyright holders and contributors
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"AS IS" and any express or implied warranties, including, but not
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limited to, the implied warranties of merchantability and fitness for
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a particular purpose are disclaimed. In no event shall Red Hat
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incorporated be liable for any direct, indirect, incidental, special,
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exemplary, or consequential damages (including, but not limited to,
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procurement of substitute goods or services; loss of use, data, or
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profits; or business interruption) however caused and on any theory of
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liability, whether in contract, strict liability, or tort (including
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negligence or otherwise) arising in any way out of the use of this
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software, even if advised of the possibility of such damage. */
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.text
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.global _start
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_start:
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.LFB2:
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mvtc #0, psw
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/* Enable the DN bit - this should have been done for us by
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the CPU reset, but it is best to make sure for ourselves. */
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mvtc #0x100, fpsw
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mov #__stack, r0
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mvtc #__vectors, intb
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/* Copy the .data section from ROM into RAM. */
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mov #__datastart, r1
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mov #__romdatastart, r2
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mov #__romdatacopysize, r3
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#ifdef __RX_DISALLOW_STRING_INSNS__
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cmp #0, r3
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beq 2f
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1: mov.b [r2+], r5
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mov.b r5, [r1+]
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sub #1, r3
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bne 1b
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2:
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#else
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smovf
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#endif
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/* Initialise the contents of the .bss section. */
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mov #__bssstart, r1
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mov #0, r2
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mov #__bsssize, r3
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sstr.l
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/* Initialize data pointer register(s).
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Note: The registers used here should agree with the definition of
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GP_BASE_REGNUM in gcc/config/rx/rx.h.
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Note: We are assuming that -mint-register has not been used when
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compiling the application. */
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#ifdef _RX_PID
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/* Initialise the constant data pointer and small data pointers. */
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mov #__pid_base, r13
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mov #__gp, r12
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#else
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/* Initialise the small data area pointer. */
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mov #__gp, r13
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#endif
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bsr.a __rx_init
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#ifdef PROFILE_SUPPORT /* Defined in gcrt0.S. */
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mov # _start, r1
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mov # _etext, r2
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bsr.a __monstartup
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#endif
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mov #0, r1 /* argc */
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mov #0, r2 /* argv */
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mov #0, r3 /* envv */
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bsr.a _main
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.LFE2:
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#ifdef PROFILE_SUPPORT
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mov r1, r13 ; Save return code.
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bsr.a __mcleanup
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mov r13, r1
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#endif
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bsr.a _exit
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.global _rx_run_preinit_array
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.type _rx_run_preinit_array,@function
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_rx_run_preinit_array:
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mov #__preinit_array_start,r1
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mov #__preinit_array_end,r2
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bra.a _rx_run_inilist
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.global _rx_run_init_array
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.type _rx_run_init_array,@function
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_rx_run_init_array:
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mov #__init_array_start,r1
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mov #__init_array_end,r2
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mov #4, r3
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bra.a _rx_run_inilist
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.global _rx_run_fini_array
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.type _rx_run_fini_array,@function
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_rx_run_fini_array:
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mov #__fini_array_start,r2
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mov #__fini_array_end,r1
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mov #-4, r3
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/* fall through */
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_rx_run_inilist:
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next_inilist:
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cmp r1,r2
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beq.b done_inilist
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mov.l [r1],r4
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cmp #-1, r4
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beq.b skip_inilist
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cmp #0, r4
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beq.b skip_inilist
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pushm r1-r3
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jsr r4
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popm r1-r3
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skip_inilist:
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add r3,r1
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bra.b next_inilist
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done_inilist:
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rts
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.section .init,"ax"
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.global __rx_init
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__rx_init:
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.section .fini,"ax"
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.global __rx_fini
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__rx_fini:
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bsr.a _rx_run_fini_array
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.section .rodata
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.balign 4
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.global __pid_base
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.weak __pid_base
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__pid_base:
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.section .sdata
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.balign 4
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.global __gp
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.weak __gp
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__gp:
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.section .data
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.global ___dso_handle
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.weak ___dso_handle
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___dso_handle:
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.long 0
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;;; Provide Dwarf unwinding information that will help GDB stop
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;;; backtraces at the right place. This is stolen from assembly
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;;; code generated by GCC with -dA.
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.section .debug_frame,"",@progbits
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.Lframe0:
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.4byte .LECIE0-.LSCIE0 ; Length of Common Information Entry
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.LSCIE0:
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.4byte 0xffffffff ; CIE Identifier Tag
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.byte 0x1 ; CIE Version
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.ascii "\0" ; CIE Augmentation
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.uleb128 0x1 ; CIE Code Alignment Factor
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.sleb128 -1 ; CIE Data Alignment Factor
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.byte 0xd ; CIE RA Column
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.byte 0xc ; DW_CFA_def_cfa
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.uleb128 0xc
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.uleb128 0x3
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.byte 0x8d ; DW_CFA_offset, column 0xd
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.uleb128 0x3
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.p2align 2
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.LECIE0:
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.LSFDE0:
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.4byte .LEFDE0-.LASFDE0 ; FDE Length
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.LASFDE0:
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.4byte .Lframe0 ; FDE CIE offset
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.4byte .LFB2 ; FDE initial location
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.4byte .LFE2-.LFB2 ; FDE address range
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.byte 0xf ; DW_CFA_def_cfa_expression
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.uleb128 1 ; length of expression
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.byte 0x30 ; DW_OP_lit0
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.p2align 2
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.LEFDE0:
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.text
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