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2 Commits

Author SHA1 Message Date
Sandra Loosemore c4c6140463 Add a dummy interrupt handler to nios2 crt0.s. 
The location of the handler at offset 0x20 from the start of memory,
immediately after the 32-byte reset vector, matches the expectations
of real hardware (e.g., a 3c120 board).
 2019-04-03 18:02:47 +02:00
Sandra Loosemore fddc74d12b Add BSP and semihosting library for nios2-generic-nommu QEMU emulation. 2018-08-08 10:53:03 +02:00