Commit Graph

10 Commits

Author SHA1 Message Date
Jason Eckhardt 4f0b39d421 include/opcode/ChangeLog:
2003-08-16  Jason Eckhardt  <jle@rice.edu>

        * i860.h (fmov.ds): Expand as famov.ds.
        (fmov.sd): Expand as famov.sd.
        (pfmov.ds): Expand as pfamov.ds.

gas/testsuite/ChangeLog:
2003-08-16  Jason Eckhardt  <jle@rice.edu>

        * gas/i860/pseudo-ops01.{s,d}: New files.
        * gas/i860/i860.exp: Execute the new test above.
        * gas/i860/README.i860: Mention that pseudo-ops need more testing
        and remove the align fill defect from the list.
2003-08-17 03:16:23 +00:00
Jason Eckhardt a82fd8b94e 2003-05-23 Jason Eckhardt <jle@rice.edu>
gas:
        * config/tc-i860.c (target_xp): Declare variable.
        (OPTION_XP): Declare macro.
        (md_longopts): Add option -mxp.
        (md_parse_option): Set target_xp.
        (md_show_usage): Add -mxp usage.
        (i860_process_insn): Recognize XP registers bear, ccr, p0-p3.
        (md_assemble): Don't try expansions if XP_ONLY is set.
        * doc/c-i860.texi: Document -mxp option.

gas/testsuite:
        * gas/i860/xp.s: New file.
        * gas/i860/xp.d: New file.

include/opcode:
        * i860.h (expand_type): Add XP_ONLY.
        (scyc.b): New XP instruction.
        (ldio.l): Likewise.
        (ldio.s): Likewise.
        (ldio.b): Likewise.
        (ldint.l): Likewise.
        (ldint.s): Likewise.
        (ldint.b): Likewise.
        (stio.l): Likewise.
        (stio.s): Likewise.
        (stio.b): Likewise.
        (pfld.q): Likewise.

opcodes:
        * i860-dis.c (crnames): Add bear, ccr, p0, p1, p2, p3.
        (print_insn_i860): Grab 4 bits of the control register field
        instead of 3.
2003-05-24 04:22:23 +00:00
Jason Eckhardt 3a9c82d011 2003-05-20 Jason Eckhardt <jle@rice.edu>
opcode/i860.h (flush): Set lower 3 bits properly and use 'L'
        for the immediate operand type instead of 'i'.
2003-05-21 05:06:49 +00:00
Jason Eckhardt 4c394c394e 2003-05-20 Jason Eckhardt <jle@rice.edu>
opcode/i860.h (fzchks): Both S and R bits must be set.
        (pfzchks): Likewise.
        (faddp): Likewise.
        (pfaddp): Likewise.
        (fix.ss): Remove (invalid instruction).
        (pfix.ss): Likewise.
        (ftrunc.ss): Likewise.
        (pftrunc.ss): Likewise.
2003-05-21 02:06:40 +00:00
Jason Eckhardt de54768d72 2003-05-18 Jason Eckhardt <jle@rice.edu>
gas:
        * config/tc-i860.c (i860_process_insn): Initialize fc after
        each opcode mismatch.

include/opcode:
        * i860.h (form, pform): Add missing .dd suffix.

opcodes:
        * i860-dis.c (print_insn_i860): Instruction shrd has a dual bit,
        print it.

bfd:
        * elf32-i860.c (elf32_i860_relocate_highadj): Simplify calculation.
2003-05-18 21:24:32 +00:00
Klee Dienes 2b92bf13ea 2002-11-18 Klee Dienes <kdienes@apple.com>
* arc.h (arc_ext_opcodes): Declare as extern.
	(arc_ext_operands): Declare as extern.
	* i860.h (i860_opcodes): Declare as const.

2002-11-18  Klee Dienes  <kdienes@apple.com>

	* arc-opc.c (arc_ext_opcodes): Define.
	(arc_ext_operands): Define.
	* i386-dis.c (Suffix3DNow): Declare as const.
	* arm-opc.h (arm_opcodes): Declare as const.
	(thumb_opcodes): Declare as const.
	* h8500-opc.h (h8500_table): Declare as const.
	(h8500_table): Use a NULL for the opcode in the terminator, so
	that code testing (opcode->name) behaves correctly.
	* mcore-opc.h (mcore_table): Declare as const.
	* sh-opc.h (sh_table): Declare as const.
	* w65-opc.h (optable): Declare as const.
	* z8k-opc.h (z8k_table): Declare as const.
2002-11-18 16:49:56 +00:00
Nick Clifton c77e3e5481 Fix typos in ChangeLogs; add coff/external.h; fix copyright dates 2001-03-14 02:27:44 +00:00
Jason Eckhardt ff3d99fb37 gas:
2000-08-08  Jason Eckhardt  <jle@cygnus.com>

	* config/tc-i860.h: Rework completely for BFD_ASSEMBLER.
	(i860_fix_info): New enum.
	(MD_APPLY_FIX3): Define.
	(WORKING_DOT_WORD): Define.
	(TC_HANDLES_FX_DONE): Define.
	(DIFF_EXPR_OK): Define.
	(LISTING_HEADER): Define.
	(TARGET_FORMAT): Select target format based on endian flag.
	(TARGET_BYTES_BIG_ENDIAN): Default to little endian.
	(target_big_endian): Add external declaration.

	* config/tc-i860.c: All existing code reworked completely. Other
	new code shown below.
	(SYNTAX_SVR4): Define.
	(target_warn_expand): New variable.
	(md_shortopts): Declare and define (-Qy, -Qn, and -V options).
	(md_longopts): Declare and define with new options (-EL, -EB,
	and -mwarn-expand).
	(md_show_usage): New function.
	(md_operand): New function.
	(obtain_reloc_for_imm16): New function.
	(md_apply_fix3): New function.
	(tc_gen_reloc): New function.

include:
2000-08-08  Jason Eckhardt  <jle@cygnus.com>

	* opcode/i860.h: Small formatting adjustments.

opcode:
2000-08-08  Jason Eckhardt  <jle@cygnus.com>

	* i860-dis.c (print_br_address): Change third argument from int
	to long.

bfd:
2000-08-08  Jason Eckhardt  <jle@cygnus.com>
	* elf32-i860.c (elf32_i860_howto_table): Updated some fields.
2000-08-09 03:33:41 +00:00
Jason Eckhardt 4f34f5c30e 2000-07-22 Jason Eckhardt <jle@cygnus.com>
* include/opcode/i860.h (btne, bte, bla): Changed these opcodes
	to use sbroff ('r') instead of split16 ('s').
	(J, K, L, M): New operand types for 16-bit aligned fields.
	(ld.x, {p}fld.x, fst.x, pst.d): Changed these opcodes to
	use I, J, K, L, M instead of just I.
	(T, U): New operand types for split 16-bit aligned fields.
	(st.x): Changed these opcodes to use S, T, U instead of just S.
	(andh, andnoth, orh, xorh): Deleted 3-register forms as they do not
	exist on the i860.
	(pfgt.sd, pfle.sd): Deleted these as they do not exist on the i860.
	(pfeq.ss, pfeq.dd): New opcodes.
	(st.s): Fixed incorrect mask bits.
	(fmlow): Fixed incorrect mask bits.
	(fzchkl, pfzchkl): Fixed incorrect mask bits.
	(faddz, pfaddz): Fixed incorrect mask bits.
	(form, pform): Fixed incorrect mask bits.
	(pfld.l): Fixed incorrect mask bits.
	(fst.q): Fixed incorrect mask bits.
	(all floating point opcodes): Fixed incorrect mask bits for
	handling of dual bit.

	* include/elf/i860.h: New file.
	(elf_i860_reloc_type): Defined ELF32 i860 relocations.

	* bfd/cpu-i860.c: Added comments.

	* bfd/elf32-i860.c (TARGET_LITTLE_SYM): Defined to
	bfd_elf32_i860_little_vec.
	(TARGET_LITTLE_NAME): Defined to "elf32-i860-little".
	(ELF_MAXPAGESIZE): Changed to 4096.

	* bfd/targets.c (bfd_elf32_i860_little_vec): Declaration of
	new target.
	(bfd_target_vector): Added bfd_elf32_i860_little_vec.

	* bfd/config.bfd (i860-stardent-sysv4*, i860-stardent-elf*): Added
	config for little endian elf32 i860.
	(targ_defvec): Define for the new config above
	as "bfd_elf32_i860_little_vec".
	(targ_selvecs): Define for the new config above
	as "bfd_elf32_i860_vec bfd_elf32_i860_little_vec"

	* bfd/configure.in (bfd_elf32_i860_little_vec): Added recognition
	of new target vec.

	* bfd/configure: Regenerated.

	* opcodes/i860-dis.c: New file.
	(print_insn_i860): New function.
	(print_br_address): New function.
	(sign_extend): New function.
	(BITWISE_OP): New macro.
	(I860_REG_PREFIX): New macro.
	(grnames, frnames, crnames): New structures.

	* opcodes/disassemble.c (ARCH_i860): Define.
	(disassembler): Add check for bfd_arch_i860 to set disassemble
	function to print_insn_i860.

	* include/dis-asm.h (print_insn_i860): Add prototype.

	* opcodes/Makefile.in (CFILES): Added i860-dis.c.
	(ALL_MACHINES): Added i860-dis.lo.
	(i860-dis.lo): New dependences.

	* opcodes/configure.in: New bits for bfd_i860_arch.

	* opcodes/configure: Regenerated.
2000-07-28 21:10:20 +00:00
Richard Henderson a3acbf4694 19990502 sourceware import 1999-05-03 07:29:06 +00:00