2 Commits

Author	SHA1	Message	Date
Jeff Johnston	132030fcf2	Fix interrupt handling for or1k. ... - During interrupt handling the PICSR, table pointers and current interrupt line have been saved in incorrect registers and/or stored on the stack. - Save the pointer in r16/r18, PICSR in r20 and the current interrupt line in r22. Those are callee-saved registers, so that the register values will be preserved. * or1k/interruts-asm.S: Change registers to callee-saved.	2015-05-27 13:30:19 +02:00
Jeff Johnston	68a9101237	2014-12-15 Stefan Wallentowitz <stefan.wallentowitz@tum.de> ... * or1k/Makefile.in: Add libor1k * or1k/README: New file * or1k/caches-asm.S: New file * or1k/exceptions-asm.S: New file * or1k/exceptions.c: New file * or1k/impure.c: New file * or1k/include/or1k-nop.h: New file * or1k/include/or1k-support.h: New file * or1k/interrupts-asm.S: New file * or1k/interrupts.c: New file * or1k/mmu-asm.S: New file * or1k/or1k-internals.h: New file * or1k/or1k_uart.c: New file * or1k/or1k_uart.h: New file * or1k/outbyte.S: New file * or1k/sbrk.c: New file * or1k/sync-asm.S: New file * or1k/syscalls.c: New file * or1k/timer.c: New file * or1k/util.c: New file	2014-12-15 20:17:39 +00:00