ad767835c9
bfd/
...
* elflink.h (elf_link_add_object_symbols): Use !info->executable
instead of info->shared where appropriate.
(bfd_elfNN_size_dynamic_sections, elf_link_output_extsym): Likewise.
* elflink.c (_bfd_elf_create_got_section): Likewise.
(_bfd_elf_link_create_dynamic_sections): Likewise.
(_bfd_elf_link_assign_sym_version): Likewise.
* elf32-i386.c (elf_i386_size_dynamic_sections): Create .interp section
and DT_DEBUG dynamic tag even for position independent executables.
* elf32-ppc.c (ppc_elf_size_dynamic_sections): Likewise.
* elf32-s390.c (elf_s390_size_dynamic_sections: Likewise.
* elf64-ppc.c (ppc64_elf_size_dynamic_sections: Likewise.
* elf64-s390.c (elf_s390_size_dynamic_sections: Likewise.
* elf64-x86-64.c (elf64_x86_64_size_dynamic_sections: Likewise.
* elfxx-ia64.c (elfNN_ia64_size_dynamic_sections: Likewise.
* elf32-sparc.c (elf32_sparc_size_dynamic_sections: Likewise.
* elf64-alpha.c (elf64_alpha_size_dynamic_sections: Likewise.
* elf64-sparc.c (sparc64_elf_size_dynamic_sections: Likewise.
include/
* bfdlink.h (struct bfd_link_info): Add pie and executable
bits.
ld/
* lexsup.c (OPTION_PIE): Define.
(ld_options): Add -pie and --pic-executable options.
(parse_args): Handle OPTION_PIE.
* ldmain.c (main): Initialize link_info.pie and
link_info.executable.
* genscripts.sh: Generate PIE scripts.
* ld.texinfo: Document -pie and --pic-executable options.
* emultempl/elf32.em (gld${EMULATION_NAME}_after_open):
(gld${EMULATION_NAME}_place_orphan): Likewise.
(gld${EMULATION_NAME}_get_script): Include PIE scripts.
* scripttempl/elf.sc: In PIE scripts set . the same way as in
shared scripts.
* emulparams/elf_i386.sh (GENERATE_PIE_SCRIPT): Set to yes.
* emulparams/elf64_ia64.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf32ppc.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf64ppc.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf_x86_64.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf_s390.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf32_sparc.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf64_sparc.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf64alpha.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf64_s390.sh (GENERATE_PIE_SCRIPT): Likewise.
* emulparams/elf_i386.sh (GENERATE_PIE_SCRIPT): Likewise.
2003-05-30 15:50:11 +00:00
a82fd8b94e
2003-05-23 Jason Eckhardt <jle@rice.edu>
...
gas:
* config/tc-i860.c (target_xp): Declare variable.
(OPTION_XP): Declare macro.
(md_longopts): Add option -mxp.
(md_parse_option): Set target_xp.
(md_show_usage): Add -mxp usage.
(i860_process_insn): Recognize XP registers bear, ccr, p0-p3.
(md_assemble): Don't try expansions if XP_ONLY is set.
* doc/c-i860.texi: Document -mxp option.
gas/testsuite:
* gas/i860/xp.s: New file.
* gas/i860/xp.d: New file.
include/opcode:
* i860.h (expand_type): Add XP_ONLY.
(scyc.b): New XP instruction.
(ldio.l): Likewise.
(ldio.s): Likewise.
(ldio.b): Likewise.
(ldint.l): Likewise.
(ldint.s): Likewise.
(ldint.b): Likewise.
(stio.l): Likewise.
(stio.s): Likewise.
(stio.b): Likewise.
(pfld.q): Likewise.
opcodes:
* i860-dis.c (crnames): Add bear, ccr, p0, p1, p2, p3.
(print_insn_i860): Grab 4 bits of the control register field
instead of 3.
2003-05-24 04:22:23 +00:00
40aa85f9c5
Fix typo "ink" instead of "link"
2003-05-21 09:09:37 +00:00
3a9c82d011
2003-05-20 Jason Eckhardt <jle@rice.edu>
...
opcode/i860.h (flush): Set lower 3 bits properly and use 'L'
for the immediate operand type instead of 'i'.
2003-05-21 05:06:49 +00:00
4c394c394e
2003-05-20 Jason Eckhardt <jle@rice.edu>
...
opcode/i860.h (fzchks): Both S and R bits must be set.
(pfzchks): Likewise.
(faddp): Likewise.
(pfaddp): Likewise.
(fix.ss): Remove (invalid instruction).
(pfix.ss): Likewise.
(ftrunc.ss): Likewise.
(pftrunc.ss): Likewise.
2003-05-21 02:06:40 +00:00
b0f5999383
.
2003-05-21 00:55:28 +00:00
98e6de0772
2003-05-15 Roland McGrath <roland@redhat.com>
...
* common.h (NT_AUXV, AT_*): New macros.
* external.h (Elf32_External_Auxv, Elf64_External_Auxv): New types.
* internal.h (Elf_Internal_Auxv): New type.
2003-05-21 00:55:15 +00:00
de54768d72
2003-05-18 Jason Eckhardt <jle@rice.edu>
...
gas:
* config/tc-i860.c (i860_process_insn): Initialize fc after
each opcode mismatch.
include/opcode:
* i860.h (form, pform): Add missing .dd suffix.
opcodes:
* i860-dis.c (print_insn_i860): Instruction shrd has a dual bit,
print it.
bfd:
* elf32-i860.c (elf32_i860_relocate_highadj): Simplify calculation.
2003-05-18 21:24:32 +00:00
9cf346e11a
2003-05-14 Michael Snyder <msnyder@redhat.com>
...
From Bernd Schmidt <bernds@redhat.com>
* h8.h (E_H8_MACH_H8300SX): New.
2003-05-16 23:40:08 +00:00
ac5e8cb29c
libiberty/ChangeLog:
...
2003-05-14 Jim Blandy <jimb@redhat.com>
* hex.c (_hex_value): Make this unsigned.
(hex_value): Update documentation for new return type. hex_value
now expands to an unsigned int expression, to avoid unexpected
sign extension when we store it in a bfd_vma, which is larger than
int on some platforms.
* functions.texi: Regenerated.
include/ChangeLog:
2003-05-14 Jim Blandy <jimb@redhat.com>
* libiberty.h (hex_value): Make the value an unsigned int, to
avoid unexpected sign-extension when cast to unsigned types larger
than int --- like bfd_vma, on some platforms.
(_hex_value): Update declaration.
2003-05-15 19:08:25 +00:00
e655bfb1c0
* m68hc11.h (M68HC12_BANK_VIRT): Define to 0x010000
2003-05-13 19:28:14 +00:00
8bdd7abed5
* xtensa-isa-internal.h (xtensa_isa_module_struct): Remove const on
...
gen_num_opcodes_fn return type.
2003-05-09 11:36:09 +00:00
964e8f75bd
s/burtle/iterative
2003-05-07 20:30:13 +00:00
4c8abaa353
Index: gdb/ChangeLog
...
2003-05-07 Andrew Cagney <cagney@redhat.com>
* d10v-tdep.c (remote_d10v_translate_xfer_address): Add
"regcache".
(d10v_print_registers_info): Update.
(d10v_dmap_register, d10v_imap_register): Delete functions.
(struct gdbarch_tdep): Add "regcache" parameter to "dmap_register"
and "imap_register".
(d10v_ts2_dmap_register, d10v_ts2_imap_register): Add "regcache".
(d10v_ts3_dmap_register, d10v_ts3_imap_register): Add "regcache".
* arch-utils.c (generic_remote_translate_xfer_address): Add
"regcache" and "gdbarch" parameters.
* gdbarch.sh (REMOTE_TRANSLATE_XFER_ADDRESS): Add "regcache"
parameter. Change class to multi-arch.
* gdbarch.h, gdbarch.c: Re-generate.
* remote.c (remote_xfer_memory): Use
gdbarch_remote_translate_xfer_address.
Index: include/gdb/ChangeLog
2003-05-07 Andrew Cagney <cagney@redhat.com>
* sim-d10v.h (sim_d10v_translate_addr): Add regcache parameter.
(sim_d10v_translate_imap_addr): Add regcache parameter.
(sim_d10v_translate_dmap_addr): Ditto.
Index: sim/d10v/ChangeLog
2003-05-07 Andrew Cagney <cagney@redhat.com>
* interp.c (sim_d10v_translate_addr): Add "regcache" parameter.
(sim_d10v_translate_imap_addr): Ditto.
(sim_d10v_translate_dmap_addr): Ditto.
(xfer_mem): Pass NULL regcache to sim_d10v_translate_addr.
(dmem_addr): Pass NULL regcache to sim_d10v_translate_dmap_addr.
(dmap_register, imap_register): Add "regcache" parameter.
(imem_addr): Pass NULL regcache to sim_d10v_translate_imap_addr.
(sim_fetch_register): Pass NULL regcache to imap_register and
dmap_register.
2003-05-07 19:21:13 +00:00
f996c00b60
libiberty/
...
* hashtab.c (burtle_hash): New fn.
* configure.in: Add AC_C_BIGENDIAN_CROSS.
* aclocal.m4: Include accross.m4.
* configure, config.in: Regenerate.
include/
* hashtab.h (burtle_hash): Prototype.
(burtle_hash_object): New macro.
2003-05-07 18:06:23 +00:00
aa41823ffc
bfd/
...
2003-04-28 H.J. Lu <hjl@gnu.org>
* elfxx-ia64.c (elfNN_ia64_relax_section): Relax ldxmov during
the relax finalize pass.
* section.c (struct sec): Add need_finalize_relax and remove
flag11.
(STD_SECTION): Update struct sec initializer.
* bfd-in2.h: Regenerated.
include/
2003-04-28 H.J. Lu <hjl@gnu.org>
* bfdlink.h (bfd_link_info): Add relax_finalizing.
ld/
2003-04-28 H.J. Lu <hjl@gnu.org>
* ldlang.c (lang_process): Add the relax finalize pass.
* ldmain.c (main): Initialize link_info.relax_finalizing to
FALSE.
2003-04-29 01:53:45 +00:00
71853f09cc
Add support for h8300hn and h8300sn
2003-04-24 12:36:08 +00:00
480fa852f4
include/
...
* bfdlink.h (bfd_link_callbacks): Add error_handler.
ld/
* ldmain.c (link_callbacks): Initialize error_handler.
* ldmisc.c (error_handler): New function.
* ldmisc.h (error_handler): New prototype.
2003-04-24 01:43:33 +00:00
93749c21f1
bfd:
...
* archures.c (enum bfd_architecture): Amend comment to refer to SuperH.
* cpu-sh.c: Likewise.
* elf32-sh.c: Likewise.
* reloc.c (bfd_reloc_code_real): Likewise.
* elf32-sh64-com.c: Change comment to refer to SuperH.
* elf32-sh64.c: Likewise.
* elf64-sh64.c: Likewise.
* bfd-in2.h (enum bfd_architecture): Regenerate.
binutils:
* readelf.c (get_machine_name) <EM_SH>: Amend return value
to refer to SuperH.
gas:
* config/tc-sh.c: Amend comment to refer to SuperH.
* config/tc-sh.h: Likewise.
(LISTING_HEADER): Amend to refer to SuperH.
* config/tc-sh64.c: Change comment to refer to SuperH.
* config/tc-sh64.h (LISTING_HEADER): Change to refer to SuperH.
* doc/as.texinfo [SH, GENERIC]: Amend / Change to refer to SuperH.
* doc/c-sh.texi: Amend to refer to SuperH.
Add SuperH architecture documentation references.
* doc/c-sh64.texi: Change to refer to SuperH.
include/elf:
* common.h (EM_SH): Amend comment to refer to SuperH.
ld/testsuite:
* ld-sh/sh64/crange3-cmpct.rd (Machine): Change to refer to SuperH.
* ld-sh/sh64/crange3-media.rd (Machine): Likewise.
2003-04-23 21:09:04 +00:00
afef487c7d
Replace references to Mitsubishi M32R with references to Renesas M32R.
2003-04-22 16:21:18 +00:00
ded6339b7e
Replace occurrances of 'Hitachi' with 'Renesas'.
2003-04-15 08:51:53 +00:00
01620aa250
2003-04-07 Michael Snyder <msnyder@redhat.com>
...
* h8300.h (ldc/stc): Fix up src/dst swaps.
2003-04-13 16:50:31 +00:00
774d9e8282
* mips.h: Correct comment typo.
2003-04-09 00:12:24 +00:00
5557a0dace
Namespace cleanup for the tic4x target. Replace s/c4x/tic4x/ and s/c3x/tic3x/. 2003 copyright update
2003-04-04 08:15:15 +00:00
15fd016389
* xtensa-config.h: Remove comment indicating that this is a
...
generated file.
2003-04-02 16:55:26 +00:00
5340a2ed6d
Add Xtensa port
2003-04-01 15:50:31 +00:00
4663241541
Fixes for iWMMXt contribution.
2003-04-01 13:08:06 +00:00
82935b4237
Add iWMMXt support to ARM simulator
2003-03-27 17:13:33 +00:00
b2b9de805f
Add iWMMXt support
2003-03-25 20:56:01 +00:00
a13b67a6d6
* s390.h (s390_opcode_arch_val): Rename to s390_opcode_mode_val.
...
(S390_OPCODE_ESAME): Rename to S390_OPCODE_ZARCH.
(s390_opcode): Remove architecture. Add modes and min_cpu.
2003-03-21 13:26:21 +00:00
50b9d1a8f1
Add Cirrus Maverick support to arm simulator
2003-03-20 12:25:07 +00:00
259db89238
merge from gcc
2003-03-17 23:09:54 +00:00
db14b4abb7
merge from gcc
2003-03-17 18:01:05 +00:00
c745f853be
(O_SYS_CMDLINE): New pseudo opcode for command line processing.
2003-03-17 10:34:29 +00:00
401d0b9129
Remove redundant defintions of BYTES_IN_WORD and add conditional defintion in
...
aout64.h.
2003-03-06 16:45:42 +00:00
1def00e433
Fix sh-elf linker relaxation:
...
gcc:
* config/sh/sh.h (EXTRA_SPECS): Add subtarget_asm_relax_spec and
subtarget_asm_isa_spec.
(SUBTARGET_ASM_RELAX_SPEC, SUBTARGET_ASM_ISA_SPEC): Define.
(ASM_SPEC): Define as SH_ASM_SPEC.
(SH_ASM_SPEC): New; take the role of ASM_SPEC, but safe from svr4.h.
Use subtarget_asm_relax_spec and subtarget_asm_isa_spec.
* config/sh/elf.h (ASM_SPEC): Use SH_ASM_SPEC.
(SUBTARGET_ASM_ISA_SPEC): Undef / define.
gcc/testsuite:
gcc.dg/sh-relax.c: New test.
include/elf:
* sh.h (EF_SH_MERGE_MACH): Make sure SH2E & SH3/SH3E merge to SH3E,
and SH2E & SH4 merge to SH4, not SH2E.
gas:
* config/tc-sh.c (sh_dsp): Replace with preset_target_arch.
(md_begin): Use preset_target_arch.
(md_longopts): Make isa option unconditional.
(md_parse_option): Make OPTION_DSP and OPTION_ISA sh4 / any
set preset_target_arch.
(md_apply_fix3): If BFD_ASSEMBLER, adjust SWITCH_TABLE fixups
by -S_GET_VALUE (fixP->fx_subsy).
(tc_gen_reloc): For SWITCH_TABLE fixups, the symbol is fixp->fx_subsy,
and the addend is 0.
Adjust addend of R_SH_IND12W relocations by fixp->fx_offset - 4.
* config/tc-sh.h (TC_FORCE_RELOCATION_SUB_LOCAL): Define.
bfd:
elf32-sh.c (sh_elf_howto_tab): Make R_SH_IND12W into an ordinary
relocation (no special function), and make it non-partial_inplace.
(sh_elf_relax_section): When creating a bsr, use a consistent value
no matter if the symbol is extern or not; set addend to -4.
Don't swap load / non-load instructions for SH4.
(sh_elf_relax_delete_bytes): In R_SH_IND12W case, check the offset
rather than if the symbol is external to determine if adjusting the
offset makes sense. Adjust the addend too if appropriate.
(sh_elf_relocate_section): In R_SH_IND12W, don't fiddle with the
relocation.
2003-03-03 21:03:58 +00:00
f31d07a962
2003-02-27 Andrew Cagney <cagney@redhat.com>
...
* remote-sim.h (sim_open, sim_load, sim_create_inferior): Rename
_bfd to bfd.
2003-02-27 23:13:32 +00:00
7d82e7bf32
merge from gcc
2003-02-27 21:01:01 +00:00
d05ef21d4f
Add SHT_IA_64_LOPSREG, SHT_IA_64_HIPSREG and SHT_IA_64_PRIORITY_INIT.
...
Add code to display these values in readelf.
2003-02-21 12:17:51 +00:00
a55f9cd4fa
(ldmac, stmac): Replace MACREG with MS32 and MD32.
2003-02-21 11:36:59 +00:00
f8bcdf079f
merge from gcc
2003-02-21 01:35:25 +00:00
c847100a1c
* libiberty.h (lrealpath): Add declaration.
2003-02-20 22:13:09 +00:00
ea192e195d
Index: include/gdb/ChangeLog
...
2003-02-20 Andrew Cagney <ac131313@redhat.com>
* remote-sim.c (gdbsim_insert_breakpoint)
(gdbsim_remove_breakpoint): Delete #ifdef SIM_HAS_BREAKPOINTS
code.
Index: include/gdb/ChangeLog
2003-02-20 Andrew Cagney <ac131313@redhat.com>
* remote-sim.h (SIM_RC): Delete unused SIM_RC_UNKNOWN_BREAKPOINT,
SIM_RC_INSUFFICIENT_RESOURCES and SIM_RC_DUPLICATE_BREAKPOINT.
(sim_set_breakpoint, sim_clear_breakpoint): Delete declarations.
(sim_clear_all_breakpoints, sim_enable_breakpoint): Ditto.
(sim_enable_all_breakpoints, sim_disable_breakpoint): Ditto.
(sim_disable_all_breakpoints): Ditto.
Index: sim/common/ChangeLog
2003-02-20 Andrew Cagney <ac131313@redhat.com>
* Make-common.in (SIM_NEW_COMMON_OBJS): Remove sim-break.o
(sim-break_h): Delete macro.
(sim-break.o): Delete rule.
* sim-break.c: Delete file.
* sim-break.h: Delete file.
* sim-base.h [SIM_HAVE_BREAKPOINTS]: Don't include "sim-break.h".
(STATE_BREAKPOINTS): Delete macro.
(sim_state_base): Delete field breakpoints.
* sim-module.c (modules) [SIM_HAVE_BREAKPOINTS]: Don't add
sim_break_install to array.
2003-02-20 14:37:58 +00:00
af5d939fc8
* ppc64.h (IS_PPC64_TLS_RELOC): Rename from IS_TLS_RELOC.
2003-02-18 12:52:55 +00:00
c7887f9705
* ppc.h: Replace DTPMOD64, TPREL64, DTPREL64 with DTPMOD32 etc.
...
(IS_PPC_TLS_RELOC): Define.
2003-02-18 06:03:41 +00:00
27ff20e1dd
Add support for marking ARM ELF binaries as support the Cirrus EP9312 Maverick
...
floating point co-processor.
2003-02-10 10:44:46 +00:00
e0c94f4793
* ppc.h: Add TLS relocs. Format.
...
* ppc64.h: Likewise.
2003-02-04 14:48:36 +00:00
aa0a224816
* hppa.h (ldwa, ldda): Add ordered opcodes.
2003-01-31 21:24:32 +00:00
6816724d0d
* mips.h (EF_MIPS_XGOT): Define.
2003-01-28 00:01:08 +00:00
285d6b97b1
include/
...
* hashtab.h (htab_alloc_with_arg, htab_free_with_arg): Add new types.
(struct htab): Add alloc_arg, alloc_with_arg_f, free_with_arg_f.
(htab_create_alloc_ex): New prototype.
(htab_set_functions_ex): New prototype.
libiberty/
* hashtab.c (htab_create_alloc_ex): New function.
(hatab_set_functions_ex): New function.
(htab_delete, htab_expand): Support alternate allocation functions.
2003-01-26 07:33:29 +00:00
Jakub Jelinek
Jason Eckhardt
Nick Clifton
Roland McGrath
Michael Snyder
Jim Blandy
Stephane Carrez
Alan Modra
Jason Merrill
Andrew Cagney
H.J. Lu
Joern Rennecke
Svein Seldal
Bob Wilson
Martin Schwidefsky
DJ Delorie
Daniel Jacobowitz
John David Anglin
Alexandre Oliva