37e1d79259
2013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
...
* mips.h (EF_MIPS_FP64): New e_flags bit.
2013-09-17 21:05:49 +00:00
423229a5b1
* elf32-rl78.c (rl78_elf_merge_private_bfd_data): Complain if G10
...
flag bits do not match.
(rl78_elf_print_private_bfd_data): Describe G10 flag.
* readelf.c (get_machine_flags): Handle RL78 G10 flag.
* config/tc-rl78.c (elf_flags): New variable.
(enum options): Add OPTION_G10.
(md_longopts): Add mg10.
(md_parse_option): Parse -mg10.
(rl78_elf_final_processing): New function.
* config/tc-rl78.c (tc_final_processing): Define.
* doc/c-rl78.texi: Document -mg10 option.
* rl78.c (E_FLAG_RL78_G10): Define.
* lib/ld-lib.exp (check_shared_lib_support): Note that the RL78
does not support shared library generation.
2013-08-09 10:40:04 +00:00
f6ddaa2a29
include/elf/
...
* mips.h (Tag_GNU_MIPS_ABI_FP): Remove comment.
(Val_GNU_MIPS_ABI_FP_ANY, Val_GNU_MIPS_ABI_FP_DOUBLE,
Val_GNU_MIPS_ABI_FP_SINGLE, Val_GNU_MIPS_ABI_FP_SOFT,
Val_GNU_MIPS_ABI_FP_64): New enum.
bfd/
* elfxx-mips.c (mips_elf_merge_obj_attributes): Replace hardcoded
magic numbers with enum values.
binutils/
* readelf.c (display_mips_gnu_attribute): Replace hardcoded magic
numbers with enum values.
gdb/
* mips-tdep.c (mips_gdbarch_init): Replace hardcoded magic
numbers with enum values.
2013-07-15 15:07:30 +00:00
2f59599ba8
include/elf/
...
* mips.h (EF_MIPS_NAN2008): New macro.
bfd/
* elfxx-mips.c (_bfd_mips_elf_merge_private_bfd_data): Handle
EF_MIPS_NAN2008.
(_bfd_mips_elf_print_private_bfd_data): Likewise.
binutils/
* readelf.c (get_machine_flags): Handle EF_MIPS_NAN2008.
gas/
* config/tc-mips.c (mips_flag_nan2008): New variable.
(options): Add OPTION_NAN enum value.
(md_longopts): Handle it.
(md_parse_option): Likewise.
(s_nan): New function.
(mips_elf_final_processing): Handle EF_MIPS_NAN2008.
(md_show_usage): Add -mnan.
* doc/as.texinfo (Overview): Add -mnan.
* doc/c-mips.texi (MIPS Opts): Document -mnan.
(MIPS NaN Encodings): New node. Document .nan directive.
(MIPS-Dependent): List the new node.
gas/testsuite/
* gas/mips/nan-2008-1.d: New test.
* gas/mips/nan-2008-2.d: New test.
* gas/mips/nan-2008-3.d: New test.
* gas/mips/nan-2008-4.d: New test.
* gas/mips/nan-legacy-1.d: New test.
* gas/mips/nan-legacy-2.d: New test.
* gas/mips/nan-legacy-3.d: New test.
* gas/mips/nan-legacy-4.d: New test.
* gas/mips/nan-legacy-5.d: New test.
* gas/mips/nan-error-1.l: New list test.
* gas/mips/nan-error-2.l: New list test.
* gas/mips/nan-2008-override.s: New test source.
* gas/mips/nan-2008.s: New test source.
* gas/mips/nan-legacy-override.s: New test source.
* gas/mips/nan-legacy.s: New test source.
* gas/mips/nan-error-1.s: New test source.
* gas/mips/nan-error-2.s: New test source.
* gas/mips/mips.exp: Run the new tests.
ld/testsuite/
* ld-mips-elf/nan-2008.d: New test.
* ld-mips-elf/nan-legacy.d: New test.
* ld-mips-elf/nan-mixed-1.d: New test.
* ld-mips-elf/nan-mixed-2.d: New test.
* ld-mips-elf/nan-2008.s: New test source.
* ld-mips-elf/nan-legacy.s: New test source.
2013-07-12 15:58:15 +00:00
10c64dd4da
2013-07-08 Tristan Gingold <gingold@adacore.com>
...
* ia64.h (STB_VMS_WEAK, STB_VMS_SYSTEM): Add.
2013-07-08 13:16:08 +00:00
0cbbf4c8bc
2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
...
opcodes/
* s390-opc.c (J12_12, J24_24): New macros.
(INSTR_MII_UPI): Rename to INSTR_MII_UPP.
(MASK_MII_UPI): Rename to MASK_MII_UPP.
* s390-opc.txt: Rename MII_UPI to MII_UPP for bprp instruction.
include/elf/
* s390.h: Add new relocs R_390_PC12DBL, R_390_PLT12DBL,
R_390_PC24DBL, and R_390_PLT24DBL.
gas/testsuite/
* gas/s390/zarch-zEC12.s: Change bprp second operand and add
variants requiring relocations.
* gas/s390/zarch-zEC12.d: Likewise.
gas/
* config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
relocs.
bfd/
* elf32-s390.c: Add new relocation definitions R_390_PC12DBL,
R_390_PLT12DBL, R_390_PC24DBL, and R_390_PLT24DBL.
(elf_s390_reloc_type_lookup, elf_s390_check_relocs)
(elf_s390_gc_sweep_hook, elf_s390_relocate_section): Support new
relocations.
* elf64-s390.c: See elf32-s390.c
* bfd-in2.h: Add new relocs to enum bfd_reloc_code_real.
* libbfd.h: Add new reloc strings.
2013-07-05 09:45:44 +00:00
bce06a5f2f
[AArch64, ILP32] 3/6 Support for ELF32 relocs and refactor reloc handling
...
bfd/
* bfd-in2.h: Re-generated.
* elfnn-aarch64.c (HOWTO64, HOWTO32): New define.
(IS_AARCH64_TLS_RELOC): Change to be based on the
bfd reloc enumerators.
(IS_AARCH64_TLSDESC_RELOC): Likewise.
(PG, PG_OFFSET): Cast literal to bfd_vma.
(elf64_aarch64_howto_table): Removed.
(elf64_aarch64_howto_dynrelocs): Removed.
(elf64_aarch64_tls_howto_table): Removed.
(elf64_aarch64_tlsdesc_howto_table): Removed.
(elfNN_aarch64_howto_table): New table to host all howto entires..
(R_AARCH64_*): Replaced by AARCH64_R (*) and AARCH64_R_STR (*).
(elfNN_aarch64_bfd_reloc_from_howto): New function.
(elfNN_aarch64_bfd_reloc_from_type): Ditto.
(struct elf_aarch64_reloc_map): New.
(elf_aarch64_reloc_map): New table.
(elfNN_aarch64_howto_from_bfd_reloc): New function.
(elfNN_aarch64_howto_from_type): Update to look up the new table
elfNN_aarch64_howto_table.
(struct elf64_aarch64_reloc_map): Remove.
(elf64_aarch64_reloc_map): Remove.
(elfNN_aarch64_reloc_type_lookup): Change to call
elfNN_aarch64_howto_from_bfd_reloc.
(elfNN_aarch64_reloc_name_lookup): Change to look up the new table
elfNN_aarch64_howto_table.
(aarch64_resolve_relocation): Refactor to switch on the bfd
reloc enumerators.
(bfd_elf_aarch64_put_addend): Likewise.
(elfNN_aarch64_final_link_relocate): Likewise.
(aarch64_tls_transition_without_check): Likewise.
(aarch64_reloc_got_type): Likewise.
(aarch64_can_relax_tls): Likewise.
(aarch64_tls_transition): Likewise.
(elfNN_aarch64_tls_relax): Likewise.
(elfNN_aarch64_final_link_relocate): Likewise.
(elfNN_aarch64_relocate_section): Likewise.
(elfNN_aarch64_gc_sweep_hook): Likewise.
(elfNN_aarch64_check_relocs): Likewise.
(aarch64_tls_transition): Change to return a bfd reloc enumerator.
* libbfd.h: Re-generated.
* reloc.c: Re-order the AArch64 bfd reloc enumerators.
(BFD_RELOC_AARCH64_RELOC_START)
(BFD_RELOC_AARCH64_RELOC_END)
(BFD_RELOC_AARCH64_LD_GOT_LO12_NC)
(BFD_RELOC_AARCH64_LD32_GOT_LO12_NC)
(BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC)
(BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC)
(BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC)
(BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC)
(BFD_RELOC_AARCH64_IRELATIVE): New relocs.
gas/
* config/tc-aarch64.c (reloc_table): Replace
BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
(md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
(aarch64_force_relocation): Likewise.
gas/testsuite/
* gas/aarch64/ilp32-basic.d: New file.
* gas/aarch64/ilp32-basic.s: New file.
include/elf/
* aarch64.h: Add ELF32 reloc codes and remove fake ELF64 ones.
(R_AARCH64_IRELATIVE): New reloc.
2013-06-26 10:47:06 +00:00
c024ce1422
bfd/
...
* elfxx-mips.h (_bfd_mips_elf_get_synthetic_symtab): New
prototype.
* elf32-mips.c (elf_backend_plt_sym_val): Remove macro.
(bfd_elf32_get_synthetic_symtab): New macro.
* elfxx-mips.c (plt_entry): New structure.
(mips_elf_link_hash_entry): Add use_plt_entry member.
(mips_elf_link_hash_table): Rename plt_entry_size member to
plt_mips_entry_size. Add plt_comp_entry_size, plt_mips_offset,
plt_comp_offset, plt_got_index entries and plt_header_is_comp
members.
(STUB_LW_MICROMIPS, STUB_MOVE_MICROMIPS): New macros.
(STUB_LUI_MICROMIPS, STUB_JALR_MICROMIPS): Likewise.
(STUB_ORI_MICROMIPS, STUB_LI16U_MICROMIPS): Likewise.
(STUB_LI16S_MICROMIPS): Likewise.
(MICROMIPS_FUNCTION_STUB_NORMAL_SIZE): Likewise.
(MICROMIPS_FUNCTION_STUB_BIG_SIZE): Likewise.
(micromips_o32_exec_plt0_entry): New variable.
(mips16_o32_exec_plt_entry): Likewise.
(micromips_o32_exec_plt_entry): Likewise.
(mips_elf_link_hash_newfunc): Initialize use_plt_entry.
(mips_elf_output_extsym): Update to use gotplt_union's plist
member rather than offset.
(mips_elf_gotplt_index): Likewise. Remove the VxWorks
restriction. Use MIPS_ELF_GOT_SIZE to calculate GOT address.
(mips_elf_count_got_symbols): Update to use gotplt_union's plist
member rather than offset.
(mips_elf_calculate_relocation): Handle MIPS16/microMIPS PLT
entries.
(_bfd_mips_elf_create_dynamic_sections): Don't set PLT sizes
here.
(mips_elf_make_plt_record): New function.
(_bfd_mips_elf_check_relocs): Update comment. Record occurences
of JAL relocations that might need a PLT entry.
(_bfd_mips_elf_adjust_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Set individual
PLT entry sizes here. Handle MIPS16/microMIPS PLT entries.
Don't set the symbol's value in the symbol table for PLT
references here. Don't set the PLT or PLT GOT section sizes
here.
(mips_elf_estimate_stub_size): Handle microMIPS stubs.
(mips_elf_allocate_lazy_stub): Likewise.
(mips_elf_lay_out_lazy_stubs): Likewise. Define a _MIPS_STUBS_
magic symbol.
(mips_elf_set_plt_sym_value): New function.
(_bfd_mips_elf_size_dynamic_sections): Set PLT header size and
PLT and PLT GOT section sizes here. Set the symbol values in
the symbol table for PLT references here. Handle microMIPS
annotation of the _PROCEDURE_LINKAGE_TABLE_ magic symbol.
(_bfd_mips_elf_finish_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Handle
MIPS16/microMIPS PLT entries. Handle microMIPS stubs.
(_bfd_mips_vxworks_finish_dynamic_symbol): Update to use
gotplt_union's plist member rather than offset. Use
MIPS_ELF_GOT_SIZE to calculate GOT address.
(mips_finish_exec_plt): Handle microMIPS PLT. Return status.
(_bfd_mips_elf_finish_dynamic_sections): Handle result from
mips_finish_exec_plt.
(_bfd_mips_elf_link_hash_table_create): Update to use
gotplt_union's plist member rather than offset.
(_bfd_mips_elf_get_synthetic_symtab): New function.
include/elf/
* mips.h (ELF_ST_IS_MIPS_PLT): Respect STO_MIPS16 setting.
(ELF_ST_SET_MIPS_PLT): Likewise.
gdb/
* mips-tdep.c (mips_elf_make_msymbol_special): Handle MIPS16 and
microMIPS synthetic symbols.
ld/
* emulparams/elf32btsmip.sh: Arrange for .got.plt to be placed
as close to .plt as possible.
* scripttempl/elf.sc: Handle $INITIAL_READWRITE_SECTIONS and
$PLT_NEXT_DATA variables.
ld/testsuite/
* ld-mips-elf/jalx-2.dd: Update for microMIPS PLT support.
* ld-mips-elf/pic-and-nonpic-3a.dd: Update for the _MIPS_STUBS_
magic symbol.
* ld-mips-elf/pic-and-nonpic-3b.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-n32.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-n64.dd: Likewise.
* ld-mips-elf/pic-and-nonpic-6-o32.dd: Likewise.
* ld-mips-elf/stub-dynsym-1-10000.d: Likewise.
* ld-mips-elf/stub-dynsym-1-2fe80.d: Likewise.
* ld-mips-elf/stub-dynsym-1-7fff.d: Likewise.
* ld-mips-elf/stub-dynsym-1-8000.d: Likewise.
* ld-mips-elf/stub-dynsym-1-fff0.d: Likewise.
* ld-mips-elf/tlslib-o32.d: Likewise.
opcodes/
* mips-dis.c (is_mips16_plt_tail): New function.
(print_insn_mips16): Handle MIPS16 PLT entry's GOT slot address
word.
(is_compressed_mode_p): Handle MIPS16/microMIPS PLT entries.
2013-06-24 23:55:45 +00:00
92d098c9ca
aarch64: Revert AArch64 ifunc changes.
...
The AArch64 ifunc patch introduced a regression caused by incorrect
PLT layout. Revert it until a fix is verified.
bfd/ChangeLog:
2013-06-19 Will Newton <will.newton@linaro.org>
* configure: Regenerated.
* configure.in: Remove aarch64 dependency on elf-ifunc.c.
* elf64-aarch64.c: Remove objalloc.h include.
(elf64_aarch64_howto_dynrelocs): Remove R_AARCH64_IRELATIVE howto.
(struct elf64_aarch64_link_hash_table): Remove ifunc related
members. (elf_aarch64_local_htab_hash): Remove function.
(elf_aarch64_local_htab_eq): Remove function.
(elf_aarch64_get_local_sym_hash): Remove function.
(elf64_aarch64_link_hash_table_create): Remove local hash
table initialization.
(elf64_aarch64_final_link_relocate): Remove sym argument and
handling of ifunc symbols.
(elf64_aarch64_relocate_section): Don't pass sym argument to
elf64_aarch64_final_link_relocate.
(elf64_aarch64_gc_sweep_hook): Remove handling of ifunc symbols.
(elf64_aarch64_adjust_dynamic_symbol): Likewise.
(elf64_aarch64_check_relocs): Likewise.
(elf64_aarch64_post_process_headers): Remove call to
_bfd_elf_set_osabi.
(elf64_aarch64_is_function_type): New function.
(elf64_aarch64_allocate_dynrelocs): Remove handling of ifunc
symbols. (elf_aarch64_allocate_local_dynrelocs): Remove function.
(elf64_aarch64_size_dynamic_sections): Remove call to
elf_aarch64_allocate_local_dynrelocs.
(elf64_aarch64_create_small_pltn_entry): Remove info argument.
Remove creation of R_AARCH64_IRELATIVE dynamic relocs.
(elf64_aarch64_finish_dynamic_symbol): Remove handling of ifunc
symbols. (elf_aarch64_finish_local_dynamic_symbol): Remove
function. (elf64_aarch64_finish_dynamic_sections): Remove call to
elf_aarch64_finish_local_dynamic_symbol.
(elf64_aarch64_add_symbol_hook): Remove function.
include/elf/ChangeLog:
2013-06-19 Will Newton <will.newton@linaro.org>
* aarch64.h: Remove R_AARCH64_IRELATIVE.
ld/ChangeLog:
2013-06-19 Will Newton <will.newton@linaro.org>
* emulparams/aarch64elf.sh: Remove IREL_IN_PLT.
ld/testsuite/ChangeLog:
2013-06-19 Will Newton <will.newton@linaro.org>
* ld-aarch64/aarch64-elf.exp: Remove ifunc tests.
* ld-ifunc/ifunc.exp: Disable ifunc tests on AArch64.
* ld-aarch64/ifunc-1-local.d: Remove.
* ld-aarch64/ifunc-1-local.s: Likewise.
* ld-aarch64/ifunc-1.d: Likewise.
* ld-aarch64/ifunc-1.s: Likewise.
* ld-aarch64/ifunc-10.d: Likewise.
* ld-aarch64/ifunc-10.s: Likewise.
* ld-aarch64/ifunc-11.d: Likewise.
* ld-aarch64/ifunc-11.s: Likewise.
* ld-aarch64/ifunc-12.d: Likewise.
* ld-aarch64/ifunc-12.s: Likewise.
* ld-aarch64/ifunc-13.d: Likewise.
* ld-aarch64/ifunc-13a.s: Likewise.
* ld-aarch64/ifunc-13b.s: Likewise.
* ld-aarch64/ifunc-14a.d: Likewise.
* ld-aarch64/ifunc-14a.s: Likewise.
* ld-aarch64/ifunc-14b.d: Likewise.
* ld-aarch64/ifunc-14b.s: Likewise.
* ld-aarch64/ifunc-14c.d: Likewise.
* ld-aarch64/ifunc-14c.s: Likewise.
* ld-aarch64/ifunc-14d.d: Likewise.
* ld-aarch64/ifunc-14e.d: Likewise.
* ld-aarch64/ifunc-14f.d: Likewise.
* ld-aarch64/ifunc-15.d: Likewise.
* ld-aarch64/ifunc-15.s: Likewise.
* ld-aarch64/ifunc-16.d: Likewise.
* ld-aarch64/ifunc-16.s: Likewise.
* ld-aarch64/ifunc-17a.d: Likewise.
* ld-aarch64/ifunc-17a.s: Likewise.
* ld-aarch64/ifunc-17b.d: Likewise.
* ld-aarch64/ifunc-17b.s: Likewise.
* ld-aarch64/ifunc-18a.d: Likewise.
* ld-aarch64/ifunc-18a.s: Likewise.
* ld-aarch64/ifunc-18b.d: Likewise.
* ld-aarch64/ifunc-18b.s: Likewise.
* ld-aarch64/ifunc-19a.d: Likewise.
* ld-aarch64/ifunc-19a.s: Likewise.
* ld-aarch64/ifunc-19b.d: Likewise.
* ld-aarch64/ifunc-19b.s: Likewise.
* ld-aarch64/ifunc-2-local.d: Likewise.
* ld-aarch64/ifunc-2-local.s: Likewise.
* ld-aarch64/ifunc-2.d: Likewise.
* ld-aarch64/ifunc-2.s: Likewise.
* ld-aarch64/ifunc-20.d: Likewise.
* ld-aarch64/ifunc-20.s: Likewise.
* ld-aarch64/ifunc-3.s: Likewise.
* ld-aarch64/ifunc-3a.d: Likewise.
* ld-aarch64/ifunc-3b.d: Likewise.
* ld-aarch64/ifunc-4.d: Likewise.
* ld-aarch64/ifunc-4.s: Likewise.
* ld-aarch64/ifunc-4a.d: Likewise.
* ld-aarch64/ifunc-5-local.s: Likewise.
* ld-aarch64/ifunc-5.s: Likewise.
* ld-aarch64/ifunc-5a-local.d: Likewise.
* ld-aarch64/ifunc-5a.d: Likewise.
* ld-aarch64/ifunc-5b-local.d: Likewise.
* ld-aarch64/ifunc-5b.d: Likewise.
* ld-aarch64/ifunc-5r-local.d: Likewise.
* ld-aarch64/ifunc-6.s: Likewise.
* ld-aarch64/ifunc-6a.d: Likewise.
* ld-aarch64/ifunc-6b.d: Likewise.
* ld-aarch64/ifunc-7.s: Likewise.
* ld-aarch64/ifunc-7a.d: Likewise.
* ld-aarch64/ifunc-7b.d: Likewise.
* ld-aarch64/ifunc-7c.d: Likewise.
* ld-aarch64/ifunc-8.d: Likewise.
* ld-aarch64/ifunc-8a.s: Likewise.
* ld-aarch64/ifunc-8b.s: Likewise.
* ld-aarch64/ifunc-9.d: Likewise.
* ld-aarch64/ifunc-9.s: Likewise.
2013-06-19 10:30:56 +00:00
0d284dd0c1
aarch64: Add support for GNU indirect functions.
...
Add support for STT_GNU_IFUNC symbols to the AArch64 bfd backend. The tests
are ported from the ld-ifunc tests but are enabled for cross builds so can
be run easily without hardware or a simulator.
bfd/ChangeLog:
2013-06-07 Will Newton <will.newton@linaro.org>
* configure: Regenerate.
* configure.in: Build elf-ifunc.o for AArch64.
* elf64-aarch64.c: Include objalloc.h.
(elf64_aarch64_howto_dynrelocs): Add R_AARCH64_IRELATIVE howto.
(struct elf64_aarch64_link_hash_table): Add members for handling
R_AARCH64_IRELATIVE relocations.
(elf_aarch64_local_htab_hash): New function.
(elf_aarch64_local_htab_eq): New function.
(elf_aarch64_get_local_sym_hash): New function.
(elf64_aarch64_link_hash_table_create): Initialize local STT_GNU_IFUNC
symbol hash.
(elf64_aarch64_hash_table_free): Free local STT_GNU_IFUNC symbol hash.
(elf64_aarch64_final_link_relocate): Add sym argument. Add support
for handling STT_GNU_IFUNC symbols.
(elf64_aarch64_gc_sweep_hook): Add support for garbage collecting
references to STT_GNU_IFUNC symbols.
(elf64_aarch64_adjust_dynamic_symbol): Add support for handling
STT_GNU_IFUNC symbols.
(elf64_aarch64_check_relocs): Add support for handling STT_GNU_IFUNC
symbols. Ensure we don't increase plt.refcount from -1 to 0.
(elf64_aarch64_post_process_headers): Call _bfd_elf_set_osabi.
(elf64_aarch64_is_function_type): Remove function.
(elf64_aarch64_allocate_dynrelocs): Call
_bfd_elf_allocate_ifunc_dyn_relocs for STT_GNU_IFUNC symbols.
(elf_aarch64_allocate_local_dynrelocs): New function.
(elf64_aarch64_size_dynamic_sections): Call
elf_aarch64_allocate_local_dynrelocs. Initialize next_irelative_index.
(elf64_aarch64_create_small_pltn_entry): Add info argument.
Add support for creating .iplt entries for STT_GNU_IFUNC symbols.
(elf64_aarch64_finish_dynamic_symbol): Add support for handling
STT_GNU_IFUNC symbols and .iplt.
(elf_aarch64_finish_local_dynamic_symbol): New function.
(elf64_aarch64_finish_dynamic_sections): Call
elf_aarch64_finish_local_dynamic_symbol.
(elf64_aarch64_add_symbol_hook): New function.
include/elf/ChangeLog:
2013-06-07 Will Newton <will.newton@linaro.org>
* aarch64.h: Add R_AARCH64_IRELATIVE reloc.
ld/ChangeLog:
2013-06-07 Will Newton <will.newton@linaro.org>
* emulparams/aarch64elf.sh: Add IREL_IN_PLT.
ld/testsuite/ChangeLog:
2013-06-07 Will Newton <will.newton@linaro.org>
* ld-ifunc/ifunc.exp: Enable ifunc tests for AArch64.
* ld-aarch64/aarch64-elf.exp: Add ifunc tests.
* ld-aarch64/ifunc-1-local.d: New file.
* ld-aarch64/ifunc-1-local.s: Likewise.
* ld-aarch64/ifunc-1.d: Likewise.
* ld-aarch64/ifunc-1.s: Likewise.
* ld-aarch64/ifunc-10.d: Likewise.
* ld-aarch64/ifunc-10.s: Likewise.
* ld-aarch64/ifunc-11.d: Likewise.
* ld-aarch64/ifunc-11.s: Likewise.
* ld-aarch64/ifunc-12.d: Likewise.
* ld-aarch64/ifunc-12.s: Likewise.
* ld-aarch64/ifunc-13.d: Likewise.
* ld-aarch64/ifunc-13a.s: Likewise.
* ld-aarch64/ifunc-13b.s: Likewise.
* ld-aarch64/ifunc-14a.d: Likewise.
* ld-aarch64/ifunc-14a.s: Likewise.
* ld-aarch64/ifunc-14b.d: Likewise.
* ld-aarch64/ifunc-14b.s: Likewise.
* ld-aarch64/ifunc-14c.d: Likewise.
* ld-aarch64/ifunc-14c.s: Likewise.
* ld-aarch64/ifunc-14d.d: Likewise.
* ld-aarch64/ifunc-14e.d: Likewise.
* ld-aarch64/ifunc-14f.d: Likewise.
* ld-aarch64/ifunc-15.d: Likewise.
* ld-aarch64/ifunc-15.s: Likewise.
* ld-aarch64/ifunc-16.d: Likewise.
* ld-aarch64/ifunc-16.s: Likewise.
* ld-aarch64/ifunc-17a.d: Likewise.
* ld-aarch64/ifunc-17a.s: Likewise.
* ld-aarch64/ifunc-17b.d: Likewise.
* ld-aarch64/ifunc-17b.s: Likewise.
* ld-aarch64/ifunc-18a.d: Likewise.
* ld-aarch64/ifunc-18a.s: Likewise.
* ld-aarch64/ifunc-18b.d: Likewise.
* ld-aarch64/ifunc-18b.s: Likewise.
* ld-aarch64/ifunc-19a.d: Likewise.
* ld-aarch64/ifunc-19a.s: Likewise.
* ld-aarch64/ifunc-19b.d: Likewise.
* ld-aarch64/ifunc-19b.s: Likewise.
* ld-aarch64/ifunc-2-local.d: Likewise.
* ld-aarch64/ifunc-2-local.s: Likewise.
* ld-aarch64/ifunc-2.d: Likewise.
* ld-aarch64/ifunc-2.s: Likewise.
* ld-aarch64/ifunc-20.d: Likewise.
* ld-aarch64/ifunc-20.s: Likewise.
* ld-aarch64/ifunc-3.s: Likewise.
* ld-aarch64/ifunc-3a.d: Likewise.
* ld-aarch64/ifunc-3b.d: Likewise.
* ld-aarch64/ifunc-4.d: Likewise.
* ld-aarch64/ifunc-4.s: Likewise.
* ld-aarch64/ifunc-4a.d: Likewise.
* ld-aarch64/ifunc-5-local.s: Likewise.
* ld-aarch64/ifunc-5.s: Likewise.
* ld-aarch64/ifunc-5a-local.d: Likewise.
* ld-aarch64/ifunc-5a.d: Likewise.
* ld-aarch64/ifunc-5b-local.d: Likewise.
* ld-aarch64/ifunc-5b.d: Likewise.
* ld-aarch64/ifunc-5r-local.d: Likewise.
* ld-aarch64/ifunc-6.s: Likewise.
* ld-aarch64/ifunc-6a.d: Likewise.
* ld-aarch64/ifunc-6b.d: Likewise.
* ld-aarch64/ifunc-7.s: Likewise.
* ld-aarch64/ifunc-7a.d: Likewise.
* ld-aarch64/ifunc-7b.d: Likewise.
* ld-aarch64/ifunc-8.d: Likewise.
* ld-aarch64/ifunc-8a.s: Likewise.
* ld-aarch64/ifunc-8b.s: Likewise.
* ld-aarch64/ifunc-9.d: Likewise.
* ld-aarch64/ifunc-9.s: Likewise.
2013-06-07 18:57:00 +00:00
fc316f3a8e
* mips.h (ELF_ST_SET_MIPS_PIC): Clear any STO_MIPS16 setting.
2013-06-06 22:09:07 +00:00
ac1f751fef
2013-05-30 Paul Brook <paul@codesourcery.com>
...
bfd/
* bfd-in2.h: Regenerate.
* elf32-mips.c (elf_mips_eh_howto): New.
(bfd_elf32_bfd_reloc_type_lookup ): Support BFD_RELOC_MIPS_EH.
(bfd_elf32_bfd_reloc_name_lookup): Likewise.
(mips_elf32_rtype_to_howto): Support R_MIPS_EH.
* elf64-mips.c (elf_mips_eh_howto): New.
(bfd_elf64_bfd_reloc_type_lookup): Support BFD_RELOC_MIPS_EH.
(bfd_elf64_bfd_reloc_name_lookup): Likewise.
(mips_elf64_rtype_to_howto): Support R_MIPS_EH.
* libbfd.h: Regenerate.
* reloc.c (BFD_RELOC_MIPS_EH): New.
gas/
* config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
include/elf
* mips.h (R_MIPS_EH): New.
2013-05-30 20:27:21 +00:00
6b6cafe933
Correct the relocation names for R_AARCH64_TLSDESC_LD_PREL19 and R_AARCH64_TLSDESC_ADR_PAGE21.
2013-05-28 16:39:51 +00:00
14afd12bcd
Add EM_INTEL205 to EM_INTEL209
...
* common.h (EM_INTEL205): New.
(EM_INTEL206): Likewise.
(EM_INTEL207): Likewise.
(EM_INTEL208): Likewise.
(EM_INTEL209): Likewise.
2013-05-22 17:02:35 +00:00
36d4d414c6
* archures.c: Add some more MSP430 machine numbers.
...
* config.bfd (msp430): Define targ_selvecs.
* configure.in: Add bfd_elf32_msp430_ti_vec.
* cpu-msp430.c: Add some more MSP430 machine numbers.
* elf32-msp430.c Add support for MSP430X relocations.
Add support for TI compiler generated relocations.
Add support for sym_diff relocations.
Add support for relaxing out of range short branches into long
branches.
Add support for MSP430 attribute section.
* reloc.c: Add MSP430X relocations.
* targets.c: Add bfd_elf32_msp430_ti_vec.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* readelf.c: Add support for MSP430X architecture.
* readelf.exp: Expect -wi test to fail for the MSP430.
* config/tc-msp430.c: Add support for the MSP430X architecture.
Add code to insert a NOP instruction after any instruction that
might change the interrupt state.
Add support for the LARGE memory model.
Add code to initialise the .MSP430.attributes section.
* config/tc-msp430.h: Add support for the MSP430X architecture.
* doc/c-msp430.texi: Document the new -mL and -mN command line
options.
* NEWS: Mention support for the MSP430X architecture.
* gas/all/gas.exp: Skip the DIFF1 test for the MSP430.
Expect the FORWARD test to pass for the MSP430.
Skip the REDEF tests for the MSP430.
Expect the 930509A test to fail for the MSP430.
* gas/all/sleb128-4.d: Skip for the MSP430.
* gas/elf/elf.exp: Set target_machine to msp430 for the MSP430.
Skip the EHOPT0 test for the MSP430.
Skip the REDEF and EQU-RELOC tests for the MSP430.
* gas/elf/section2.e-msp430: New file.
* gas/lns/lns-big-delta.d: Remove expectation of 20-bit
addresses.
* gas/lns/lns.exp: Use alternate LNS COMMON test for the MSP430.
* gas/msp430/msp430x.s: New test.
* gas/msp430/msp430x.d: Expected disassembly.
* gas/msp430/msp430.exp: Run new test.
* gas/msp430/opcode.d: Update expected disassembly.
* msp430.h: Add MSP430X relocs.
Add some more MSP430 machine numbers.
Add values used by .MSP430.attributes section.
* msp430.h: Add patterns for MSP430X instructions.
* Makefile.am: Add emsp430X.c
* Makefine.in: Regenerate.
* configure.tgt (msp430): Add msp430X emulation.
* ldmain.c (multiple_definition): Only disable relaxation if it
was enabled by the user.
* ldmain.h (RELAXATION_ENABLED_BY_USER): New macro.
* emulparams/msp430all.sh: Add support for MSP430X.
* emultempl/generic.em: (before_parse): Enable relaxation for the
MSP430.
* scripttempl/msp430.sc: Reorganize sections. Add .rodata
section.
* scripttempl/msp430_3.sc: Likewise.
* NEWS: Mention support for MSP430X.
* ld-elf/flags1.d: Expect this test to pass on the MSP430.
* ld-elf/init-fini-arrays.d: Expect this test to fail on the
MSP430.
* ld-elf/merge.d: Expect this test to pass on the MSP430.
* ld-elf/sec64k.exp: Skip these tests for the MSP430.
* ld-gc/pr13683.d: Expect this test to fail on the MSP430.
* ld-srec/srec.exp: Expect these tests to fail on the MSP430.
* ld-undefined/undefined.exp: Expect the UNDEFINED LINE test to
fail on the MSP430.
* msp430-dis.c: Add support for MSP430X instructions.
2013-05-02 21:06:14 +00:00
724514461e
* elf32-h8300 (h8_relax_section): Add new relaxation of mov
...
@(disp:32,ERx) to mov @(disp:16,ERx).
(R_H8_DISP32A16): New reloc.
Comments added and corrected.
* reloc.c (BFD_RELOC_H8_DISP32A16): New reloc.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* ld.texinfo (H8/300): Add description of relaxation of
mov @(disp:32,ERx) to mov @(disp:16,ERx).
* ld-h8300/h8300.exp: Add new relax-7 test on ELF.
* ld-h8300/relax-2.s: Add other direction and .w/.l variants of
mov insns.
* ld-h8300/relax-2.d: Update expected disassembly.
* ld-h8300/relax-7a.s: New: tests for mov @(disp:32,ERx) -> mov
@(disp:16,ERx).
* ld-h8300/relax-7b.s: New: Likewise.
* ld-h8300/relax-7.d: New: expected disassembly.
* config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
@(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
R_H8_DISP32A16.
* config/tc-h8300.h: Remove duplicated defines.
2013-03-21 16:08:06 +00:00
735c1b8006
* elf-bfd.h (elfcore_write_s390_tdb): Add prototype.
...
* elf.c (elfcore_write_s390_tdb): New function.
(elfcore_write_register_note): Call it.
(elfcore_grok_s390_tdb): New function.
(elfcore_grok_note): Call it.
* readelf.c (get_note_type): Add NT_S390_TDB.
2013-03-08 17:13:31 +00:00
be071de851
2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
...
Andrew Jenner <andrew@codesourcery.com>
Based on patches from Altera Corporation.
bfd/
* Makefile.am (ALL_MACHINES): Add cpu-nios2.lo.
(ALL_MACHINES_CFILES): Add cpu-nios2.c.
(BFD_BACKENDS): Add elf32-nios2.lo.
(BFD32_BACKENDS_CFILES): Add elf32-nios2.c.
* Makefile.in: Regenerated.
* configure.in: Add entries for bfd_elf32_bignios2_vec and
bfd_elf32_littlenios2_vec.
* configure: Regenerated.
* config.bfd: Add cases for nios2.
* archures.c (enum bfd_architecture): Add bfd_arch_nios2.
(bfd_mach_nios2): Define.
(bfd_nios2_arch): Declare.
(bfd_archures_list): Add bfd_nios2_arch.
* targets.c (bfd_elf32_bignios2_vec): Declare.
(bfd_elf32_littlenios2_vec): Declare.
(_bfd_target_vector): Add entries for bfd_elf32_bignios2_vec and
bfd_elf32_littlenios2_vec.
* elf-bfd.h (enum elf_target_id): Add NIOS2_ELF_DATA.
* reloc.c (enum bfd_reloc_code_real): Add Nios II relocations.
* bfd-in2.h: Regenerated.
* libbfd.h: Regenerated.
* cpu-nios2.c: New file.
* elf32-nios2.c: New file.
opcodes/
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add nios2-dis.c and
nios2-opc.c.
* Makefile.in: Regenerated.
* configure.in: Add case for bfd_nios2_arch.
* configure: Regenerated.
* disassemble.c (ARCH_nios2): Define.
(disassembler): Add case for bfd_arch_nios2.
* nios2-dis.c: New file.
* nios2-opc.c: New file.
include/
* dis-asm.h (print_insn_big_nios2): Declare.
(print_insn_little_nios2): Declare.
include/elf
* nios2.h: New file.
include/opcode/
* nios2.h: New file.
gas/
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
(TARGET_CPU_HFILES): Add config/tc-nios2.h.
* Makefile.in: Regenerated.
* configure.tgt: Add case for nios2*-linux*.
* config/obj-elf.c: Conditionally include elf/nios2.h.
* config/tc-nios2.c: New file.
* config/tc-nios2.h: New file.
* doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
* doc/Makefile.in: Regenerated.
* doc/all.texi: Set NIOSII.
* doc/as.texinfo (Overview): Add Nios II options.
(Machine Dependencies): Include c-nios2.texi.
* doc/c-nios2.texi: New file.
* NEWS: Note Altera Nios II support.
gas/testsuite/
* gas/nios2/add.d: New.
* gas/nios2/add.s: New.
* gas/nios2/align_fill.d: New.
* gas/nios2/align_fill.s: New.
* gas/nios2/align_text.d: New.
* gas/nios2/align_text.s: New.
* gas/nios2/and.d: New.
* gas/nios2/and.s: New.
* gas/nios2/branch.d: New.
* gas/nios2/branch.s: New.
* gas/nios2/break.d: New.
* gas/nios2/break.s: New.
* gas/nios2/bret.d: New.
* gas/nios2/bret.s: New.
* gas/nios2/cache.d: New.
* gas/nios2/cache.s: New.
* gas/nios2/call26.d: New.
* gas/nios2/call26.s: New.
* gas/nios2/call.d: New.
* gas/nios2/call.s: New.
* gas/nios2/cmp.d: New.
* gas/nios2/cmp.s: New.
* gas/nios2/comments.d: New.
* gas/nios2/comments.s: New.
* gas/nios2/complex.d: New.
* gas/nios2/complex.s: New.
* gas/nios2/ctl.d: New.
* gas/nios2/ctl.s: New.
* gas/nios2/custom.d: New.
* gas/nios2/custom.s: New.
* gas/nios2/etbt.d: New.
* gas/nios2/etbt.s: New.
* gas/nios2/flushda.d: New.
* gas/nios2/flushda.s: New.
* gas/nios2/illegal.l: New.
* gas/nios2/illegal.s: New.
* gas/nios2/jmp.d: New.
* gas/nios2/jmp.s: New.
* gas/nios2/ldb.d: New.
* gas/nios2/ldb.s: New.
* gas/nios2/ldh.d: New.
* gas/nios2/ldh.s: New.
* gas/nios2/ldw.d: New.
* gas/nios2/ldw.s: New.
* gas/nios2/lineseparator.d: New.
* gas/nios2/lineseparator.s: New.
* gas/nios2/mov.d: New.
* gas/nios2/movia.d: New.
* gas/nios2/movia.s: New.
* gas/nios2/movi.d: New.
* gas/nios2/movi.s: New.
* gas/nios2/mov.s: New.
* gas/nios2/mul.d: New.
* gas/nios2/mul.s: New.
* gas/nios2/nios2.exp: New.
* gas/nios2/nor.d: New.
* gas/nios2/nor.s: New.
* gas/nios2/or.d: New.
* gas/nios2/or.s: New.
* gas/nios2/ret.d: New.
* gas/nios2/ret.s: New.
* gas/nios2/rol.d: New.
* gas/nios2/rol.s: New.
* gas/nios2/rotate.d: New.
* gas/nios2/rotate.s: New.
* gas/nios2/stb.d: New.
* gas/nios2/stb.s: New.
* gas/nios2/sth.d: New.
* gas/nios2/sth.s: New.
* gas/nios2/stw.d: New.
* gas/nios2/stw.s: New.
* gas/nios2/sub.d: New.
* gas/nios2/sub.s: New.
* gas/nios2/sync.d: New.
* gas/nios2/sync.s: New.
* gas/nios2/trap.d: New.
* gas/nios2/trap.s: New.
* gas/nios2/tret.d: New.
* gas/nios2/tret.s: New.
* gas/nios2/warn_noat.l: New.
* gas/nios2/warn_noat.s: New.
* gas/nios2/warn_nobreak.l: New.
* gas/nios2/warn_nobreak.s: New.
* gas/nios2/xor.d: New.
* gas/nios2/xor.s: New.
ld/
* Makefile.am (enios2elf.c): New rule.
* Makefile.in: Regenerated.
* configure.tgt: Add case for nios2*-*-*.
* emulparams/nios2elf.sh: New file.
* NEWS: Note Altera Nios II support.
ld/testsuite/
* ld-nios2/emit-relocs-1a.s: New.
* ld-nios2/emit-relocs-1b.s: New.
* ld-nios2/emit-relocs-1.d: New.
* ld-nios2/emit-relocs-1.ld: New.
* ld-nios2/gprel.d: New.
* ld-nios2/gprel.s: New.
* ld-nios2/hilo16.d: New.
* ld-nios2/hilo16.s: New.
* ld-nios2/hilo16_symbol.s: New.
* ld-nios2/imm5.d: New.
* ld-nios2/imm5.s: New.
* ld-nios2/imm5_symbol.s: New.
* ld-nios2/nios2.exp: New.
* ld-nios2/pcrel16.d: New.
* ld-nios2/pcrel16_label.s: New.
* ld-nios2/pcrel16.s: New.
* ld-nios2/relax_callr.d: New.
* ld-nios2/relax_callr.ld: New.
* ld-nios2/relax_callr.s: New.
* ld-nios2/relax_cjmp.d: New.
* ld-nios2/relax_cjmp.s: New.
* ld-nios2/relax_jmp.ld: New.
* ld-nios2/relax_section.d: New.
* ld-nios2/relax_section.s: New.
* ld-nios2/relax_ujmp.d: New.
* ld-nios2/relax_ujmp.s: New.
* ld-nios2/reloc.d: New.
* ld-nios2/reloc.s: New.
* ld-nios2/reloc_symbol.s: New.
* ld-nios2/s16.d: New.
* ld-nios2/s16.s: New.
* ld-nios2/s16_symbol.s: New.
* ld-nios2/u16.d: New.
* ld-nios2/u16.s: New.
* ld-nios2/u16_symbol.s: New.
* ld-elf/indirect.exp: Skip on targets that don't support
-shared -fPIC.
* ld-elfcomm/elfcomm.exp: Build with -G0 for nios2.
* ld-plugin/lto.exp: Skip shared library tests on targets that
don't support them. Skip execution tests on non-native targets.
binutils/
* readelf.c: Include elf/nios2.h.
(dump_relocations): Add case for EM_ALTERA_NIOS2.
(get_nios2_dynamic_type): New.
(get_dynamic_type): Add case for EM_ALTERA_NIOS2.
(is_32bit_abs_reloc): Fix EM_ALTERA_NIOS2 case.
(is_16bit_abs_reloc): Likewise.
(is_none_reloc): Add EM_ALTERA_NIOS2 and EM_NIOS32 cases.
* NEWS: Note Altera Nios II support.
* MAINTAINERS: Add Nios II maintainers.
2013-02-06 23:22:18 +00:00
ffe54f0fa1
Add support for V850E3V5 architecture
2013-01-24 11:14:01 +00:00
f432e328af
Define R_386_SIZE32/R_X86_64_SIZE32/R_X86_64_SIZE64
...
* i386.h (R_386_SIZE32): Fill it.
* x86-64.h (R_X86_64_SIZE32): Likewise.
(R_X86_64_SIZE64): Likewise.
2013-01-16 20:31:57 +00:00
c9b45dfbbd
* common.h: Fix case of "Meta".
...
* metag.h: New file.
* dis-asm.h (print_insn_metag): New declaration.
* metag.h: New file.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* configure: Regenerate.
* configure.in: Add Meta.
* disassemble.c: Add Meta support.
* metag-dis.c: New file.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* archures.c (bfd_mach_metag): New.
* bfd-in2.h: Regenerate.
* config.bfd: Add Meta.
* configure: Regenerate.
* configure.in: Add Meta.
* cpu-metag.c: New file.
* elf-bfd.h: Add Meta.
* elf32-metag.c: New file.
* elf32-metag.h: New file.
* libbfd.h: Regenerate.
* reloc.c: Add Meta relocations.
* targets.c: Add Meta.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* config/tc-metag.c: New file.
* config/tc-metag.h: New file.
* configure.tgt: Add Meta.
* doc/Makefile.am: Add Meta.
* doc/Makefile.in: Regenerate.
* doc/all.texi: Add Meta.
* doc/as.texiinfo: Document Meta options.
* doc/c-metag.texi: New file.
* gas/metag/labelarithmetic.d: New file.
* gas/metag/labelarithmetic.s: New file.
* gas/metag/metacore12.d: New file.
* gas/metag/metacore12.s: New file.
* gas/metag/metacore21-invalid.l: New file.
* gas/metag/metacore21-invalid.s: New file.
* gas/metag/metacore21.d: New file.
* gas/metag/metacore21.s: New file.
* gas/metag/metacore21ext.d: New file.
* gas/metag/metacore21ext.s: New file.
* gas/metag/metadsp21-invalid.l: New file.
* gas/metag/metadsp21-invalid.s: New file.
* gas/metag/metadsp21.d: New file.
* gas/metag/metadsp21.s: New file.
* gas/metag/metadsp21ext.d: New file.
* gas/metag/metadsp21ext.s: New file.
* gas/metag/metafpu21.d: New file.
* gas/metag/metafpu21.s: New file.
* gas/metag/metafpu21ext.d: New file.
* gas/metag/metafpu21ext.s: New file.
* gas/metag/metag.exp: New file.
* gas/metag/tls.d: New file.
* gas/metag/tls.s: New file.
* Makefile.am: Add Meta.
* Makefile.in: Regenerate.
* configure.tgt: Add Meta.
* emulparams/elf32metag.sh: New file.
* emultempl/metagelf.em: New file.
* ld-elf/merge.d: Mark Meta as xfail.
* ld-gc/start.d: Skip this test on Meta.
* ld-gc/personality.d: Skip this test on Meta.
* ld-metag/external.s: New file.
* ld-metag/metag.exp: New file.
* ld-metag/pcrel.d: New file.
* ld-metag/pcrel.s: New file.
* ld-metag/shared.d: New file.
* ld-metag/shared.r: New file.
* ld-metag/shared.s: New file.
* ld-metag/stub.d: New file.
* ld-metag/stub.s: New file.
* ld-metag/stub_pic_app.d: New file.
* ld-metag/stub_pic_app.r: New file.
* ld-metag/stub_pic_app.s: New file.
* ld-metag/stub_pic_shared.d: New file.
* ld-metag/stub_pic_shared.s: New file.
* ld-metag/stub_shared.d: New file.
* ld-metag/stub_shared.r: New file.
* ld-metag/stub_shared.s: New file.
* binutils/readelf.c: (guess_is_rela): Add EM_METAG.
(dump_relocations): Add EM_METAG.
(get_machine_name): Correct case for Meta.
(is_32bit_abs_reloc): Add support for Meta ADDR32 reloc.
(is_none_reloc): Add support for Meta NONE reloc.
2013-01-10 09:49:18 +00:00
7af4ad8178
include/elf/
...
2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
* common.h (NT_ARM_TLS, NT_ARM_HW_BREAK, NT_ARM_HW_WATCH): New macro
definitions.
bfd/
2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
* elf-bfd.h (elfcore_write_aarch_tls): Add prototype.
(elfcore_write_aarch_hw_break): Likewise.
(elfcore_write_aarch_hw_watch): Likewise.
* elf.c (elfcore_grok_aarch_tls): New function.
(elfcore_grok_aarch_hw_break): Likewise.
(elfcore_grok_aarch_hw_watch): Likewise.
(elfcore_grok_note): Call the new functions to handle the
corresponding notes.
(elfcore_write_aarch_tls): New function.
(elfcore_write_aarch_hw_break): Likewise.
(elfcore_write_aarch_hw_watch): Likewise.
(elfcore_write_register_note): Call the new functions to handle the
corresponding pseudo sections.
binutils/
2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
* readelf.c (get_note_type): Handle NT_ARM_TLS, NT_ARM_HW_BREAK
and NT_ARM_HW_WATCH.
2013-01-08 18:09:12 +00:00
bb8fa932a5
* archures.c: Add support for MIPS r5900
...
* bfd-in2.h: Add support for MIPS r5900
* config.bfd: Add support for Sony Playstation 2
* cpu-mips.c: Add support for MIPS r5900
* elfxx-mips.c: Add support for MIPS r5900 (extension of r4000)
* config/tc-mips.c: Add support for MIPS r5900
Add M_LQ_AB and M_SQ_AB to support large values for instructions lq and sq.
* config/tc-mips.c (can_swap_branch_p, get_append_method): Detect some conditional short loops to fix a bug on the r5900 by NOP in the branch delay slot.
* config/tc-mips.c (M_MUL): Support 3 operands in multu on r5900.
* config/tc-mips.c (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
* config/tc-mips.c (s_mipsset): Force 32 bit floating point on r5900.
* configure.in: Detect CPU type when target string contains r5900 (e.g. mips64r5900el-linux-gnu).
* config/tc-mips.c (mips_ip): Check parameter range of instructions mfps and mtps on r5900.
* elf/mips.h: Add MIPS machine variant number for r5900 which is compatible with old Playstation 2 software.
* opcode/mips.h: Add support for r5900 instructions including lq and sq.
* configure.tgt: Support ELF files for Sony Playstation 2 (for ps2dev and ps2sdk).
* emulparams/elf32lr5900n32.sh: Create linker script for Sony Playstation 2 ELF files using MIPS ABI n32.
* emulparams/elf32lr5900.sh: Create linker script for Sony Playstation 2 ELF files using MIPS ABI o32.
* Makefile.am: Add linker scripts for Sony Playstation 2 ELF files.
* opcodes/mips-dis.c: Add names for CP0 registers of r5900.
* opcodes/mips-opc.c: Add M_SQ_AB and M_LQ_AB to support larger range for instructions sq and lq.
* opcodes/mips-opc.c: Add support for MIPS r5900 CPU.
Add support for 128 bit MMI (Multimedia Instructions).
Add support for EE instructions (Emotion Engine).
Disable unsupported floating point instructions (64 bit and undefined compare operations).
Enable instructions of MIPS ISA IV which are supported by r5900.
Disable 64 bit co processor instructions.
Disable 64 bit multiplication and division instructions.
Disable instructions for co-processor 2 and 3, because these are not supported (preparation for later VU0 support (Vector Unit)).
Disable cvt.w.s because this behaves like trunc.w.s and the correct execution can't be ensured on r5900.
Add trunc.w.s using the opcode encoding of cvt.w.s on r5900. This will confuse less developers and compilers.
2013-01-04 17:22:50 +00:00
90943f078f
Add copyright notices
2012-12-10 12:48:00 +00:00
5c63c9b570
Update DF_1_XXX from Solaris
...
binutils/
* readelf.c (process_dynamic_section): Correct DF_1_CONFALT.
Also dump DF_1_ENDFILTEE, DF_1_DISPRELDNE, DF_1_NODIRECT,
DF_1_IGNMULDEF, DF_1_NOKSYMS, DF_1_NOHDR, DF_1_EDITED,
DF_1_NORELOC, DF_1_SYMINTPOSE, DF_1_GLOBAUDIT and DF_1_SINGLETON.
include/elf/
* common.h (DF_1_CONLFAT): Renamed to ...
(DF_1_CONFALT): This.
(DF_1_ENDFILTEE): New.
(DF_1_DISPRELDNE): Likewise.
(DF_1_DISPRELPND): Likewise.
(DF_1_NODIRECT): Likewise.
(DF_1_IGNMULDEF): Likewise.
(DF_1_NOKSYMS): Likewise.
(DF_1_NOHDR): Likewise.
(DF_1_EDITED): Likewise.
(DF_1_NORELOC): Likewise.
(DF_1_SYMINTPOSE): Likewise.
(DF_1_GLOBAUDIT): Likewise.
(DF_1_SINGLETON): Likewise.
2012-11-16 12:49:20 +00:00
3211d6c91f
2012-11-09 Nick Clifton <nickc@redhat.com>
...
* Makefile.am (ALL_MACHINES): Add cpu-v850-rh850.lo.
(ALL_MACHINES_CFILES): Add cpu-v850-rh850.c.
* archures.c (bfd_arch_info): Add bfd_v850_rh850_arch.
* config.bfd: Likewise.
* configure.in: Add bfd_elf32_v850_rh850_vec.
* cpu-v850.c: Update printed description.
* cpu-v850_rh850.c: New file.
* elf32-v850.c (v850_elf_check_relocs): Add support for RH850 ABI
relocs.
(v850_elf_perform_relocation): Likewise.
(v850_elf_final_link_relocate): Likewise.
(v850_elf_relocate_section): Likewise.
(v850_elf_relax_section): Likewise.
(v800_elf_howto_table): New.
(v850_elf_object_p): Add support for RH850 ABI values.
(v850_elf_final_write_processing): Likewise.
(v850_elf_merge_private_bfd_data): Likewise.
(v850_elf_print_private_bfd_data): Likewise.
(v800_elf_reloc_map): New.
(v800_elf_reloc_type_lookup): New.
(v800_elf_reloc_name_lookup): New.
(v800_elf_info_to_howto): New.
(bfd_elf32_v850_rh850_vec): New.
(bfd_arch_v850_rh850): New.
* targets.c (_bfd_targets): Add bfd_elf32_v850_rh850_vec.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI.
(guess_is_rela): Add EM_V800.
(dump_relocations): Likewise.
(get_machine_name): Update EM_V800.
(get_machine_flags): Add support for RH850 ABI flags.
(is_32bit_abs_reloc): Add support for RH850 ABI reloc.
* config/tc-v850.c (v850_target_arch): New.
(v850_target_format): New.
(set_machine): Use v850_target_arch.
(md_begin): Likewise.
(md_show_usage): Document new switches.
(md_parse_option): Add -mgcc-abi, -mrh850-abi, -m8byte-align and
-m4byte-align.
* config/tc-v850.c (TARGET_ARCH) Use v850_target_arch.
(TARGET_FORMAT): Use v850_target_format.
* doc/c-v850.texi: Document new options.
* v850.h: Add RH850 ABI values.
* Makefile.am: (ALL_EMULATION_SOURCES): Add ev850_rh850.c.
* Makefile.in: Regenerate.
* configure.tgt (v850*-*-*): Make v850_rh850 the default
emulation. Add vanilla v850 as an extra emulation.
* emulparams/v850_rh850.sh: New file.
* scripttempl/v850_rh850.sc: New file.
* configure.in: Add bfd_v850_rh850_arch.
* configure: Regenerate.
* disassemble.c (disassembler): Likewise.
2012-11-09 17:36:19 +00:00
9fcf11a46c
2012-11-09 Nick Clifton <nickc@redhat.com>
...
* elf32-rx.c (describe_flags): New function. Returns a buffer
containing a description of the E_FLAG_RX_... values set.
(rx_elf_merge_private_bfd_data): Use it.
(rx_elf_print_private_bfd_data): Likewise.
(elf32_rx_machine): Skip EF_RX_CPU_RX check.
(elf32_rx_special_sections): Define.
(elf_backend_special_sections): Define.
2012-11-09 Nick Clifton <nickc@redhat.com>
* readelf.c (get_machine_flags): Add support for E_FLAG_RX_ABI.
2012-11-09 Nick Clifton <nickc@redhat.com>
* config/obj-elf.c (obj_elf_change_section): Allow init array
sections to have the SHF_EXECINSTR attribute for the RX target.
* config/tc-rx.c (elf_flags): Initialise with E_FLAG_RX_ABI.
(enum options): Add OPTION_USES_GCC_ABI and OPTION_USES_RX_ABI.
(md_longopts): Add -mgcc-abi and -mrx-abi.
(md_parse_option): Add support for OPTION_USES_GCC_ABI and
OPTION_USES_RX_ABI.
* doc/as.texinfo (RX Options): Add mention of remaining RX
options.
* doc/c-rx.texi: Document -mgcc-abi and -mrx-abi.
2012-11-09 Nick Clifton <nickc@redhat.com>
* rx.h (EF_RX_CPU_RX): Add comment.
(E_FLAG_RX_ABI): Define.
2012-11-09 Nick Clifton <nickc@redhat.com>
* emultempl/rxelf.em (no_flag_mismatch_warnings): Initialise to
true.
(PARSE_AND_LIST_LONGOPTS): Add flag-mismatch-warnings.
(PARSE_AND_LIST_ARG_CASES): Add support for
--flag-mismatch-warnings.
2012-11-09 17:00:42 +00:00
f8957493e8
* mips.h (EF_MIPS_32BITMODE): Move next to lower-order bits.
2012-11-08 18:25:23 +00:00
6b53df5729
binutils
...
* readelf.c (get_note_type): Handle NT_386_TLS, NT_386_IOPERM.
include/common/elf
* common.h (NT_386_TLS, NT_386_IOPERM): New defines.
2012-11-01 14:57:22 +00:00
ce6072b921
bfd:
...
* elf32-arm.c (elf32_arm_print_private_bfd_data): Recognise and
display the new ARM hard-float/soft-float ABI flags for EABI_VER5
(elf32_arm_post_process_headers): Add the hard-float/soft-float
ABI flag as appropriate for ET_DYN/ET_EXEC in EABI_VER5.
binutils:
* readelf.c (decode_ARM_machine_flags): Recognise and display the
new ARM hard-float/soft-float ABI flags for EABI_VER5. Split out
the code for EABI_VER4 and EABI_VER5 to allow this.
elfcpp:
* arm.h: New enum for EABI soft- and hard-float flags.
gold:
* gold.cc (Target_arm::do_adjust_elf_header): Add the
hard-float/soft-float ABI flag as appropriate for ET_DYN/ET_EXEC
in EABI_VER5.
include:
* elf/arm.h (EF_ARM_ABI_FLOAT_SOFT): New define.
(EF_ARM_ABI_FLOAT_HARD): Likewise.
ld/testsuite:
* ld-arm/eabi-hard-float.s: New test source.
* ld-arm/eabi-soft-float.s: New test source.
* ld-arm/eabi-hard-float.d: New test.
* ld-arm/eabi-soft-float.d: New test.
* ld-arm/eabi-soft-float-ABI4.d: New test.
* ld-arm/eabi-soft-float-r.d: New test.
* ld-arm/arm-elf.xp: Use the new tests.
binutils:
PR binutils/14779
* configure.in: Add checks for wchar.h and mbstate_t.
* config.in: Regenerate.
* configure: Regenerate.
* readelf.c: Conditionally include wchar.h.
(print_symbol): Conditionally use mbstate_t.
2012-10-30 12:44:57 +00:00
c81a67683f
binutils
...
* readelf.c (get_note_type): Handle NT_SIGINFO, NT_FILE.
(print_core_note): New function.
(process_note): Call it.
include/common/elf
* common.h (NT_SIGINFO, NT_FILE): New defines.
2012-10-23 17:46:44 +00:00
aafdd9a5fc
Add support for constructing pc-relative addresses to the plt, by
...
adding the necessary assembly operators and relocations.
bfd:
* reloc.c (Add BFD_RELOC_TILEGX_IMM16_X0_HW0_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW0_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW1_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW1_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW2_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW2_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW3_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW3_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL): new relocations.
* elfxx-tilegx.c (tilegx_elf_howto_table): Handle new relocations.
(tilegx_reloc_map): Ditto.
(reloc_to_create_func): Ditto.
(tilegx_elf_check_relocs): Ditto.
(tilegx_elf_gc_sweep_hook): Ditto.
(tilegx_elf_relocate_section): Ditto.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
gas:
* tc-tilegx.c (O_hw0_plt): Define operator.
(O_hw1_plt): Ditto.
(O_hw1_last_plt): Ditto.
(O_hw2_last_plt): Ditto.
(md_begin): Handle new operators.
(emit_tilegx_instruction): Ditto.
(md_apply_fix): Ditto.
* doc/c-tilegx.texi: Document new operators.
include/elf:
* tilegx.h (R_TILEGX_IMM16_X0_HW0_PLT_PCREL): New relocation.
(R_TILEGX_IMM16_X1_HW0_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW1_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW1_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW2_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW2_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW3_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW3_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL): Ditto.
(R_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL ): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL): Ditto.
2012-08-28 02:43:22 +00:00
de522be6db
Add support for 64-bit ARM architecture: AArch64
2012-08-13 14:52:48 +00:00
515ff84388
* common.h (AT_L1I_CACHESHAPE, AT_L1D_CACHESHAPE,
...
AT_L2_CACHESHAPE, AT_L3_CACHESHAPE): New defines.
2012-06-28 09:12:27 +00:00
53b7c465ed
PR 13503
...
* reloc.c: Rename BFD_RELOC_AVR_8_HHI to BFD_RELOC_AVR_8_HLO.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenrate.
* elf32-avr.c (elf_avr_howto_table): Rename R_AVR_8_HHI8 to
R_AVR_8_HLO8.
(avr_reloc_map): Ditto.
* config/tc-avr.c (avr_cons_fix_new): Rename R_AVR_8_HHI8 to
R_AVR_8_HLO8.
(exp_mod_data) Ditto. And replace "hhi8" with "hlo8".
(md_apply_fix): Rename BFD_RELOC_AVR_8_HHI to BFD_RELOC_AVR_8_HLO.
* avr.h (RELOC_NUMBERS): Rename R_AVR_8_HHI8 to R_AVR_8_HLO8.
2012-05-16 14:52:16 +00:00
c846faf01a
* config/tc-m68hc11.c: Add S12X and XGATE co-processor support.
...
Add option to offset S12 addresses into XGATE memory space.
Tweak target flags to match other tools. (i.e. -m m68hc11).
* doc/as.texinfo: Mention new options.
* doc/c-m68hc11.texi: Document new options.
* NEWS: Mention new support.
* archures.c: Add bfd_arch_m9s12x and bfd_arch_m9s12xg.
* config.bfd: Likewise.
* cpu-m9s12x.c: New.
* cpu-m9s12xg.c: New.
* elf32-m68hc12.c: Add S12X and XGATE co-processor support.
Add option to offset S12 addresses into XGATE memory space.
Fix carry bug in IMM16 (IMM8 low/high) relocate.
* Makefile.am (ALL_MACHINES): Add cpu-m9s12x and cpu-m9s12xg.
(ALL_MACHINES_CFILES): Likewise.
* reloc.c: Add S12X relocs.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* gas/m68hc11/insns9s12x.s: New
* gas/m68hc11/insns9s12x.d: New
* gas/m68hc11/hexprefix.s: New
* gas/m68hc11/hexprefix.d: New
* gas/m68hc11/9s12x-exg-sex-tfr.s: New
* gas/m68hc11/9s12x-exg-sex-tfr.d: New
* gas/m68hc11/insns9s12xg.s: New
* gas/m68hc11/insns9s12xg.d: New
* gas/m68hc11/9s12x-mov.s: New
* gas/m68hc11/9s12x-mov.d: New
* gas/m68hc11/m68hc11.exp: Updated
* gas/m68hc11/*.d: Brought in line with changed objdump output.
* gas/all/gas.exp: XFAIL all hc11/12 targets for redef2,3.
* gas/elf/elf.exp: XFAIL all hc11/12 targets for redef.
* gas/elf/dwarf2-1.d: Skip for hc11/12 targets.
* gas/elf/dwarf2-2.d: Likewise.
* ld-m68hc11/xgate-link.s: New.
* ld-m68hc11/xgate-link.d: New.
* ld-m68hc11/xgate-offset.s: New.
* ld-m68hc11/xgate-offset.d: New.
* ld-m68hc11/xgate1.s: New.
* ld-m68hc11/xgate1.d: New.
* ld-m68hc11/xgate2.s: New.
* ld-m68hc11/m68hc11.exp: Updated.
* ld-m68hc11/*.d: Brought in line with changed objdump output.
* ld-gc/gc.exp: Update CFLAGS for m68hc11.
* ld-plugin/plugin.exp: Likewise.
* ld-srec/srec.exp: XFAIL for m68hc11 and m68hc12.
* configure.in: Add S12X and XGATE co-processor support to m68hc11
target.
* disassemble.c: Likewise.
* configure: Regenerate.
* m68hc11-dis.c: Make objdump output more consistent, use hex
instead of decimal and use 0x prefix for hex.
* m68hc11-opc.c: Add S12X and XGATE opcodes.
* dis-asm.h (print_insn_m9s12x): Prototype.
(print_insn_m9s12xg): Prototype.
* m68hc11.h (R_M68HC12_16B, R_M68HC12_PCREL_9, R_M68HC12_PCREL_10)
R_M68HC12_HI8XG, R_M68HC12_LO8XG): New relocations.
(E_M68HC11_XGATE_RAMOFFSET): Define.
* m68hc11.h: Add XGate definitions.
(struct m68hc11_opcode): Add xg_mask field.
2012-05-15 12:55:51 +00:00
77009cee1e
Add support for PowerPC VLE.
...
2012-05-14 Catherine Moore <clm@codesourcery.com>
* NEWS: Mention PowerPC VLE port.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
Catherine Moore <clm@codesourcery.com>
bfd/
* bfd.c (bfd_lookup_section_flags): Add section parm.
* ecoff.c (bfd_debug_section): Remove flag_info initializer.
* elf-bfd.h (bfd_elf_section_data): Move in section_flag_info.
(bfd_elf_lookup_section_flags): Add section parm.
* elf32-ppc.c (is_ppc_vle): New function.
(ppc_elf_modify_segment_map): New function.
(elf_backend_modify_segment_map): Define.
(has_vle_insns): New define.
* elf32-ppc.h (ppc_elf_modify_segment_map): Declare.
* elflink.c (bfd_elf_lookup_section_flags): Add return value & parm.
Move in logic to omit / include a section.
* libbfd-in.h (bfd_link_info): Add section parm.
(bfd_generic_lookup_section_flags): Likewise.
* reloc.c (bfd_generic_lookup_section_flags): Likewise.
* section.c (bfd_section): Move out section_flag_info.
(BFD_FAKE_SECTION): Remove flag_info initializer.
* targets.c (_bfd_lookup_section_flags): Add section parm.
2012-05-14 Catherine Moore <clm@codesourcery.com>
bfd/
* archures.c (bfd_mach_ppc_vle): New.
* bfd-in2.h: Regenerated.
* cpu-powerpc.c (bfd_powerpc_archs): New entry for vle.
* elf32-ppc.c (split16_format_type): New enumeration.
(ppc_elf_vle_split16): New function.
(HOWTO): Add entries for R_PPC_VLE relocations.
(ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations.
(ppc_elf_section_flags): New function.
(ppc_elf_lookup_section_flags): New function.
(ppc_elf_section_processing): New function.
(ppc_elf_check_relocs): Handle PPC_VLE relocations.
(ppc_elf_relocation_section): Likewise.
(elf_backend_lookup_section_flags_hook): Define.
(elf_backend_section_flags): Define.
(elf_backend_section_processing): Define.
* elf32-ppc.h (ppc_elf_section_processing): Declare.
* libbfd.h: Regenerated.
* reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15,
BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A,
BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A,
BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A,
BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21,
BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A,
BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A,
BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A,
BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (insn_validate): New func of existing code to call..
(ppc_setup_opcodes): ..from 2 places here.
Revise for second (VLE) opcode table.
Add #ifdef'd code to print opcode tables.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
gas/
* config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order
for the VLE conditional branches.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/
* config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro.
(PPC_VLE_SPLIT16D): New macro.
(PPC_VLE_LO16A): New macro.
(PPC_VLE_LO16D): New macro.
(PPC_VLE_HI16A): New macro.
(PPC_VLE_HI16D): New macro.
(PPC_VLE_HA16A): New macro.
(PPC_VLE_HA16D): New macro.
(PPC_APUINFO_VLE): New definition.
(md_chars_to_number): New function.
(md_parse_option): Check for combinations of little
endian and -mvle.
(md_show_usage): Document -mvle.
(ppc_arch): Recognize VLE.
(ppc_mach): Recognize bfd_mach_ppc_vle.
(ppc_setup_opcodes): Print the opcode table if
* config/tc-ppc.h (ppc_frag_check): Declare.
* doc/c-ppc.texi: Document -mvle.
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
gas/
* config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare.
(DWARF2_LINE_MIN_INSN_LENGTH): Redefine.
* config/tc-ppc.c (ppc_dw2_line_min_insn_length): New.
* dwarf2dbg.c (scale_addr_delta): Handle values of 1
for DWARF2_LINE_MIN_INSN_LENGTH.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
gas/testsuite/
* gas/ppc/ppc.exp: Run new tests.
* gas/ppc/vle-reloc.d: New test.
* gas/ppc/vle-reloc.s: New test.
* gas/ppc/vle-simple-1.d: New test.
* gas/ppc/vle-simple-1.s: New test.
* gas/ppc/vle-simple-2.d: New test.
* gas/ppc/vle-simple-2.s: New test.
* gas/ppc/vle-simple-3.d: New test.
* gas/ppc/vle-simple-3.s: New test.
* gas/ppc/vle-simple-4.d: New test.
* gas/ppc/vle-simple-4.s: New test.
* gas/ppc/vle-simple-5.d: New test.
* gas/ppc/vle-simple-5.s: New test.
* gas/ppc/vle-simple-6.d: New test.
* gas/ppc/vle-simple-6.s: New test.
* gas/ppc/vle.d: New test.
* gas/ppc/vle.s: New test.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (SEC_PPC_VLE): Remove.
2012-05-14 Catherine Moore <clm@codesourcery.com>
James Lemke <jwlemke@codesourcery.com>
include/elf/
* ppc.h (R_PPC_VLE_REL8): New reloction.
(R_PPC_VLE_REL15): Likewise.
(R_PPC_VLE_REL24): Likewise.
(R_PPC_VLE_LO16A): Likewise.
(R_PPC_VLE_LO16D): Likewise.
(R_PPC_VLE_HI16A): Likewise.
(R_PPC_VLE_HI16D): Likewise.
(R_PPC_VLE_HA16A): Likewise.
(R_PPC_VLE_HA16D): Likewise.
(R_PPC_VLE_SDA21): Likewise.
(R_PPC_VLE_SDA21_LO): Likewise.
(R_PPC_VLE_SDAREL_LO16A): Likewise.
(R_PPC_VLE_SDAREL_LO16D): Likewise.
(R_PPC_VLE_SDAREL_HI16A): Likewise.
(R_PPC_VLE_SDAREL_HI16D): Likewise.
(R_PPC_VLE_SDAREL_HA16A): Likewise.
(R_PPC_VLE_SDAREL_HA16D): Likewise.
(SEC_PPC_VLE): Remove.
(PF_PPC_VLE): New program header flag.
(SHF_PPC_VLE): New section header flag.
(vle_opcodes, vle_num_opcodes): New.
(VLE_OP): New macro.
(VLE_OP_TO_SEG): New macro.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
include/opcode/
* ppc.h (PPC_OPCODE_VLE): New definition.
(PPC_OP_SA): New macro.
(PPC_OP_SE_VLE): New macro.
(PPC_OP): Use a variable shift amount.
(powerpc_operand): Update comments.
(PPC_OPSHIFT_INV): New macro.
(PPC_OPERAND_CR): Replace with...
(PPC_OPERAND_CR_BIT): ...this and
(PPC_OPERAND_CR_REG): ...this.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/
* ldlang.c (walk_wild_consider_section): Don't copy section_flag_list.
Pass it to callback.
(walk_wild_section_general): Pass section_flag_list to callback.
(lang_add_section): Add sflag_list parm.
Move out logic to keep / omit a section & call bfd_lookup_section_flags.
(output_section_callback_fast): Add sflag_list parm.
Add new parm to lang_add_section calls.
(output_section_callback): Likewise.
(check_section_callback): Add sflag_list parm.
(lang_place_orphans): Add new parm to lang_add_section calls.
(gc_section_callback): Add sflag_list parm.
(find_relro_section_callback): Likewise.
* ldlang.h (callback_t): Add flag_info parm.
(lang_add_section): Add sflag_list parm.
* emultempl/armelf.em (elf32_arm_add_stub_section):
Add lang_add_section parm.
* emultempl/beos.em (gld*_place_orphan): Likewise.
* emultempl/elf32.em (gld*_place_orphan): Likewise.
* emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise.
* emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise.
* emultempl/mipself.em (mips_add_stub_section): Likewise.
* emultempl/mmo.em (mmo_place_orphan): Likewise.
* emultempl/pe.em (gld_*_place_orphan): Likewise.
* emultempl/pep.em (gld_*_place_orphan): Likewise.
* emultempl/ppc64elf.em (ppc_add_stub_section): Likewise.
* emultempl/spuelf.em (spu_place_special_section): Likewise.
* emultempl/vms.em (vms_place_orphan): Likewise.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
ld/testsuite/
* ld-powerpc/powerpc.exp: Create ppceabitests.
* ld-powerpc/vle-multiseg.s: New.
* ld-powerpc/vle-multiseg-1.d: New.
* ld-powerpc/vle-multiseg-1.ld: New.
* ld-powerpc/vle-multiseg-2.d: New.
* ld-powerpc/vle-multiseg-2.ld: New.
* ld-powerpc/vle-multiseg-3.d: New.
* ld-powerpc/vle-multiseg-3.ld: New.
* ld-powerpc/vle-multiseg-4.d: New.
* ld-powerpc/vle-multiseg-4.ld: New.
* ld-powerpc/vle-multiseg-5.d: New.
* ld-powerpc/vle-multiseg-5.ld: New.
* ld-powerpc/vle-multiseg-6.d: New.
* ld-powerpc/vle-multiseg-6.ld: New.
* ld-powerpc/vle-multiseg-6a.s: New.
* ld-powerpc/vle-multiseg-6b.s: New.
* ld-powerpc/vle-multiseg-6c.s: New.
* ld-powerpc/vle-multiseg-6d.s: New.
* ld-powerpc/powerpc.exp: Run new tests.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/
* NEWS: Mention PowerPC VLE port.
2012-05-14 Catherine Moore <clm@codesourcery.com>
ld/testsuite/
* ld-powerpc/apuinfo.rd: Update for VLE.
* ld-powerpc/vle-reloc-1.d: New.
* ld-powerpc/vle-reloc-1.s: New.
* ld-powerpc/vle-reloc-2.d: New.
* ld-powerpc/vle-reloc-2.s: New.
* ld-powerpc/vle-reloc-3.d: New.
* ld-powerpc/vle-reloc-3.s: New.
* ld-powerpc/vle-reloc-def-1.s: New.
* ld-powerpc/vle-reloc-def-2.s: New.
* ld-powerpc/vle-reloc-def-3.s: New.
2012-05-14 James Lemke <jwlemke@codesourcery.com>
opcodes/
* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
(vle_opcd_indices): New array.
(lookup_vle): New function.
(disassemble_init_powerpc): Revise for second (VLE) opcode table.
(print_insn_powerpc): Likewise.
* ppc-opc.c: Likewise.
2012-05-14 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Rhonda Wittels <rhonda@codesourcery.com>
Nathan Froyd <froydnj@codesourcery.com>
opcodes/
* ppc-opc.c (insert_arx, extract_arx): New functions.
(insert_ary, extract_ary): New functions.
(insert_li20, extract_li20): New functions.
(insert_rx, extract_rx): New functions.
(insert_ry, extract_ry): New functions.
(insert_sci8, extract_sci8): New functions.
(insert_sci8n, extract_sci8n): New functions.
(insert_sd4h, extract_sd4h): New functions.
(insert_sd4w, extract_sd4w): New functions.
(insert_vlesi, extract_vlesi): New functions.
(insert_vlensi, extract_vlensi): New functions.
(insert_vleui, extract_vleui): New functions.
(insert_vleil, extract_vleil): New functions.
(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
(BI16, BI32, BO32, B8): New.
(B15, B24, CRD32, CRS): New.
(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
(SH6_MASK): Use PPC_OPSHIFT_INV.
(SI8, UI5, OIMM5, UI7, BO16): New.
(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
(ALLOW8_SPRG): New.
(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
(OPVUP, OPVUP_MASK OPVUP): New
(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
(SE_IM5, SE_IM5_MASK): New.
(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
(BO32DNZ, BO32DZ): New.
(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
(PPCVLE): New.
(powerpc_opcodes): Add new VLE instructions. Update existing
instruction to include PPCVLE if supported.
* ppc-dis.c (ppc_opts): Add vle entry.
(get_powerpc_dialect): New function.
(powerpc_init_dialect): VLE support.
(print_insn_big_powerpc): Call get_powerpc_dialect.
(print_insn_little_powerpc): Likewise.
(operand_value_powerpc): Handle negative shift counts.
(print_insn_powerpc): Handle 2-byte instruction lengths.
2012-05-14 19:45:27 +00:00
c30ea6b3f3
PR 13503
...
* reloc.c: Add new ENUM for BFD_RELOC_AVR_8_LO,
BFD_RELOC_AVR_8_HI, BFD_RELOC_AVR_8_HHI.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenrate.
* elf32-avr.c (elf_avr_howto_table): Add entries for
R_AVR_8_LO8, R_AVR_8_HI8, R_AVR_8_HHI8.
(avr_reloc_map): Add RELOC mappings for R_AVR_8_LO8, R_AVR_8_HI8,
R_AVR_8_HHI8.
* config/tc-avr.c (exp_mod_pm): Remove variable.
(exp_mod_data_t): New typedef.
(pexp_mod_data, exp_mod_data): New variables.
(avr_parse_cons_expression): Scan through exp_mod_data[] to find
data expression modifiers "pm", "gs", "lo8", hi8", "hhi8", "hh8"
and set pexp_mod_data accordingly to be used in avr_cons_fix_new.
(avr_cons_fix_new): Handle new data expression modifiers shipped
in pexp_mod_data.
(md_apply_fix): Handle BFD_RELOC_AVR_8_LO, BFD_RELOC_AVR_8_HI,
BFD_RELOC_AVR_8_HHI.
* elf/avr.h (RELOC_NUMBERS): Add values for R_AVR_8_LO8,
R_AVR_8_HI8, R_AVR_8_HHI8.
2012-05-11 12:59:23 +00:00
1c46670094
Add support for Motorola XGATE embedded CPU
2012-05-03 13:12:06 +00:00
3117fd3083
Add new ELF_SPARC_HWCAP_* defines for features found on SPARC-T4.
...
include/elf/
* sparc.h: Add new ELF_SPARC_HWCAP_* defines for crypto,
pause, and compare-and-branch instructions.
2012-04-27 18:00:52 +00:00
33a1f4b23b
* mn10300.h (elf_mn10300_reloc_type): Add R_MN10300_TLS_GD,
...
R_MN10300_TLS_LD, R_MN10300_TLS_LDO, R_MN10300_TLS_GOTIE,
R_MN10300_TLS_IE, R_MN10300_TLS_LE, R_MN10300_TLS_DPTMOD,
R_MN10300_TLS_DTPOFF and R_MN10300_TLS_TPOFF.
* elf-m10300.c (elf32_mn10300_link_hash_entry): Add tls_type
field.
(elf32_mn10300_link_hash_table): Add tls_ldm_got entry;
(elf_mn10300_tdata): Define.
(elf_mn10300_local_got_tls_type): Define.
(elf_mn10300_howto_table): Add entries for R_MN10300_TLS_GD,
R_MN10300_TLS_LD, R_MN10300_TLS_LDO, R_MN10300_TLS_GOTIE,
R_MN10300_TLS_IE, R_MN10300_TLS_LE, R_MN10300_TLS_DPTMOD,
R_MN10300_TLS_DTPOFF, R_MN10300_TLS_TPOFF relocs.
(mn10300_reloc_map): Likewise.
(elf_mn10300_tls_transition): New function.
(dtpoff, tpoff, mn10300_do_tls_transition): New functions.
(mn10300_elf_check_relocs): Add TLS support.
(mn10300_elf_final_link_relocate): Likewise.
(mn10300_elf_relocate_section): Likewise.
(mn10300_elf_relax_section): Likewise.
(elf32_mn10300_link_hash_newfunc): Initialise new field.
(_bfd_mn10300_copy_indirect_symbol): New function.
(elf32_mn10300_link_hash_table_create): Initialise new fields.
(_bfd_mn10300_elf_size_dynamic_sections): Add TLS support.
(_bfd_mn10300_elf_finish_dynamic_symbol): Likewise.
(_bfd_mn10300_elf_reloc_type_class): Allocate an
elf_mn10300_obj_tdata structure.
(elf_backend_copy_indirect_symbol): Define.
* reloc.c (BFD_MN10300_TLS_GD, BFD_MN10300_TLS_LD,
BFD_MN10300_TLS_LDO, BFD_MN10300_TLS_GOTIE, BFD_MN10300_TLS_IE,
BFD_MN10300_TLS_LE, BFD_MN10300_TLS_DPTMOD,
BFD_MN10300_TLS_DTPOFF, BFD_MN10300_TLS_TPOFF): New relocations.
(BFD_RELOC_MN10300_32_PCREL, BFD_RELOC_MN10300_16_PCREL): Move to
alongside other MN10300 relocations.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* config/tc-mn10300.c (other_registers): Add SSP and USP.
(md_assemble): Add support for TLS relocs.
(mn10300_parse_name): Likewise.
* readelf.c (is_16bit_abs_reloc): Add detection of R_MN10300_16.
2012-03-07 17:51:56 +00:00
3a90360cf0
Improve TLS support on TILE-Gx/TILEPro:
...
- Add support for TLS LE references.
- Support linker optimization of TLS references.
- Delete relocations of GOT/tp relative offsets beyond 32-bits.
This brings binutils in line with the support expected in gcc 4.7, for
TILE-Gx/TILEPro.
bfd/
* reloc.c: Add BFD_RELOC_TILEPRO_TLS_GD_CALL,
BFD_RELOC_TILEPRO_IMM8_X0_TLS_GD_ADD,
BFD_RELOC_TILEPRO_IMM8_X1_TLS_GD_ADD,
BFD_RELOC_TILEPRO_IMM8_Y0_TLS_GD_ADD,
BFD_RELOC_TILEPRO_IMM8_Y1_TLS_GD_ADD,
BFD_RELOC_TILEPRO_TLS_IE_LOAD, BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_LO,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_LO,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HI,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HI,
BFD_RELOC_TILEPRO_IMM16_X0_TLS_LE_HA,
BFD_RELOC_TILEPRO_IMM16_X1_TLS_LE_HA,
BFD_RELOC_TILEGX_IMM16_X0_HW0_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X1_HW0_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X0_HW0_LAST_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X1_HW0_LAST_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X0_HW1_LAST_TLS_LE,
BFD_RELOC_TILEGX_IMM16_X1_HW1_LAST_TLS_LE,
BFD_RELOC_TILEGX_TLS_GD_CALL, BFD_RELOC_TILEGX_IMM8_X0_TLS_GD_ADD,
BFD_RELOC_TILEGX_IMM8_X1_TLS_GD_ADD,
BFD_RELOC_TILEGX_IMM8_Y0_TLS_GD_ADD,
BFD_RELOC_TILEGX_IMM8_Y1_TLS_GD_ADD, BFD_RELOC_TILEGX_TLS_IE_LOAD,
BFD_RELOC_TILEGX_IMM8_X0_TLS_ADD,
BFD_RELOC_TILEGX_IMM8_X1_TLS_ADD,
BFD_RELOC_TILEGX_IMM8_Y0_TLS_ADD, BFD_RELOC_TILEGX_IMM8_Y1_TLS_ADD.
Delete BFD_RELOC_TILEGX_IMM16_X0_HW1_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW1_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW2_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW2_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW3_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW3_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_GOT,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_GOT,
BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_GD,
BFD_RELOC_TILEGX_IMM16_X0_HW1_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW1_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW2_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW2_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW3_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW3_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X0_HW2_LAST_TLS_IE,
BFD_RELOC_TILEGX_IMM16_X1_HW2_LAST_TLS_IE.
* elf32-tilepro.c (tilepro_elf_howto_table): Update tilepro
relocations.
(tilepro_reloc_map): Ditto.
(tilepro_info_to_howto_rela): Ditto.
(reloc_to_create_func): Ditto.
(tilepro_tls_translate_to_le): New.
(tilepro_tls_translate_to_ie): New.
(tilepro_elf_tls_transition): New.
(tilepro_elf_check_relocs): Handle new tls relocations.
(tilepro_elf_gc_sweep_hook): Ditto.
(allocate_dynrelocs): Ditto.
(tilepro_elf_relocate_section): Ditto.
(tilepro_replace_insn): New.
(insn_mask_X1): New.
(insn_mask_X0_no_dest_no_srca): New
(insn_mask_X1_no_dest_no_srca): New
(insn_mask_Y0_no_dest_no_srca): New
(insn_mask_Y1_no_dest_no_srca): New
(srca_mask_X0): New
(srca_mask_X1): New
(insn_tls_le_move_X1): New
(insn_tls_le_move_zero_X0X1): New
(insn_tls_ie_lw_X1): New
(insn_tls_ie_add_X0X1): New
(insn_tls_ie_add_Y0Y1): New
(insn_tls_gd_add_X0X1): New
(insn_tls_gd_add_Y0Y1): New
* elfxx-tilegx.c (tilegx_elf_howto_table): Update tilegx
relocations.
(tilegx_reloc_map): Ditto.
(tilegx_info_to_howto_rela): Ditto.
(reloc_to_create_func): Ditto.
(tilegx_elf_link_hash_table): New field disable_le_transition.
(tilegx_tls_translate_to_le): New.
(tilegx_tls_translate_to_ie): New.
(tilegx_elf_tls_transition): New.
(tilegx_elf_check_relocs): Handle new tls relocations.
(tilegx_elf_gc_sweep_hook): Ditto.
(allocate_dynrelocs): Ditto.
(tilegx_elf_relocate_section): Ditto.
(tilegx_copy_bits): New.
(tilegx_replace_insn): New.
(insn_mask_X1): New.
(insn_mask_X0_no_dest_no_srca): New.
(insn_mask_X1_no_dest_no_srca): New.
(insn_mask_Y0_no_dest_no_srca): New.
(insn_mask_Y1_no_dest_no_srca): New.
(insn_mask_X0_no_operand): New.
(insn_mask_X1_no_operand): New.
(insn_mask_Y0_no_operand): New.
(insn_mask_Y1_no_operand): New.
(insn_tls_ie_ld_X1): New.
(insn_tls_ie_ld4s_X1): New.
(insn_tls_ie_add_X0X1): New.
(insn_tls_ie_add_Y0Y1): New.
(insn_tls_ie_addx_X0X1): New.
(insn_tls_ie_addx_Y0Y1): New.
(insn_tls_gd_add_X0X1): New.
(insn_tls_gd_add_Y0Y1): New.
(insn_move_X0X1): New.
(insn_move_Y0Y1): New.
(insn_add_X0X1): New.
(insn_add_Y0Y1): New.
(insn_addx_X0X1): New.
(insn_addx_Y0Y1): New.
* libbfd.h: Regenerate.
* bfd-in2.h: Regenerate.
gas/
* tc-tilepro.c (O_tls_le): Define operator.
(O_tls_le_lo16): Ditto.
(O_tls_le_hi16): Ditto.
(O_tls_le_ha16): Ditto.
(O_tls_gd_call): Ditto.
(O_tls_gd_add): Ditto.
(O_tls_ie_load): Ditto.
(md_begin): Delete old operators; handle new operators.
(emit_tilepro_instruction): Ditto.
(md_apply_fix): Ditto.
* tc-tilegx.c (O_hw1_got): Delete operator.
(O_hw2_got): Ditto.
(O_hw3_got): Ditto.
(O_hw2_last_got): Ditto.
(O_hw1_tls_gd): Ditto.
(O_hw2_tls_gd): Ditto.
(O_hw3_tls_gd): Ditto.
(O_hw2_last_tls_gd): Ditto.
(O_hw1_tls_ie): Ditto.
(O_hw2_tls_ie): Ditto.
(O_hw3_tls_ie): Ditto.
(O_hw2_last_tls_ie): Ditto.
(O_hw0_tls_le): Define operator.
(O_hw0_last_tls_le): Ditto.
(O_hw1_last_tls_le): Ditto.
(O_tls_gd_call): Ditto.
(O_tls_gd_add): Ditto.
(O_tls_ie_load): Ditto.
(O_tls_add): Ditto.
(md_begin): Delete old operators; handle new operators.
(emit_tilegx_instruction): Ditto.
(md_apply_fix): Ditto.
* doc/c-tilegx.texi: Delete old operators; document new operators.
* doc/c-tilepro.texi: Ditto.
include/elf/
* tilegx.h (R_TILEGX_IMM16_X0_HW1_GOT): Delete.
(R_TILEGX_IMM16_X1_HW1_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW2_GOT): Ditto.
(R_TILEGX_IMM16_X1_HW2_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW3_GOT): Ditto.
(R_TILEGX_IMM16_X1_HW3_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW2_LAST_GOT): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_GOT): Ditto.
(R_TILEGX_IMM16_X0_HW1_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW1_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW2_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW2_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW3_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW3_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW2_LAST_TLS_GD): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_TLS_GD): Ditto.
(R_TILEGX_IMM16_X0_HW1_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW1_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW2_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW2_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW3_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW3_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW2_LAST_TLS_IE): Ditto.
(R_TILEGX_IMM16_X1_HW2_LAST_TLS_IE): Ditto.
(R_TILEGX_IMM16_X0_HW0_TLS_LE): New relocation.
(R_TILEGX_IMM16_X1_HW0_TLS_LE): Ditto.
(R_TILEGX_IMM16_X0_HW0_LAST_TLS_LE): Ditto.
(R_TILEGX_IMM16_X1_HW0_LAST_TLS_LE): Ditto.
(R_TILEGX_IMM16_X0_HW1_LAST_TLS_LE): Ditto.
(R_TILEGX_IMM16_X1_HW1_LAST_TLS_LE): Ditto.
(R_TILEGX_TLS_GD_CALL): Ditto.
(R_TILEGX_IMM8_X0_TLS_GD_ADD): Ditto.
(R_TILEGX_IMM8_X1_TLS_GD_ADD): Ditto.
(R_TILEGX_IMM8_Y0_TLS_GD_ADD): Ditto.
(R_TILEGX_IMM8_Y1_TLS_GD_ADD): Ditto.
(R_TILEGX_TLS_IE_LOAD): Ditto.
(R_TILEGX_IMM8_X0_TLS_ADD): Ditto.
(R_TILEGX_IMM8_X1_TLS_ADD): Ditto.
(R_TILEGX_IMM8_Y0_TLS_ADD): Ditto.
(R_TILEGX_IMM8_Y1_TLS_ADD): Ditto.
* tilepro.h (R_TILEPRO_TLS_GD_CALL): New relocation.
(R_TILEPRO_IMM8_X0_TLS_GD_ADD): Ditto.
(R_TILEPRO_IMM8_X1_TLS_GD_ADD): Ditto.
(R_TILEPRO_IMM8_Y0_TLS_GD_ADD): Ditto.
(R_TILEPRO_IMM8_Y1_TLS_GD_ADD): Ditto.
(R_TILEPRO_TLS_IE_LOAD): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE_LO): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE_LO): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE_HI): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE_HI): Ditto.
(R_TILEPRO_IMM16_X0_TLS_LE_HA): Ditto.
(R_TILEPRO_IMM16_X1_TLS_LE_HA): Ditto.
include/opcode/
* tilegx.h (tilegx_mnemonic): Add TILEGX_OPC_LD4S_TLS,
TILEGX_OPC_LD_TLS.
* tilepro.h (tilepro_mnemonic): Add TILEPRO_OPC_LW_TLS,
TILEPRO_OPC_LW_TLS_SN.
opcodes/
* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
TILEPRO_OPC_LW_TLS_SN.
2012-02-25 22:24:21 +00:00
37fbb8a741
Move ELF header entries to elf/ChangeLog
2012-01-31 20:00:16 +00:00
6d55bc5c8a
[bfd]
...
* elf32-rl78.c (rl78_elf_howto_table): Add R_RL78_RH_RELAX.
(rl78_reloc_map): Add BFD_RELOC_RL78_RELAX.
(rl78_elf_relocate_section): Add R_RL78_RH_RELAX, R_RL78_RH_SFR,
and R_RL78_RH_SADDR.
(rl78_elf_finish_dynamic_sections): Only validate PLT section if
we didn't relax anything, as relaxing might remove a PLT reference
after we've set up the table.
(elf32_rl78_relax_delete_bytes): New.
(reloc_bubblesort): New.
(rl78_offset_for_reloc): New.
(relax_addr16): New.
(rl78_elf_relax_section): Add support for relaxing long
instructions into short ones.
[gas]
* config/rl78-defs.h (rl78_linkrelax_addr16): Add.
(rl78_linkrelax_dsp, rl78_linkrelax_imm): Remove.
* config/rl78-parse.y: Tag all addr16 and branch patterns with
relaxation markers.
* config/tc-rl78.c (rl78_linkrelax_addr16): New.
(rl78_linkrelax_branch): New.
(OPTION_RELAX): New.
(md_longopts): Add relax option.
(md_parse_option): Add OPTION_RELAX.
(rl78_frag_init): Support relaxation.
(rl78_handle_align): New.
(md_assemble): Support relaxation.
(md_apply_fix): Likewise.
(md_convert_frag): Likewise.
* config/tc-rl78.h (MAX_MEM_FOR_RS_ALIGN_CODE): New.
(HANDLE_ALIGN): New.
(rl78_handle_align): Declare.
* config/rl78-parse.y (rl78_bit_insn): New. Set it for all bit
insn patterns.
(find_bit_index): New. Strip .BIT suffix off relevent
expressions for bit insns.
(rl78_lex): Exclude bit suffixes from expression parsing.
[include/elf]
* rl78.h (R_RL78_RH_RELAX, R_RL78_RH_SFR, R_RL78_RH_SADDR): New.
(RL78_RELAXA_BRA, RL78_RELAXA_ADDR16: New.
2011-12-23 01:49:37 +00:00
9ce2f7534f
include/elf/ChangeLog:
...
* common.h (NT_S390_LAST_BREAK): Define.
(NT_S390_SYSTEM_CALL): Likewise.
bfd/ChangeLog:
* elf-bfd.h (elfcore_write_s390_last_break): Add prototype.
(elfcore_write_s390_system_call): Likewise.
* elf.c (elfcore_write_s390_last_break): New function.
(elfcore_write_s390_system_call): Likewise.
(elfcore_write_register_note): Call them.
(elfcore_grok_s390_last_break): New function.
(elfcore_grok_s390_system_call): Likewise.
(elfcore_grok_note): Call them.
2011-12-06 14:09:12 +00:00
a4cff05a7f
[.]
...
* configure.ac (rl78-*-*) New case.
* configure: Regenerate.
[bfd]
* Makefile.am (ALL_MACHINES): Add cpu-rl78.lo.
(ALL_MACHINES_CFILES): Add cpu-rl78.c.
(BFD32_BACKENDS): Add elf32-rl78.lo.
(BFD32_BACKENDS_CFILES): Add elf32-rl78.c.
(Makefile.in): Regenerate.
* archures.c (bfd_architecture): Define bfd_arch_rl78.
(bfd_archures_list): Add bfd_rl78_arch.
* config.bfd: Add rl78-*-elf.
* configure.in: Add bfd_elf32_rl78_vec.
* reloc.c (bfd_reloc_code_type): Add BFD_RELOC_RL78_* relocations.
* targets.c (bfd_target_vector): Add bfd_elf32_rl78_vec.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* libbfd.h: Regenerate.
* cpu-rl78.c: New file.
* elf32-rl78.c: New file.
[binutils]
* readelf.c: Include elf/rl78.h
(guess_is_rela): Handle EM_RL78.
(dump_relocations): Likewise.
(get_machine_name): Likewise.
(is_32bit_abs_reloc): Likewise.
* NEWS: Mention addition of RL78 support.
* MAINTAINERS: Add myself as RL78 port maintainer.
[gas]
* Makefile.am (TARGET_CPU_CFILES): Add tc-rl78.c.
(TARGET_CPU_HFILES): Add rc-rl78.h.
(EXTRA_DIST): Add rl78-parse.c and rl78-parse.y.
(rl78-parse.c, rl78-parse.h, rl78-parse.o, rl78-defs.h): New rules.
* Makefile.in: Regenerate.
* configure.in: Add rl78 case.
* configure: Regenerate.
* configure.tgt: Add rl78 case.
* config/rl78-defs.h: New file.
* config/rl78-parse.y: New file.
* config/tc-rl78.c: New file.
* config/tc-rl78.h: New file.
* NEWS: Add Renesas RL78.
* doc/Makefile.am (c-rl78.texi): New.
* doc/Makefile.in: Likewise.
* doc/all.texi: Enable it.
* doc/as.texi: Add it.
[include]
* dis-asm.h (print_insn_rl78): Declare.
[include/elf]
* common.h (EM_RL78, EM_78K0R): New.
* rl78.h: New.
[include/opcode]
* rl78.h: New file.
[ld]
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32rl78.c.
(+eelf32rl78.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Add rl78-*-* case.
* emulparams/elf32rl78.sh: New file.
* NEWS: Mention addition of Renesas RL78 support.
[opcodes]
* Makefile.am (TARGET_LIBOPCODES_CFILES): Add rl78-decode.c and
rl78-dis.c.
(MAINTAINERCLEANFILES): Add rl78-decode.c.
(rl78-decode.c): New rule, built from rl78-decode.opc and opc2c.
* Makefile.in: Regenerate.
* configure.in: Add bfd_rl78_arch case.
* configure: Regenerate.
* disassemble.c: Define ARCH_rl78.
(disassembler): Add ARCH_rl78 case.
* rl78-decode.c: New file.
* rl78-decode.opc: New file.
* rl78-dis.c: New file.
2011-11-02 03:09:07 +00:00
4c28f4392a
bfd:
...
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
cpu:
* cpu/epiphany.cpu, cpu/epiphany.opc: New files.
gas:
* NEWS: Mention addition of Adapteva Epiphany support.
* config/tc-epiphany.c, config/tc-epiphany.h: New files.
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* doc/c-epiphany.texi: New file.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/epiphany.h: New file.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld:
* NEWS: Mention addition of Adapteva Epiphany support.
* Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
2011-10-25 11:18:10 +00:00
4fc8a5c90a
include/elf/
...
* ppc64.h (R_PPC64_TOCSAVE): Add.
bfd/
* elf64-ppc.c (ppc64_elf_howto_table): Add R_PPC64_TOCSAVE entry.
(struct ppc_link_hash_table): Add tocsave_htab.
(struct tocsave_entry): New.
(tocsave_htab_hash, tocsave_htab_eq, tocsave_find): New functions.
(ppc64_elf_link_hash_table_create): Create tocsave_htab..
(ppc64_elf_link_hash_table_free): ..and delete it.
(build_plt_stub): Always put STD_R2_40R1 first.
(ppc64_elf_size_stubs): Check for R_PPC64_TOCSAVE following reloc
on plt call. If present add prologue nop location to tocsave_htab.
(ppc64_elf_relocate_section): Convert prologue nop to std. Skip
first insn of plt call stub when R_PPC64_TOCSAVE present.
2011-10-10 13:21:05 +00:00
e402890df2
* readelf.c (get_machine_dlags): Add support for RX's PID mode.
...
* ld-scripts/phdrs.exp: Expect to fail for the RX.
* elf32-rx.c: Add support for PID mode.
(rx_elf_relocate_section): Add checks for unsafe PID relocations.
Include addend in R_RX_SYM relocations.
* config/rx-defs.h (rx_pid_register): New.
(rx_gp_register): New.
* config/rx-parse.y (rx_lex): Add support for %gpreg and %pidreg.
(displacement): Add PID support.
* config/tc-rx.c (rx_pid_mode): New.
(rx_num_int_regs): New.
(rx_pid_register): New.
(rx_gp_register): New.
(options): Add -mpid and -mint-register= options.
(md_longopts): Likewise.
(md_parse_option): Likewise.
(md_show_usage): Likewise.
(rx_pid_symbol): New.
(rx_pidreg_symbol): New.
(rx_gpreg_symbol): New.
(md_begin): Support PID.
(rx_validate_fix_sub): Support PID.
(tc_gen_reloc): Support PID.
* doc/c-rx.texi: Document PID support.
* rx.h (E_FLAG_RX_PID): New.
2011-10-05 14:13:29 +00:00
7661a752ca
Annotate sparc objects with cpu hardware capabilities used.
...
bfd/
* elfxx-sparc.c (_bfd_sparc_elf_merge_private_bfd_data): New.
* elfxx-sparc.h: Declare it.
* elf32-sparc.c (elf32_sparc_merge_private_bfd_data): Call it.
* elf64-sparc.c (elf64_sparc_merge_private_bfd_data): Likewise.
binutils/
* readelf.c (display_sparc_hwcaps): New.
(display_sparc_gnu_attribute): New.
(process_sparc_specific): New.
(process_arch_specific): When EM_SPARC, EM_SPARC32PLUS,
or EM_SPARCV9 invoke process_sparc_specific.
gas/
* config/tc-sparc.c (hwcap_seen): New bitmask, defined when
not TE_SOLARIS.
(sparc_ip): When not TE_SOLARIS, accumulate hwcap bits from
sparc_opcode->flags of instruction into hwcap_seen.
(sparc_md_end): Create Tag_GNU_Sparc_HWCAPS attribute if
hwcap_seen is non-zero and not TE_SOLARIS.
gas/testsuite/
* gas/sparc/hpcvis3.s: Update for fixed fchksum16 mnemonic.
* gas/sparc/hpcvis3.d: Likewise.
include/elf/
* sparc.h (Tag_GNU_Sparc_HWCAPS): New object attribute.
(ELF_SPARC_HWCAP_*): New HWCAPS bitmask values.
include/opcode/
* sparc.h (struct sparc_opcode): Expand 'flags' to unsigned int.
(F_MUL32, F_DIV32, F_FSMULD, F_V8PLUS, F_POPC, F_VIS, F_VIS2,
F_ASI_BLK_INIT, F_FMAF, F_VIS3, F_HPC, F_RANDOM, F_TRANS,
F_FJFMAU, F_IMA, F_ASI_CACHE_SPARING): New flag bits.
opcodes/
* sparc-opc.c (sparc_opcodes): Annotate table with HWCAP flag
bits. Fix "fchksm16" mnemonic.
2011-09-21 20:49:15 +00:00
Steve Ellcey
Nick Clifton
Maciej W. Rozycki
Tristan Gingold
Andreas Krebbel
Yufeng Zhang
Will Newton
Catherine Moore
H.J. Lu
Sandra Loosemore
Tom Tromey
Walter Lee
Iain D Sandoe
James Lemke
David S. Miller
DJ Delorie
Ulrich Weigand
Alan Modra