3461c83a05
2008-03-09 Paul Brook <paul@codesourcery.com>
...
bfd/
* elf32-arm.c (elf32_arm_merge_eabi_attributes): Handle new
Tag_VFP_arch values.
binutils/
* readelf.c (arm_attr_tag_VFP_arch): Add "VFPv3-D16".
gas/
* config/tc-arm.c (fpu_vfp_ext_d32): New vairable.
(parse_vfp_reg_list, encode_arm_vfp_reg): Use it.
(arm_option_cpu_value): Add vfpv3-d16, vfpv2 and vfpv3.
(aeabi_set_public_attributes): Handle Tag_VFP_arch=VFPV3-D16.
* doc/c-arm.texi: Document new ARM FPU variants.
gas/testsuite/
* gas/arm/vfpv3-d16-bad.d: New test.
* gas/arm/vfpv3-d16-bad.l: New test.
include/opcode/
* arm.h (FPU_VFP_EXT_D32, FPU_VFP_V3D16, FPU_ARCH_VFP_V3D16): Define.
2008-03-09 13:23:29 +00:00
e3bf57046b
2008-03-04 Paul Brook <paul@codesourcery.com>
...
gas/
* config/tc-arm.c (arm_ext_barrier, arm_ext_msr): New.
(arm_ext_v7m): Rename...
(arm_ext_m): ... to this. Include v6-M.
(do_t_add_sub): Allow narrow low-reg non flag setting adds.
(do_t_mrs, do_t_msr, aeabi_set_public_attributes): Use arm_ext_m.
(md_assemble): Allow wide msr instructions.
(insns): Add classifications for v6-m instructions.
(arm_cpu_option_table): Add cortex-m1.
(arm_arch_option_table): Add armv6-m.
(cpu_arch): Add ARM_ARCH_V6M. Fix numbering of other v6 variants.
gas/testsuite/
* gas/arm/archv6m.d: New test.
* gas/arm/archv6m.s: New test.
* gas/arm/t16-bad.s: Test low register non flag setting add.
* gas/arm/t16-bad.l: Update expected output.
include/opcode/
* arm.h (ARM_EXT_V6M, ARM_EXT_BARRIER, ARM_EXT_THUMB_MSR): Define.
(ARM_AEXT_V6T2, ARM_AEXT_V7_ARM, ARM_AEXT_V7M): Use new flags.
(ARM_AEXT_V6M, ARM_ARCH_V6M): Define.
2008-03-05 01:31:26 +00:00
193b9a616d
* dwarf2.h: (enum dwarf_location_atom): Add new DW_OP,
...
DW_OP_PGI_omp_thread_num.
* dwarf.c (decode_location_expression): Handle
DW_OP_PGI_omp_thread_num.
2008-03-03 10:19:01 +00:00
fb91cb7a41
Change accreditation for patch for PR3134
2008-02-29 14:43:17 +00:00
ca504a0dee
PR 3134
...
* h8300.h (h8_opcodes): Add an encoding for a mov.l instruction
with a 32-bit displacement but without the top bit of the 4th byte
set.
* gas/h8300/pr3134.s: New test.
* gas/h8300/pr3134.d: Expected disassembly
* gas/h8300/h8300.exp: Run the new test.
* gas/h8300/h8300-coff.exp: Fix test for COFF based ports to
accept h8300-rtemscoff not just h8300-rtems.
2008-02-27 12:33:42 +00:00
344f17f1fa
* cr16.h (cr16_num_optab): Declared.
...
* cr16-opc.c (cr16_num_optab): Defined
2008-02-18 13:46:45 +00:00
d039978069
include/
...
* bfdlink.h (struct bfd_link_hash_table): Delete creator field.
(struct bfd_link_info): Add output_bfd.
bfd/
* elflink.c: Replace all accesses to hash->creator field with
output_bfd->xvec.
* cofflink.c: Likewise.
* coff-h8300.c: Likewise.
* ecoff.c: Likewise.
* elf32-m68hc1x.c: Likewise.
* elf32-ppc.c: Likewise.
* elf64-alpha.c: Likewise.
* elf64-ppc.c: Likewise.
* elf64-sparc.c: Likewise.
* elfxx-mips.c: Likewise.
* i386linux.c: Likewise.
* m68klinux.c: Likewise.
* sparclinux.c: Likewise.
* sunos.c: Likewise.
* xcofflink.c: Likewise.
* linker.c: Likewise.
(_bfd_link_hash_table_init): Don't store creator.
ld/
* ldmain.h (output_bfd): Delete.
* ldmain.c (output_bfd): Delete.
Replace all occurrences of output_bfd with link_info.output_bfd.
* ldcref.c: Likewise.
* ldctor.c: Likewise.
* ldemul.c: Likewise.
* ldexp.c: Likewise.
* ldfile.c: Likewise.
* ldlang.c: Likewise.
* ldmisc.c: Likewise.
* ldwrite.c: Likewise.
* pe-dll.c: Likewise.
* emultempl/aix.em: Likewise.
* emultempl/alphaelf.em: Likewise.
* emultempl/armcoff.em: Likewise.
* emultempl/armelf.em: Likewise.
* emultempl/avrelf.em: Likewise.
* emultempl/beos.em: Likewise.
* emultempl/elf-generic.em: Likewise.
* emultempl/elf32.em: Likewise.
* emultempl/gld960.em: Likewise.
* emultempl/hppaelf.em: Likewise.
* emultempl/irix.em: Likewise.
* emultempl/linux.em: Likewise.
* emultempl/lnk960.em: Likewise.
* emultempl/m68hc1xelf.em: Likewise.
* emultempl/mmix-elfnmmo.em: Likewise.
* emultempl/mmo.em: Likewise.
* emultempl/pe.em: Likewise.
* emultempl/pep.em: Likewise.
* emultempl/ppc32elf.em: Likewise.
* emultempl/ppc64elf.em: Likewise.
* emultempl/scoreelf.em: Likewise.
* emultempl/sh64elf.em: Likewise.
* emultempl/spuelf.em: Likewise.
* emultempl/sunos.em: Likewise.
* emultempl/vanilla.em: Likewise.
* emultempl/vxworks.em: Likewise.
* emultempl/xtensaelf.em: Likewise.
* emultempl/z80.em: Likewise.
* ldlang.c (open_output): Don't return output, instead write
link_info_output_bfd directly.
* emultempl/alphaelf.em: Replace occurrences of link_info.hash->creator
with link_info.output_bfd->xvec.
* emultempl/hppaelf.em: Likewise.
* emultempl/ppc32elf.em: Likewise.
* emultempl/ppc64elf.em: Likewise.
* emultempl/spuelf.em: Likewise.
2008-02-15 03:35:51 +00:00
f16db7f54e
PR gas/2626
...
* avr.h (AVR_ISA_2xxe): Define.
* config/tc-avr.c (mcu_types): Change the ISA tyoe of the attiny26
to AVR_ISA_2xxe.
(avr_operand): Disallow post-increment addressing in the lpm
instruction for the attiny26.
2008-02-14 13:04:29 +00:00
001e850653
* xtensa-config.h (XCHAL_HAVE_THREADPTR): Redefine to zero.
...
(XCHAL_NUM_AREGS, XCHAL_MAX_INSTRUCTION_SIZE): New.
2008-02-11 17:53:04 +00:00
58d470721b
* mips.h: Update copyright.
...
(INSN_CHIP_MASK): New macro.
(INSN_OCTEON): New macro.
(CPU_OCTEON): New macro.
(OPCODE_IS_MEMBER): Handle Octeon instructions.
2008-02-04 19:25:05 +00:00
ce4a642382
* mips.h: Update copyright.
...
(E_MIPS_MACH_OCTEON): New macro.
2008-02-04 19:21:25 +00:00
f022e6b98e
Add OpenVMS extensions.
...
* ia64.h (SHF_IA_64_VMS_GLOBAL, SHF_IA_64_VMS_OVERLAID)
(SHF_IA_64_VMS_SHARED, SHF_IA_64_VMS_VECTOR)
(SHF_IA_64_VMS_ALLOC_64BIT, SHF_IA_64_VMS_PROTECTED)
(SHT_IA_64_VMS_TRACE, SHT_IA_64_VMS_TIE_SIGNATURES)
(SHT_IA_64_VMS_DEBUG, SHT_IA_64_VMS_DEBUG_STR)
(SHT_IA_64_VMS_LINKAGES, SHT_IA_64_VMS_SYMBOL_VECTOR)
(SHT_IA_64_VMS_FIXUP, DT_IA_64_VMS_SUBTYPE)
(DT_IA_64_VMS_IMGIOCNT, DT_IA_64_VMS_LNKFLAGS)
(DT_IA_64_VMS_VIR_MEM_BLK_SIZ, DT_IA_64_VMS_IDENT)
(DT_IA_64_VMS_NEEDED_IDENT, DT_IA_64_VMS_IMG_RELA_CNT)
(DT_IA_64_VMS_SEG_RELA_CNT, DT_IA_64_VMS_FIXUP_RELA_CNT)
(DT_IA_64_VMS_FIXUP_NEEDED, DT_IA_64_VMS_SYMVEC_CNT)
(DT_IA_64_VMS_XLATED, DT_IA_64_VMS_STACKSIZE)
(DT_IA_64_VMS_UNWINDSZ, DT_IA_64_VMS_UNWIND_CODSEG)
(DT_IA_64_VMS_UNWIND_INFOSEG, DT_IA_64_VMS_LINKTIME)
(DT_IA_64_VMS_SEG_NO, DT_IA_64_VMS_SYMVEC_OFFSET)
(DT_IA_64_VMS_SYMVEC_SEG, DT_IA_64_VMS_UNWIND_OFFSET)
(DT_IA_64_VMS_UNWIND_SEG, DT_IA_64_VMS_STRTAB_OFFSET)
(DT_IA_64_VMS_SYSVER_OFFSET, DT_IA_64_VMS_IMG_RELA_OFF)
(DT_IA_64_VMS_SEG_RELA_OFF, DT_IA_64_VMS_FIXUP_RELA_OFF)
(DT_IA_64_VMS_PLTGOT_OFFSET, DT_IA_64_VMS_PLTGOT_SEG)
(DT_IA_64_VMS_FPMODE, SHN_IA_64_VMS_SYMVEC): Define
* readelf.c (dump_relocations): Decode OpenVMS-specific sections.
(get_ia64_dynamic_type): Decode OpenVMS-specific tags.
(get_dynamic_type): Handle IA64-specific tags.
(get_ia64_section_type_name): Handle OpenVMS-specific sections.
(get_section_type_name): Handle OS-specific sections (and
particularly IA64 OpenVMS one).
(get_elf_section_flags): Makes flags static. Add entries for IA64 and
decode them.
2008-01-30 10:37:43 +00:00
a665fef641
include/
...
2008-01-26 David Daney <ddaney@avtrex.com>
* demangle.h (demangle_component_type): Add
DEMANGLE_COMPONENT_JAVA_RESOURCE,
DEMANGLE_COMPONENT_COMPOUND_NAME, and
DEMANGLE_COMPONENT_CHARACTER as new enum values.
(demangle_component): Add struct s_character to union u.
libiberty/
2008-01-26 David Daney <ddaney@avtrex.com>
* cp-demangle.c (d_dump): Handle DEMANGLE_COMPONENT_JAVA_RESOURCE,
DEMANGLE_COMPONENT_COMPOUND_NAME, and
DEMANGLE_COMPONENT_CHARACTER cases.
(d_make_comp): Handle DEMANGLE_COMPONENT_COMPOUND_NAME and
DEMANGLE_COMPONENT_JAVA_RESOURCE cases.
(d_make_character): New function.
(d_java_resource): Same.
(d_special_name): Handle "Gr" case.
(d_print_comp): Handle DEMANGLE_COMPONENT_JAVA_RESOURCE,
DEMANGLE_COMPONENT_COMPOUND_NAME, and
DEMANGLE_COMPONENT_CHARACTER cases.
* testsuite/demangle-expected: Add test for java resource name
mangling.
2008-01-27 06:25:45 +00:00
4be948a34a
/gas:
...
2008-01-23 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Change opcode set for at86rf401.
/include:
2008-01-23 Eric B. Weddington <eric.weddington@atmel.com>
* opcode/avr.h (AVR_ISA_RF401): Add new opcode set for at86rf401.
2008-01-23 17:36:23 +00:00
60308c48f2
* common.h (AT_SUN_AUXFLAGS): Define.
2008-01-16 22:01:42 +00:00
c7b8bedfb2
/gas:
...
2008-01-03 Eric B. Weddington <eric.weddington@atmel.com>
* config/tc-avr.c (mcu_types): Change opcode set for avr3,
at90usb82, at90usb162.
* doc/c-avr.texi: Change architecture grouping for at90usb82,
at90usb162.
These changes support the new avr35 architecture group in gcc.
/include:
2008-01-03 Eric B. Weddington <eric.weddington@atmel.com>
* opcode/avr.h (AVR_ISA_USB162): Add new opcode set.
(AVR_ISA_AVR3): Likewise.
2008-01-16 17:59:07 +00:00
2dba9eb2d4
Updated copyright notices for most files.
2008-01-01 22:53:22 +00:00
fb09a73e93
* dwarf2.h (DW_AT_hi_user): Correct value.
2007-12-11 12:56:21 +00:00
1995e606d8
2007-12-07 Bob Wilson <bob.wilson@acm.org>
...
include/elf/
* xtensa.h (R_XTENSA_32_PCREL): New.
bfd/
* elf32-xtensa.c (elf_howto_table): Add R_XTENSA_32_PCREL.
(elf_xtensa_reloc_type_lookup): Handle BFD_RELOC_32_PCREL.
(elf_xtensa_check_relocs): Use default case for all relocations that
need nothing done here.
(elf_xtensa_do_reloc): Compute self_address for all relocation types.
Handle R_XTENSA_32_PCREL.
(elf_xtensa_relocate_section): Check for R_XTENSA_32_PCREL for dynamic
symbols.
(check_section_ebb_pcrels_fit): Ignore R_XTENSA_32_PCREL relocations.
gas/
* config/tc-xtensa.c (O_pcrel): Define.
(suffix_relocs): Add pcrel suffix.
(md_pseudo_table): Add 4byte and 2byte directives.
(xtensa_elf_cons): Pass correct pcrel argument to fix_new_exp.
(xg_assemble_literal): Likewise. Check for O_pcrel.
(expression_maybe_register): Reorganize. Handle BFD_RELOC_32_PCREL.
(xg_valid_literal_expression): Allow O_pcrel.
(md_pcrel_from, md_apply_fix): Handle BFD_RELOC_32_PCREL.
(tc_gen_reloc): Fix punctuation in error message.
gas/testsuite/
* gas/xtensa/all.exp: Run new pcrel test.
* gas/xtensa/err-pcrel.s: New.
* gas/xtensa/pcrel.d: New.
* gas/xtensa/pcrel.s: New.
* gas/xtensa/xtensa-err.exp: New.
2007-12-07 22:52:08 +00:00
47c9864a0a
bfd/
...
* archures.c (bfd_mach_mips_loongson_2e): New.
(bfd_mach_mips_loongson_2f): New.
* bfd-in2.h (bfd_mach_mips_loongson_2e): New.
(bfd_mach_mips_loongson_2f): New.
* cpu-mips.c: Add I_loongson_2e and I_loongson_2f to
anonymous enum.
(arch_info_struct): Add Loongson-2E and Loongson-2F entries.
* elfxx-mips.c (_bfd_elf_mips_mach): Handle Loongson-2E
and Loongson-2F flags.
(mips_set_isa_flags): Likewise.
(mips_mach_extensions): Add Loongson-2E and Loongson-2F
entries.
binutils/
* readelf.c (get_machine_flags): Handle Loongson-2E and -2F
flags.
gas/
* config/tc-mips.c (mips_cpu_info_table): Add loongson2e
and loongson2f entries.
* doc/c-mips.texi: Document -march=loongson{2e,2f} options.
gas/testsuite/
* gas/mips/mips.exp: Add loongson-2e and -2f tests.
* gas/mips/loongson-2e.d: New.
* gas/mips/loongson-2e.s: New.
* gas/mips/loongson-2f.d: New.
* gas/mips/loongson-2f.s: New.
include/elf/
* mips.h (E_MIPS_MACH_LS2E): New.
(E_MIPS_MACH_LS2F): New.
include/opcode/
* mips.h (INSN_LOONGSON_2E): New.
(INSN_LOONGSON_2F): New.
(CPU_LOONGSON_2E): New.
(CPU_LOONGSON_2F): New.
(OPCODE_IS_MEMBER): Update for Loongson-2E and -2F flags.
opcodes/
* mips-dis.c (mips_arch_choices): Add Loongson-2E and -2F
entries.
* mips-opc.c (IL2E): New.
(IL2F): New.
(mips_builtin_opcodes): Add Loongson-2E and -2F instructions.
Allow movz and movn for Loongson-2E and -2F. Add movnz entry.
Move coprocessor encodings to the end of the table. Allow
certain MIPS V .ps instructions on the Loongson-2E and -2F.
2007-11-29 12:23:44 +00:00
35e137475d
include/opcode/
...
* mips.h (INSN_ISA*): Redefine certain values as an
enumeration. Update comments.
(mips_isa_table): New.
(ISA_MIPS*): Redefine to match enumeration.
(OPCODE_IS_MEMBER): Modify to correctly test new INSN_ISA*
values.
opcodes/
* mips-opc.c (I3_32, I3_33, I4_32, I4_33, I5_33): New.
(mips_builtin_opcodes): Use these new I* values.
2007-11-29 11:55:19 +00:00
02cb1fd853
* internal.h (ELF_IS_SECTION_IN_SEGMENT): Adjust to cope with
...
segments at the end of memory.
2007-11-28 13:53:05 +00:00
91f2f75ac8
[ld/testsuite/ChangeLog]
...
* ld-mips-elf/attr-gnu-4-14.d, ld-mips-elf/attr-gnu-4-41.d:
Adjust warning message for -mfp64 flag.
* ld-mips-elf/attr-gnu-4-5.s, ld-mips-elf/attr-gnu-4-04.d,
ld-mips-elf/attr-gnu-4-51.d, ld-mips-elf/attr-gnu-4-05.d,
ld-mips-elf/attr-gnu-4-15.d, ld-mips-elf/attr-gnu-4-24.d,
ld-mips-elf/attr-gnu-4-25.d, ld-mips-elf/attr-gnu-4-34.d,
ld-mips-elf/attr-gnu-4-35.d, ld-mips-elf/attr-gnu-4-42.d,
ld-mips-elf/attr-gnu-4-43.d, ld-mips-elf/attr-gnu-4-44.d,
ld-mips-elf/attr-gnu-4-45.d, ld-mips-elf/attr-gnu-4-40.d,
ld-mips-elf/attr-gnu-4-14.d: New testcases files.
* ld-mips-elf/mips-elf.exp: Run new testcases.
[binutils/ChangeLog]
* readelf.c (display_mips_gnu_attribute): Recognize -mips32r2 -mfp64
objects.
[include/ChangeLog]
* elf/mips.h (Tag_GNU_MIPS_ABI_FP): Mention -mips32r2 -mfp64 variant
in comment.
[bfd/ChangeLog]
* elfxx-mips.c (mips_elf_merge_obj_attributes): Handle -mips32r2
-mfp64 attribute.
[gas/ChangeLog]
* doc/as.texinfo: Document the new attribute value.
2007-11-17 13:38:57 +00:00
3c48ef66da
* dwarf2.h: Mention the location of the DWARF3 spec on the web.
...
(DW_AT_stride_size): Rename to DW_AT_bit_stride.
(DW_AT_stride): Rename to DW_AT_byte_stride.
* dwarf.c (process_extended_line_op): Add cases for HP extensions to the line ops.
Mention if an unknown op code is in the user defined range.
(decode_location_expression): Add cases for HP extensions, the DW_OP_GNU_uninit extension and the DW_OP_call_frame_cfa and DW_OP_bit_piece DWARF3 operators.
(read_and_display_attr): Correct list of attributes which can reference a location list.
(read_and_display_attr_value): Add cases for DWARF3 values and HP extensions.
Correct list of attributes which can reference a location list.
(get_AT_name): Add cases for DWARF3 values and HP and PGI extensions.
2007-11-16 15:36:21 +00:00
75a1688a39
include/elf/
...
* vxworks.h: New.
bfd/
* elf-vxworks.h (elf_vxworks_add_dynamic_entries): Declare.
(elf_vxworks_finish_dynamic_entry): Declare.
* elf-vxworks.c: Include elf/vxworks.h.
(elf_vxworks_add_dynamic_entries): New.
(elf_vxworks_finish_dynamic_entry): New.
* Makefile.am (elf-vxworks.lo): Add dependency.
* Makefile.in (elf-vxworks.lo): Add dependency.
* elf32-i386.c (elf_i386_size_dynamic_sections,
elf_i386_finish_dynamic_sections): Call
elf_vxworks_add_dynamic_entries and
elf_vxworks_finish_dynamic_entry.
* elf32-ppc.c (ppc_elf_size_dynamic_sections,
ppc_elf_finish_dynamic_sections): Likewise.
* elfxx-sparc.c (_bfd_sparc_elf_size_dynamic_sections,
sparc_finish_dyn): Likewise.
* elf32-sh.c (sh_elf_size_dynamic_sections,
sh_elf_finish_dynamic_sections): Likewise.
* elfxx-mips.c (_bfd_mips_elf_size_dynamic_sections,
_bfd_mips_elf_finish_dynamic_sections): Likewise.
* elf32-arm.c (elf32_arm_size_dynamic_sections,
elf32_arm_finish_dynamic_sections): Likewise.
ld/
* ld-vxworks/tls-2.d: New.
* ld-vxworks/tls-2.s: New.
2007-11-08 13:51:07 +00:00
33e178064d
include:
...
2007-11-07 Joseph Myers <joseph@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
* floatformat.h (struct floatformat): Add split_half field.
(floatformat_ibm_long_double): New.
libiberty:
2007-11-07 Joseph Myers <joseph@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
* floatformat.c (mant_bits_set): New.
(floatformat_to_double): Use it. Note no special handling of
split formats.
(floatformat_from_double): Note no special handing of split
formats.
(floatformat_ibm_long_double_is_valid,
floatformat_ibm_long_double): New.
(floatformat_ieee_single_big, floatformat_ieee_single_little,
floatformat_ieee_double_big, floatformat_ieee_double_little,
floatformat_ieee_double_littlebyte_bigword, floatformat_vax_f,
floatformat_vax_d, floatformat_vax_g, floatformat_i387_ext,
floatformat_m68881_ext, floatformat_i960_ext,
floatformat_m88110_ext, floatformat_m88110_harris_ext,
floatformat_arm_ext_big, floatformat_arm_ext_littlebyte_bigword,
floatformat_ia64_spill_big, floatformat_ia64_spill_little,
floatformat_ia64_quad_big, floatformat_ia64_quad_little): Update
for addition of split_half field.
gdb:
2007-11-07 Joseph Myers <joseph@codesourcery.com>
Daniel Jacobowitz <dan@codesourcery.com>
* gdbtypes.c (floatformats_ibm_long_double): New.
* gdbtypes.h (floatformats_ibm_long_double): Declare.
* ia64-tdep.c (floatformat_ia64_ext): Update for addition of
split_half field.
* mips-tdep.c (n32n64_floatformat_always_valid,
floatformat_n32n64_long_double_big, floatformats_n32n64_long):
Remove.
(mips_gdbarch_init): Use floatformats_ibm_long_double instead of
floatformats_n32n64_long.
* ppc-linux-tdep.c (ppc_linux_init_abi): Use 128-bit IBM long
double.
* doublest.c (convert_floatformat_to_doublest,
convert_doublest_to_floatformat): Handle split floating-point
formats.
* ppc-sysv-tdep.c (ppc_sysv_abi_push_dummy_call): Handle IBM long
double arguments.
(ppc64_sysv_abi_push_dummy_call): Likewise.
(do_ppc_sysv_return_value): Handle IBM long double return.
2007-11-08 00:08:48 +00:00
026d54aa23
include
...
* coff/pe.h (COFF_ENCODE_ALIGNMENT) Define.
gas
* read.c (ALIGN_LIMIT): Rename to ...
(TC_ALIGN_LIMIT): Guard against prior definition.
* config/tc-i386.h (TC_ALIGN_LIMIT)[TE_PE]: Define.
bfd
* pe-i386.c (COFF_SECTION_ALIGNMENT_ENTRIES): Let .data, .text
and .bss section use the default.
* pei-i386.c (COFF_SECTION_ALIGNMENT_ENTRIES): Likewise.
ld/testsuite
* ld-scripts/align.exp: Enable for PECOFF.
* ld-scripts/alignof.exp: Likewise.
2007-11-04 23:49:08 +00:00
3ce8215a01
* mn10300.h (R_MN10300_ALIGN): Define.
...
* reloc.c (BFD_RELOC_MN10300_ALIGN): Add.
* bfd-in2.h: Regenerate.
* libbfd.h: Regenerate.
* elf-m10300.h: Handle R_MN10300_ALIGN relocs.
* mn10300_elf_relax_delete_bytes): Honour R_MN10300_ALIGN relocs.
Re-fix off by one error in comparisons.
* config/tc-mn10300.c (tc_gen_reloc): Fix test that decides when
sym_diff relocs should be generated.
(md_apply_fix): Skip R_MN10300_ALIGN relocs.
(mn10300_fix_adjustable): Do not adjust R_MN10300_ALIGN relocs.
(mn10300_handle_align): New function. Generate R_MN10300_ALIGN
relocs to record alignment requests.
* config/tc-mn10300.h (TC_FORCE_RELOCATION_SUB_SAME): Also force
R_MN10300_ALIGN relocs.
(HANDLE_ALIGN): Define. Call mn10300_handle_align.
* gas/all/gas.exp: Do not run diff1.s test for mn10300.
* ld-mn10300/mn10300.exp: Run new tests. Skip i126256 test if
a compiler is not available.
* ld-mn10300/i112045-3.s: New test.
* ld-mn10300/i112045-3.d: Expected disassembly.
* ld-mn10300/i135409.s: Rename to i135409-1.s.
* ld-mn10300/i135409.d: Rename to i135409-1.d
* ld-mn10300/i135409-2.s: New test.
* ld-mn10300/i135409-2.d: Expected symbol table.
* ld-mn10300/i36434.d: Adjust expected disassembly.
2007-10-30 15:18:29 +00:00
2b50cd503e
* elf32-ppc.c (ppc_elf_merge_obj_attributes): Add support for
...
Tag_GNU_Power_ABI_Vector.
* readelf.c (display_power_gnu_attribute): Add support for
Tag_GNU_Power_ABI_Vector.
* ppc.h (Tag_GNU_Power_ABI_Vector): New.
* ld-powerpc/attr-gnu-8-1.s, ld-powerpc/attr-gnu-8-11.d,
ld-powerpc/attr-gnu-8-2.s, ld-powerpc/attr-gnu-8-23.d,
ld-powerpc/attr-gnu-8-3.s, ld-powerpc/attr-gnu-8-31.d: New.
* ld-powerpc/powerpc.exp: Run new tests.
2007-10-25 15:20:24 +00:00
873e6f9d97
Add MN10300 linker relaxation support for symbol differences
2007-10-19 17:31:31 +00:00
ffa1a46abd
.
2007-10-18 09:57:07 +00:00
5565177f97
2007-10-18 Roland McGrath <roland@redhat.com>
...
* common.h (NT_PPC_VMX): New macro.
2007-10-18 09:57:04 +00:00
dd52035079
* NEWS: Document target described register support for PowerPC.
...
* ppc-tdep.h: Remove ppc_spr constants.
(struct gdbarch_tdep): Remove regs, ppc_sr0_regnum, and
ppc_builtin_type_vec128 members.
(PPC_R0_REGNUM, PPC_F0_REGNUM, PPC_PC_REGNUM, PPC_MSR_REGNUM)
(PPC_CR_REGNUM, PPC_LR_REGNUM, PPC_CTR_REGNUM, PPC_XER_REGNUM)
(PPC_FPSCR_REGNUM, PPC_MQ_REGNUM, PPC_SPE_UPPER_GP0_REGNUM)
(PPC_SPE_ACC_REGNUM, PPC_SPE_FSCR_REGNUM, PPC_VR0_REGNUM)
(PPC_VSCR_REGNUM, PPC_VRSAVE_REGNUM, PPC_NUM_REGS): New constants.
* rs6000-tdep.c: Include preparsed descriptions.
(init_sim_regno_table): Do not iterate over pseudo registers.
Look up segment registers by name. Use sim_spr_register_name
for SPRs.
(rs6000_register_sim_regno): Call init_sim_regno_table here.
(rs6000_builtin_type_vec128): Delete.
(rs6000_register_name): Only handle SPE pseudo registers and upper
halves. Call tdesc_register_name for everything else.
(rs6000_register_type): Delete. Replace with...
(rs6000_pseudo_register_type): ...this new function. Only handle
SPE pseudo registers.
(rs6000_register_reggroup_p): Delete. Replace with...
(rs6000_pseudo_register_reggroup_p): ...this new function. Only
handle SPE pseudo registers.
(rs6000_convert_register_p): Use ppc_fp0_regnum instead of
"struct reg".
(rs6000_register_to_value, rs6000_value_to_register): Remove check
of reg->fpr.
(e500_register_reggroup_p): Delete.
(STR, R, R4, R8, R16, F, P8, R32, R64, R0, A4, S, S4, SN4, S64)
(COMMON_UISA_REGS, PPC_UISA_SPRS, PPC_UISA_NOFP_SPRS)
(PPC_SEGMENT_REGS, PPC_OEA_SPRS, PPC_ALTIVEC_REGS, PPC_SPE_GP_REGS)
(PPC_SPE_UPPER_GP_REGS, PPC_EV_PSEUDO_REGS): Delete macros.
(registers_powerpc, registers_403, registers_403GC, registers_505)
(registers_860, registers_601, registers_602, registers_603)
(registers_604, registers_750, registers_7400, registers_e500): Delete
variables.
(struct variant): Delete nregs, npregs, num_tot_regs, and regs. Add
tdesc.
(tot_num_registers, num_registers, num_pseudo_registers): Delete.
(variants): Delete outdated comment. Use standard target descriptions
instead of "struct reg" arrays.
(init_variants): Delete.
(rs6000_gdbarch_init): Do not guess word size from the BFD
architecture if we have a target description. Select a variant
before creating a new architecture. Use the variant's target
description if the target did not define a register layout.
Validate target-supplied registers. Reject mismatches. Use
fixed register numbers and new constants instead of magic
numbers. Call set_gdbarch_ps_regnum. Call tdesc_use_registers.
(_initialize_rs6000_tdep): Initialize the preparsed target
descriptions.
* target-descriptions.c (tdesc_predefined_types): Add int128 and
uint128.
(tdesc_find_register_early): New function.
(tdesc_numbered_register): Use it.
(tdesc_register_size): New function.
(tdesc_use_registers): Take a target_desc argument. Do not use
gdbarch_target_desc.
* target-descriptions.h (tdesc_use_registers): Update prototype
and comment.
(tdesc_register_size): New prototype.
* Makefile.in (powerpc_32_c, powerpc_403_c, powerpc_403gc_c)
(powerpc_505_c, powerpc_601_c, powerpc_602_c, powerpc_603_c)
(powerpc_604_c, powerpc_64_c, powerpc_7400_c, powerpc_750_c)
(powerpc_860_c, powerpc_e500_c, rs6000_c): New macros.
(rs6000-tdep.o): Update.
* arm-tdep.c (arm_gdbarch_init): Update call to tdesc_use_registers.
* m68k-tdep.c (m68k_gdbarch_init): Likewise.
* mips-tdep.c (mips_gdbarch_init): Likewise.
* gdb.texinfo (Predefined Target Types): Add int128
and uint128.
(Standard Target Features): Add PowerPC features.
* gdb.xml/tdesc-regs.exp: Add PowerPC support.
* sim-ppc.h (sim_spr_register_name): New prototype.
* gdb-sim.c (regnum2spr): Rename to...
(sim_spr_register_name): ... this. Make global.
2007-10-15 19:45:31 +00:00
baa0b44938
2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com>
...
* callback.c (cb_is_stdin, cb_is_stdout, cb_is_stderr): Add functions.
* syscall.c (cb_syscall): Test for stdin/out/err, not just fd 0/1/2.
2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com>
* callback.h (cb_is_stdin, cb_is_stdout, cb_is_stderr): Add prototypes.
2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com>
* sim/cris/c/freopen2.c: Added testcase.
2007-10-11 18:44:06 +00:00
0f07c3b30f
2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com>
...
* callback.c (cb_is_stdin): Add.
* syscall.c (cb_syscall): Test for stdin, not just fd 0.
2007-10-11 Jesper Nilsson <jesper.nilsson@axis.com>
* callback.h (cb_is_stdin): Add prototype.
2007-10-11 18:40:28 +00:00
5716854549
Various CR16 fixes
2007-10-01 15:55:40 +00:00
668b4a9519
bfd/
...
2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/3281
PR binutils/5037
* elf-bfd.h (elf_obj_tdata): Remove relro.
* elf.c (get_program_header_size): Check info->relro instead
of elf_tdata (abfd)->relro.
(_bfd_elf_map_sections_to_segments): Likewise.
(assign_file_positions_for_load_sections): Don't set
PT_GNU_RELRO segment alignment here.
(assign_file_positions_for_non_load_sections): Properly set up
PT_GNU_RELRO segment for copying executable/shared library.
(rewrite_elf_program_header): Remove PT_GNU_RELRO segment.
(copy_elf_program_header): Set p_size and p_size_valid fields for
PT_GNU_RELRO segment.
include/elf/
2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/3281
PR binutils/5037
* internal.h (elf_segment_map): Add p_size and p_size_valid.
(ELF_IS_SECTION_IN_SEGMENT): Allow SHF_TLS sections in
PT_GNU_RELRO segments.
ld/
2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/3281
PR binutils/5037
* ldexp.h (ldexp_control): Add relro, relro_start_stat and
relro_end_stat.
* ldexp.c (fold_binary): Set expld.dataseg.relro to
exp_dataseg_relro_start or exp_dataseg_relro_end when
seeing DATA_SEGMENT_ALIGN or DATA_SEGMENT_RELRO_END,
respectively.
* ldlang.c (lang_size_sections_1): Properly set
expld.dataseg.relro_start_stat and
expld.dataseg.relro_end_stat.
(find_relro_section_callback): New function.
(lang_find_relro_sections_1): Likewise.
(lang_find_relro_sections): Likewise.
(lang_process): Call lang_find_relro_sections for
non-relocatable link.
ld/testsuite/
2007-09-17 H.J. Lu <hongjiu.lu@intel.com>
PR binutils/3281
PR binutils/5037
* ld-elf/binutils.exp: Update "-z relro" tests to use relro1.s.
Add "-z relro" tests with relro2.s. Add "-z relro" tests with
TLS for objcopy.
* ld-elf/relro1.s: New file.
* ld-elf/relro2.s: Likewise.
2007-09-18 00:25:07 +00:00
cfc7cd1274
bfd/
...
* archures.c: Add bfd_mach_mcf_isa_c_nodiv,
bfd_mach_mcf_isa_c_nodiv_mac & bfd_mach_mcf_isa_c_nodiv_emac.
* ieee.c (ieee_write_processor): Update coldfire architecture
list.
* bfd-in2.h: Rebuilt.
* cpu-m68k.c (arch_info_struct): Add isa_c nodiv architectures.
(m68k_arch_features): Likewise.
* elf32-m68k.c (elf32_m68k_object_p): Add EF_M68K_CF_ISA_C_NODIV.
(elf32_m68k_print_private_bfd_data): Likewise.
gas/
* config/tc-m68k.c (m68k_ip): Add mcfisa_c case.
(m68k_elf_final_processing): Add EF_M68K_CF_ISA_C_NODIV.
include/elf/
* m68k.h (EF_M68K_CF_ISA_C_NODIV): New.
2007-09-11 16:07:50 +00:00
b95701711b
merge from gcc
2007-09-06 17:22:36 +00:00
95500c2eff
merge from gcc
2007-08-31 20:20:44 +00:00
80bed8e0a4
include/elf/
...
* common.h (NT_SPU): Define.
bfd/
* elf.c (elfcore_grok_spu_note): New function.
(elf_parse_notes): Call it.
binutils/
* readelf.c (process_note): Recognize SPU core file notes.
2007-08-25 13:20:40 +00:00
4b8c903325
binutils/
...
* doc/binutils.texi (objdump): Document -Mppcps.
gas/
* config/tc-ppc.c (parse_cpu): Handle "750cl".
(pre_defined_registers): Add "gqr0" to "gqr7", "gqr.0" to "gqr.7".
(md_show_usage): Document -m750cl.
(md_assemble): Handle two delimiters in succession (eg. `),').
* doc/c-ppc.texi (PowerPC-Opts): Document -m750cl.
* testsuite/gas/ppc/ppc.exp: Run ppc70ps dump tests.
* testsuite/gas/ppc/ppc750ps.s: New file.
* testsuite/gas/ppc/ppc750ps.d: Likewise.
include/opcode/
* ppc.h (PPC_OPCODE_PPCPS): New.
opcodes/
* ppc-opc.c (PSW, PSWM, PSQ, PSQM, PSD, MTMSRD_L): New.
(XOPS, XOPS_MASK, XW, XW_MASK): Likewise.
(PPCPS): Likewise.
(powerpc_opcodes): Add all pair singles instructions.
* ppc-dis.c (powerpc_dialect): Handle "ppcps".
(print_ppc_disassembler_options): Document -Mppcps.
2007-08-24 00:56:30 +00:00
fc32145a4c
Switch the license of all .h files to GPLv3.
2007-08-23 18:17:33 +00:00
49813813a7
bfd/
...
2007-08-16 H.J. Lu <hongjiu.lu@intel.com>
* elf.c: Revert last change.
binutils/
2007-08-16 H.J. Lu <hongjiu.lu@intel.com>
* readelf.c: Revert last change.
include/elf/
2007-08-16 H.J. Lu <hongjiu.lu@intel.com>
* common.h: Revert last change.
2007-08-16 18:49:42 +00:00
0abbc9f1d0
bfd/
...
2007-08-16 H.J. Lu <hongjiu.lu@intel.com>
* elf.c (get_segment_type): Change PT_GNU_STACK to PT_GNU_ATTR.
(bfd_section_from_phdr): Likewise.
(get_program_header_size): Likewise. Add a PT_GNU_ATTR segment
if there is an attribute section.
(_bfd_elf_map_sections_to_segments): Likewise.
(IS_SECTION_IN_INPUT_SEGMENT): Likewise.
binutils/
2007-08-16 H.J. Lu <hongjiu.lu@intel.com>
* readelf.c (get_segment_type): Change PT_GNU_STACK to
PT_GNU_ATTR.
include/elf/
2007-08-16 H.J. Lu <hongjiu.lu@intel.com>
* common.h (PT_GNU_STACK): Renamed to ...
(PT_GNU_ATTR): This.
(PT_GNU_STACK): New. Make an alias of PT_GNU_ATTR.
2007-08-16 13:38:09 +00:00
191814588a
bfd/
...
2007-08-02 H.J. Lu <hongjiu.lu@intel.com>
* coffcode.h (ALIGN_SET): Removed.
(ELIFALIGN_SET): Likewise.
(coff_set_alignment_hook): Handle IMAGE_SCN_ALIGN_128BYTES,
IMAGE_SCN_ALIGN_256BYTES, IMAGE_SCN_ALIGN_512BYTES,
IMAGE_SCN_ALIGN_1024BYTES, IMAGE_SCN_ALIGN_2048BYTES,
IMAGE_SCN_ALIGN_4096BYTES and IMAGE_SCN_ALIGN_8192BYTES.
include/coff/
2007-08-02 H.J. Lu <hongjiu.lu@intel.com>
* pe.h (IMAGE_SCN_ALIGN_POWER_BIT_POS): New.
(IMAGE_SCN_ALIGN_POWER_BIT_MASK): Likewise.
(IMAGE_SCN_ALIGN_POWER_NUM): Likewise.
(IMAGE_SCN_ALIGN_POWER_CONST): Likewise.
(IMAGE_SCN_ALIGN_128BYTES): Likewise.
(IMAGE_SCN_ALIGN_256BYTES): Likewise.
(IMAGE_SCN_ALIGN_512BYTES): Likewise.
(IMAGE_SCN_ALIGN_1024BYTES): Likewise.
(IMAGE_SCN_ALIGN_2048BYTES): Likewise.
(IMAGE_SCN_ALIGN_4096BYTES): Likewise.
(IMAGE_SCN_ALIGN_8192BYTES): Likewise.
(IMAGE_SCN_ALIGN_1BYTES): Redefined with
IMAGE_SCN_ALIGN_POWER_CONST.
(IMAGE_SCN_ALIGN_2BYTES): Likewise.
(IMAGE_SCN_ALIGN_4BYTES): Likewise.
(IMAGE_SCN_ALIGN_8BYTES): Likewise.
(IMAGE_SCN_ALIGN_16BYTES): Likewise.
(IMAGE_SCN_ALIGN_32BYTES): Likewise.
(IMAGE_SCN_ALIGN_64BYTES): Likewise.
2007-08-02 16:02:01 +00:00
13c9f5c677
Correct ChangeLog entries.
2007-08-01 15:27:55 +00:00
5965160bbd
* ternary.h: Remove.
2007-07-25 06:34:29 +00:00
be52c4c7c8
* xtensa-config.h (XCHAL_HAVE_THREADPTR): New.
...
(XCHAL_HAVE_RELEASE_SYNC, XCHAL_HAVE_S32C1I): New.
2007-07-18 18:52:30 +00:00
6d7b197b57
* COPYING3: New file. Contains version 3 of the GNU General Public License.
...
* COPYING3.LIB: New file. Contains version 3 of the GNU Lesser General Public License.
2007-07-17 13:50:23 +00:00
Paul Brook
Nick Clifton
Alan Modra
Bob Wilson
Adam Nemet
David Daney
Eric Weddington
Mark Kettenis
Daniel Jacobowitz
Mark Shinwell
Nathan Sidwell
Thiemo Seufer
Joseph Myers
Danny Smith
Roland McGrath
H.J. Lu
Kazu Hirata
DJ Delorie
Ben Elliston
Joel Brobecker