Add BSP and semihosting library for nios2-generic-nommu QEMU emulation.
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Sandra Loosemore
committed by
Corinna Vinschen
Corinna Vinschen
parent
054ff18f5f
commit
fddc74d12b
140
libgloss/nios2/crt0.S
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140
libgloss/nios2/crt0.S
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/* crt0.S -- startup code for Nios II QEMU generic-nommu board emulation.
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Copyright (c) 2018 Mentor Graphics
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The authors hereby grant permission to use, copy, modify, distribute,
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and license this software and its documentation for any purpose, provided
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that existing copyright notices are retained in all copies and that this
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notice is included verbatim in any distributions. No written agreement,
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license, or royalty fee is required for any of the authorized uses.
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Modifications to this software may be copyrighted by their authors
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and need not follow the licensing terms described here, provided that
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the new terms are clearly indicated on the first page of each file where
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they apply.
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Parts of this file were derived from code written by Altera Corporation
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and distributed under the following license:
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Copyright (c) 2006 Altera Corporation, San Jose, California, USA.
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All rights reserved.
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Permission is hereby granted, free of charge, to any person obtaining a
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copy of this software and associated documentation files (the "Software"),
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to deal in the Software without restriction, including without limitation
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the rights to use, copy, modify, merge, publish, distribute, sublicense,
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and/or sell copies of the Software, and to permit persons to whom the
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Software is furnished to do so, subject to the following conditions:
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The above copyright notice and this permission notice shall be included in
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all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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DEALINGS IN THE SOFTWARE.
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This agreement shall be governed in all respects by the laws of the State
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of California and by the laws of the United States of America.
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*/
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/* Cache sizes. */
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#define NIOS2_ICACHE_LINE_SIZE 32
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#define NIOS2_ICACHE_SIZE 32768
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#define NIOS2_DCACHE_LINE_SIZE 32
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#define NIOS2_DCACHE_SIZE 32768
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/* External symbols. */
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.globl __stack
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.globl __gp
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.globl __bss_start
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.globl __bss_end
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.weak exit
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/* Processor reset code lives at the base of RAM. At reset, only the cache
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line that contains the reset vector is initialized; the reset code has
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to fit in this cache line and initialize the remainder of the instruction
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cache. */
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.section .text.entry, "ax"
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.align 5
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.set noat
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.globl __reset
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.type __reset, @function
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__reset:
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/* Initialize the icache. */
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movui r2, NIOS2_ICACHE_SIZE
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0:
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initi r2
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addi r2, r2, -NIOS2_ICACHE_LINE_SIZE
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bgt r2, zero, 0b
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1:
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/* Jump to the __start entry point. */
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movhi r1, %hi(__start)
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ori r1, r1, %lo(__start)
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jmp r1
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.size __reset, . - __reset
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/* __start is the ELF entry point. */
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.section .text.start, "ax"
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.align 4
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.globl __start
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.type __start, @function
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__start:
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/* Initialize the data cache. */
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movui r2, NIOS2_DCACHE_SIZE
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0:
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initd 0(r2)
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addi r2, r2, -NIOS2_DCACHE_LINE_SIZE
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bgt r2, zero, 0b
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1:
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/* Initialize the stack pointer. */
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movhi sp, %hi(__stack)
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ori sp, sp, %lo(__stack)
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/* Initialize the GP. */
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movhi gp, %hi(_gp)
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ori gp, gp, %lo(_gp)
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/* Clear BSS. */
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movhi r2, %hi(__bss_start)
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ori r2, r2, %lo(__bss_start)
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movhi r3, %hi(__bss_end)
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ori r3, r3, %lo(__bss_end)
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beq r2, r3, 1f
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0:
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stw zero, (r2)
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addi r2, r2, 4
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bltu r2, r3, 0b
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1:
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/* Run initializers. */
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call __libc_init_array
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/* Call the C entry point. */
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mov r4, zero /* argc */
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mov r5, zero /* argv */
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call main
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/* If main returns, call exit if it is defined. */
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movhi r3, %hi(exit)
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ori r3, r3, %lo(exit)
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beq r3, zero, 2f
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mov r4, r2 /* exit status from main */
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callr r3
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/* Otherwise sit in busy loop. */
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2:
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br 2b
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.size __start, . - __start
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