include/opcode/
* mips.h: Document microMIPS DSP ASE usage. (MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Update for microMIPS DSP ASE support. (MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise. (MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise. (MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise. (MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise. (MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise. (MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise. (MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise. gas/ * config/tc-mips.c (macro_build) <'2'>: Handle microMIPS. (macro) <M_BALIGN>: Update error handling. (validate_micromips_insn) <'2', '3', '4', '5', '6'>: New cases. <'7', '8', '0', '@', '^'>: Likewise. (mips_ip) <'2', '3', '4', '5', '6', '7', '8'>: Handle microMIPS. <'9'>: Fix formatting. <'0', '@'>: Handle microMIPS. <'^'>: New case. gas/testsuite/ * gas/mips/micromips@mips32-dsp.d: New. * gas/mips/micromips@mips32-dspr2.d: New. * gas/mips/mips32-dsp.d: Remove -mips32r2. * gas/mips/mips32-dspr2.d: Likewise. * gas/mips/mips.exp: (mips_create_arch): Use -mips64r2 for micromips. Use run_dump_test_arches to run dsp tests. opcodes/ * micromips-opc.c (WR_a, RD_a, MOD_a): New macros. (DSP_VOLA): Likewise. (D32, D33): Likewise. (micromips_opcodes): Add DSP ASE instructions. * micromips-dis.c (print_insn_micromips) <'2', '3'>: New cases. <'4', '5', '6', '7', '8', '0', '^', '@'>: Likewise.
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@ -1,3 +1,18 @@
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2012-07-31 Chao-Ying Fu <fu@mips.com>
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Catherine Moore <clm@codesourcery.com>
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Maciej W. Rozycki <macro@codesourcery.com>
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* mips.h: Document microMIPS DSP ASE usage.
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(MICROMIPSOP_MASK_DSPACC, MICROMIPSOP_SH_DSPACC): Update for
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microMIPS DSP ASE support.
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(MICROMIPSOP_MASK_DSPSFT, MICROMIPSOP_SH_DSPSFT): Likewise.
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(MICROMIPSOP_MASK_SA3, MICROMIPSOP_SH_SA3): Likewise.
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(MICROMIPSOP_MASK_SA4, MICROMIPSOP_SH_SA4): Likewise.
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(MICROMIPSOP_MASK_IMM8, MICROMIPSOP_SH_IMM8): Likewise.
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(MICROMIPSOP_MASK_IMM10, MICROMIPSOP_SH_IMM10): Likewise.
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(MICROMIPSOP_MASK_WRDSP, MICROMIPSOP_SH_WRDSP): Likewise.
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(MICROMIPSOP_MASK_BP, MICROMIPSOP_SH_BP): Likewise.
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2012-07-06 Maciej W. Rozycki <macro@codesourcery.com>
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2012-07-06 Maciej W. Rozycki <macro@codesourcery.com>
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* mips.h: Fix a typo in description.
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* mips.h: Fix a typo in description.
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@ -1494,6 +1494,24 @@ extern const int bfd_mips16_num_opcodes;
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#define MICROMIPSOP_MASK_IMMY 0x1ff
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#define MICROMIPSOP_MASK_IMMY 0x1ff
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#define MICROMIPSOP_SH_IMMY 1
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#define MICROMIPSOP_SH_IMMY 1
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/* MIPS DSP ASE */
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#define MICROMIPSOP_MASK_DSPACC 0x3
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#define MICROMIPSOP_SH_DSPACC 14
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#define MICROMIPSOP_MASK_DSPSFT 0x3f
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#define MICROMIPSOP_SH_DSPSFT 16
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#define MICROMIPSOP_MASK_SA3 0x7
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#define MICROMIPSOP_SH_SA3 13
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#define MICROMIPSOP_MASK_SA4 0xf
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#define MICROMIPSOP_SH_SA4 12
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#define MICROMIPSOP_MASK_IMM8 0xff
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#define MICROMIPSOP_SH_IMM8 13
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#define MICROMIPSOP_MASK_IMM10 0x3ff
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#define MICROMIPSOP_SH_IMM10 16
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#define MICROMIPSOP_MASK_WRDSP 0x3f
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#define MICROMIPSOP_SH_WRDSP 14
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#define MICROMIPSOP_MASK_BP 0x3
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#define MICROMIPSOP_SH_BP 14
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/* Placeholders for fields that only exist in the traditional 32-bit
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/* Placeholders for fields that only exist in the traditional 32-bit
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instruction encoding; see the comment above for details. */
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instruction encoding; see the comment above for details. */
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#define MICROMIPSOP_MASK_CODE20 0
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#define MICROMIPSOP_MASK_CODE20 0
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@ -1508,28 +1526,12 @@ extern const int bfd_mips16_num_opcodes;
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#define MICROMIPSOP_SH_VECBYTE 0
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#define MICROMIPSOP_SH_VECBYTE 0
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#define MICROMIPSOP_MASK_VECALIGN 0
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#define MICROMIPSOP_MASK_VECALIGN 0
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#define MICROMIPSOP_SH_VECALIGN 0
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#define MICROMIPSOP_SH_VECALIGN 0
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#define MICROMIPSOP_MASK_DSPACC 0
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#define MICROMIPSOP_SH_DSPACC 0
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#define MICROMIPSOP_MASK_DSPACC_S 0
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#define MICROMIPSOP_MASK_DSPACC_S 0
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#define MICROMIPSOP_SH_DSPACC_S 0
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#define MICROMIPSOP_SH_DSPACC_S 0
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#define MICROMIPSOP_MASK_DSPSFT 0
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#define MICROMIPSOP_SH_DSPSFT 0
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#define MICROMIPSOP_MASK_DSPSFT_7 0
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#define MICROMIPSOP_MASK_DSPSFT_7 0
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#define MICROMIPSOP_SH_DSPSFT_7 0
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#define MICROMIPSOP_SH_DSPSFT_7 0
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#define MICROMIPSOP_MASK_SA3 0
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#define MICROMIPSOP_SH_SA3 0
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#define MICROMIPSOP_MASK_SA4 0
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#define MICROMIPSOP_SH_SA4 0
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#define MICROMIPSOP_MASK_IMM8 0
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#define MICROMIPSOP_SH_IMM8 0
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#define MICROMIPSOP_MASK_IMM10 0
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#define MICROMIPSOP_SH_IMM10 0
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#define MICROMIPSOP_MASK_WRDSP 0
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#define MICROMIPSOP_SH_WRDSP 0
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#define MICROMIPSOP_MASK_RDDSP 0
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#define MICROMIPSOP_MASK_RDDSP 0
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#define MICROMIPSOP_SH_RDDSP 0
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#define MICROMIPSOP_SH_RDDSP 0
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#define MICROMIPSOP_MASK_BP 0
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#define MICROMIPSOP_SH_BP 0
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#define MICROMIPSOP_MASK_MT_U 0
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#define MICROMIPSOP_MASK_MT_U 0
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#define MICROMIPSOP_SH_MT_U 0
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#define MICROMIPSOP_SH_MT_U 0
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#define MICROMIPSOP_MASK_MT_H 0
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#define MICROMIPSOP_MASK_MT_H 0
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@ -1702,6 +1704,18 @@ extern const int bfd_mips16_num_opcodes;
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"f" 32-bit floating point constant
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"f" 32-bit floating point constant
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"l" 32-bit floating point constant in .lit4
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"l" 32-bit floating point constant in .lit4
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DSP ASE usage:
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"2" 2-bit unsigned immediate for byte align (MICROMIPSOP_*_BP)
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"3" 3-bit unsigned immediate (MICROMIPSOP_*_SA3)
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"4" 4-bit unsigned immediate (MICROMIPSOP_*_SA4)
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"5" 8-bit unsigned immediate (MICROMIPSOP_*_IMM8)
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"6" 5-bit unsigned immediate (MICROMIPSOP_*_RS)
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"7" 2-bit DSP accumulator register (MICROMIPSOP_*_DSPACC)
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"8" 6-bit unsigned immediate (MICROMIPSOP_*_WRDSP)
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"0" 6-bit signed immediate (MICROMIPSOP_*_DSPSFT)
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"@" 10-bit signed immediate (MICROMIPSOP_*_IMM10)
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"^" 5-bit unsigned immediate (MICROMIPSOP_*_RD)
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Other:
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Other:
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"()" parens surrounding optional value
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"()" parens surrounding optional value
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"," separates operands
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"," separates operands
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@ -1709,8 +1723,8 @@ extern const int bfd_mips16_num_opcodes;
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"m" start of microMIPS extension sequence
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"m" start of microMIPS extension sequence
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Characters used so far, for quick reference when adding more:
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Characters used so far, for quick reference when adding more:
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"1234567890"
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"12345678 0"
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"<>(),+.\|~"
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"<>(),+.@\^|~"
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"ABCDEFGHI KLMN RST V "
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"ABCDEFGHI KLMN RST V "
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"abcd f hijklmnopqrstuvw yz"
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"abcd f hijklmnopqrstuvw yz"
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