hard float support for PowerPC taken from FreeBSD

Signed-off-by: Eshan dhawan <eshandhawan51@gmail.com>

newlib/configure.host

@@ -290,6 +290,7 @@ case "${host_cpu}" in
 	;;
   powerpc*)
 	machine_dir=powerpc
+	libm_machine_dir=powerpc
 	;;
   pru*)
 	newlib_cflags="${newlib_cflags} -DPREFER_SIZE_OVER_SPEED"

newlib/libc/machine/powerpc/machine/fenv-fp.h

@@ -0,0 +1,198 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+__fenv_static inline int
+feclearexcept(int excepts)
+{
+	union __fpscr __r;
+
+	if (excepts & FE_INVALID)
+		excepts |= FE_ALL_INVALID;
+	__mffs(&__r);
+	__r.__bits.__reg &= ~excepts;
+	__mtfsf(__r);
+	return (0);
+}
+
+
+__fenv_static inline int
+fegetexceptflag(fexcept_t *flagp, int excepts)
+{
+	union __fpscr __r;
+
+	__mffs(&__r);
+	*flagp = __r.__bits.__reg & excepts;
+	return (0);
+}
+
+__fenv_static inline int
+fesetexceptflag(const fexcept_t *flagp, int excepts)
+{
+	union __fpscr __r;
+
+	if (excepts & FE_INVALID)
+		excepts |= FE_ALL_EXCEPT;
+	__mffs(&__r);
+	__r.__bits.__reg &= ~excepts;
+	__r.__bits.__reg |= *flagp & excepts;
+	__mtfsf(__r);
+	return (0);
+}
+
+__fenv_static inline int
+feraiseexcept(int excepts)
+{
+	union __fpscr __r;
+
+	if (excepts & FE_INVALID)
+		excepts |= FE_VXSOFT;
+	__mffs(&__r);
+	__r.__bits.__reg |= excepts;
+	__mtfsf(__r);
+	return (0);
+}
+
+__fenv_static inline int
+fetestexcept(int excepts)
+{
+	union __fpscr __r;
+
+	__mffs(&__r);
+	return (__r.__bits.__reg & excepts);
+}
+
+__fenv_static inline int
+fegetround(void)
+{
+	union __fpscr __r;
+
+	__mffs(&__r);
+	return (__r.__bits.__reg & _ROUND_MASK);
+}
+
+__fenv_static inline int
+fesetround(int rounding_mode)
+{
+	union __fpscr __r;
+
+	if (rounding_mode & ~_ROUND_MASK)
+		return (-1);
+	__mffs(&__r);
+	__r.__bits.__reg &= ~_ROUND_MASK;
+	__r.__bits.__reg |= rounding_mode;
+	__mtfsf(__r);
+	return (0);
+}
+
+__fenv_static inline int
+fegetenv(fenv_t *envp)
+{
+	union __fpscr __r;
+
+	__mffs(&__r);
+	*envp = __r.__bits.__reg;
+	return (0);
+}
+
+__fenv_static inline int
+feholdexcept(fenv_t *envp)
+{
+	union __fpscr __r;
+
+	__mffs(&__r);
+	*envp = __r.__bits.__reg;
+	__r.__bits.__reg &= ~(FE_ALL_EXCEPT | _ENABLE_MASK);
+	__mtfsf(__r);
+	return (0);
+}
+
+__fenv_static inline int
+fesetenv(const fenv_t *envp)
+{
+	union __fpscr __r;
+
+	__r.__bits.__reg = *envp;
+	__mtfsf(__r);
+	return (0);
+}
+
+__fenv_static inline int
+feupdateenv(const fenv_t *envp)
+{
+	union __fpscr __r;
+
+	__mffs(&__r);
+	__r.__bits.__reg &= FE_ALL_EXCEPT;
+	__r.__bits.__reg |= *envp;
+	__mtfsf(__r);
+	return (0);
+}
+
+#if __BSD_VISIBLE
+
+/* We currently provide no external definitions of the functions below. */
+
+static inline int
+feenableexcept(int __mask)
+{
+	union __fpscr __r;
+	fenv_t __oldmask;
+
+	__mffs(&__r);
+	__oldmask = __r.__bits.__reg;
+	__r.__bits.__reg |= (__mask & FE_ALL_EXCEPT) >> _FPUSW_SHIFT;
+	__mtfsf(__r);
+	return ((__oldmask & _ENABLE_MASK) << _FPUSW_SHIFT);
+}
+
+static inline int
+fedisableexcept(int __mask)
+{
+	union __fpscr __r;
+	fenv_t __oldmask;
+
+	__mffs(&__r);
+	__oldmask = __r.__bits.__reg;
+	__r.__bits.__reg &= ~((__mask & FE_ALL_EXCEPT) >> _FPUSW_SHIFT);
+	__mtfsf(__r);
+	return ((__oldmask & _ENABLE_MASK) << _FPUSW_SHIFT);
+}
+
+static inline int
+fegetexcept(void)
+{
+	union __fpscr __r;
+
+	__mffs(&__r);
+	return ((__r.__bits.__reg & _ENABLE_MASK) << _FPUSW_SHIFT);
+}
+
+#endif /* __BSD_VISIBLE */
+

newlib/libc/machine/powerpc/sys/fenv.h

@@ -0,0 +1,132 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef	_SYS_FENV_H_
+#define	_SYS_FENV_H_
+
+#include <sys/_types.h>
+#include <machine/endian.h>
+
+#ifndef	__fenv_static
+#define	__fenv_static	static
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef	int	fenv_t;
+typedef	int	fexcept_t;
+
+/* Exception flags */
+#define	FE_INEXACT	0x02000000
+#define	FE_DIVBYZERO	0x04000000
+#define	FE_UNDERFLOW	0x08000000
+#define	FE_OVERFLOW	0x10000000
+#define	FE_INVALID	0x20000000	/* all types of invalid FP ops */
+
+/*
+ * The PowerPC architecture has extra invalid flags that indicate the
+ * specific type of invalid operation occurred.  These flags may be
+ * tested, set, and cleared---but not masked---separately.  All of
+ * these bits are cleared when FE_INVALID is cleared, but only
+ * FE_VXSOFT is set when FE_INVALID is explicitly set in software.
+ */
+#define	FE_VXCVI	0x00000100	/* invalid integer convert */
+#define	FE_VXSQRT	0x00000200	/* square root of a negative */
+#define	FE_VXSOFT	0x00000400	/* software-requested exception */
+#define	FE_VXVC		0x00080000	/* ordered comparison involving NaN */
+#define	FE_VXIMZ	0x00100000	/* inf * 0 */
+#define	FE_VXZDZ	0x00200000	/* 0 / 0 */
+#define	FE_VXIDI	0x00400000	/* inf / inf */
+#define	FE_VXISI	0x00800000	/* inf - inf */
+#define	FE_VXSNAN	0x01000000	/* operation on a signalling NaN */
+#define	FE_ALL_INVALID	(FE_VXCVI | FE_VXSQRT | FE_VXSOFT | FE_VXVC | \
+			 FE_VXIMZ | FE_VXZDZ | FE_VXIDI | FE_VXISI | \
+			 FE_VXSNAN | FE_INVALID)
+#define	FE_ALL_EXCEPT	(FE_DIVBYZERO | FE_INEXACT | \
+			 FE_ALL_INVALID | FE_OVERFLOW | FE_UNDERFLOW)
+
+/* Rounding modes */
+#define	FE_TONEAREST	0x0000
+#define	FE_TOWARDZERO	0x0001
+#define	FE_UPWARD	0x0002
+#define	FE_DOWNWARD	0x0003
+#define	_ROUND_MASK	(FE_TONEAREST | FE_DOWNWARD | \
+			 FE_UPWARD | FE_TOWARDZERO)
+
+
+
+/* Default floating-point environment */
+extern const fenv_t	*_fe_dfl_env;
+#define	FE_DFL_ENV	(_fe_dfl_env)
+
+/* We need to be able to map status flag positions to mask flag positions */
+#define	_FPUSW_SHIFT	22
+#define	_ENABLE_MASK	((FE_DIVBYZERO | FE_INEXACT | FE_INVALID | \
+			 FE_OVERFLOW | FE_UNDERFLOW) >> _FPUSW_SHIFT)
+
+#ifndef _SOFT_FLOAT
+#ifdef __SPE__
+#define	__mffs(__env) \
+	__asm __volatile("mfspr %0, 512" : "=r" ((__env)->__bits.__reg))
+#define	__mtfsf(__env) \
+	__asm __volatile("mtspr 512,%0;isync" :: "r" ((__env).__bits.__reg))
+#else
+#define	__mffs(__env) \
+	__asm __volatile("mffs %0" : "=f" ((__env)->__d))
+#define	__mtfsf(__env) \
+	__asm __volatile("mtfsf 255,%0" :: "f" ((__env).__d))
+#endif
+#else
+#define	__mffs(__env)
+#define	__mtfsf(__env)
+#endif
+
+union __fpscr {
+	double __d;
+	struct {
+#if _BYTE_ORDER == _LITTLE_ENDIAN
+		fenv_t __reg;
+		__uint32_t __junk;
+#else
+		__uint32_t __junk;
+		fenv_t __reg;
+#endif
+	} __bits;
+};
+
+
+#ifdef __cplusplus
+}
+#endif
+
+
+#endif	/* !_SYS_FENV_H_ */

newlib/libm/machine/configure.in

@@ -33,6 +33,7 @@ if test -n "${libm_machine_dir}"; then
 	spu) AC_CONFIG_SUBDIRS(spu) ;;
 	riscv) AC_CONFIG_SUBDIRS(riscv) ;;
 	x86_64) AC_CONFIG_SUBDIRS(x86_64) ;;
+	powerpc) AC_CONFIG_SUBDIRS(powerpc) ;;
   esac;
   if test "${use_libtool}" = "yes"; then
     machlib=${libm_machine_dir}/lib${libm_machine_dir}.${aext}

newlib/libm/machine/powerpc/Makefile.am

@@ -0,0 +1,20 @@
+## Process this file with automake to generate Makefile.in
+
+INCLUDES = -I $(newlib_basedir)/../newlib/libm/common $(NEWLIB_CFLAGS) \
+	$(CROSS_CFLAGS) $(TARGET_CFLAGS)
+
+LIB_SOURCES = \
+	feclearexcept.c fegetenv.c fegetexceptflag.c \
+	fegetround.c feholdexcept.c fenv.c feraiseexcept.c fesetenv.c \
+	fesetexceptflag.c fesetround.c fetestexcept.c feupdateenv.c
+
+noinst_LIBRARIES = lib.a
+lib_a_SOURCES = $(LIB_SOURCES)
+lib_a_CFLAGS = $(AM_CFLAGS)
+lib_a_CCASFLAGS = $(AM_CCASFLAGS)
+noinst_DATA =
+
+include $(srcdir)/../../../Makefile.shared
+
+ACLOCAL_AMFLAGS = -I ../../.. -I ../../../..
+CONFIG_STATUS_DEPENDENCIES = $(newlib_basedir)/configure.host

newlib/libm/machine/powerpc/configure.in

@@ -0,0 +1,11 @@
+
+AC_PREREQ(2.59)
+AC_INIT([newlib],[NEWLIB_VERSION])
+AC_CONFIG_SRCDIR([Makefile.am])
+
+AC_CONFIG_AUX_DIR(../../../..)
+
+NEWLIB_CONFIGURE(../../..)
+
+AC_CONFIG_FILES([Makefile])
+AC_OUTPUT

newlib/libm/machine/powerpc/feclearexcept.c

@@ -0,0 +1,7 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * (c) Copyright 2019 Joel Sherrill <joel@rtems.org>
+ */
+
+#include "../../fenv/fenv_stub.c"

newlib/libm/machine/powerpc/fegetenv.c

@@ -0,0 +1,7 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * (c) Copyright 2019 Joel Sherrill <joel@rtems.org>
+ */
+
+#include "../../fenv/fenv_stub.c"

newlib/libm/machine/powerpc/fegetexceptflag.c

@@ -0,0 +1,7 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * (c) Copyright 2019 Joel Sherrill <joel@rtems.org>
+ */
+
+#include "../../fenv/fenv_stub.c"

newlib/libm/machine/powerpc/fegetround.c

@@ -0,0 +1,7 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * (c) Copyright 2019 Joel Sherrill <joel@rtems.org>
+ */
+
+#include "../../fenv/fenv_stub.c"

newlib/libm/machine/powerpc/feholdexcept.c

@@ -0,0 +1,7 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * (c) Copyright 2019 Joel Sherrill <joel@rtems.org>
+ */
+
+#include "../../fenv/fenv_stub.c"

newlib/libm/machine/powerpc/fenv.c

@@ -0,0 +1,51 @@
+/*-
+ * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
+ *
+ * Copyright (c) 2004 David Schultz <das@FreeBSD.ORG>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#define	__fenv_static
+#include <fenv.h>
+#include <machine/fenv-fp.h>
+
+#ifdef __GNUC_GNU_INLINE__
+#error "This file must be compiled with C99 'inline' semantics"
+#endif
+
+
+
+extern inline int feclearexcept(int excepts);
+extern inline int fegetexceptflag(fexcept_t *flagp, int excepts);
+extern inline int fesetexceptflag(const fexcept_t *flagp, int excepts);
+extern inline int feraiseexcept(int excepts);
+extern inline int fetestexcept(int excepts);
+extern inline int fegetround(void);
+extern inline int fesetround(int rounding_mode);
+extern inline int fegetenv(fenv_t *envp);
+extern inline int feholdexcept(fenv_t *envp);
+extern inline int fesetenv(const fenv_t *envp);
+extern inline int feupdateenv(const fenv_t *envp);

newlib/libm/machine/powerpc/feraiseexcept.c

@@ -0,0 +1,7 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * (c) Copyright 2019 Joel Sherrill <joel@rtems.org>
+ */
+
+#include "../../fenv/fenv_stub.c"

newlib/libm/machine/powerpc/fesetenv.c

@@ -0,0 +1,7 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * (c) Copyright 2019 Joel Sherrill <joel@rtems.org>
+ */
+
+#include "../../fenv/fenv_stub.c"

newlib/libm/machine/powerpc/fesetexceptflag.c

@@ -0,0 +1,7 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * (c) Copyright 2019 Joel Sherrill <joel@rtems.org>
+ */
+
+#include "../../fenv/fenv_stub.c"

newlib/libm/machine/powerpc/fesetround.c

@@ -0,0 +1,7 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * (c) Copyright 2019 Joel Sherrill <joel@rtems.org>
+ */
+
+#include "../../fenv/fenv_stub.c"

newlib/libm/machine/powerpc/fetestexcept.c

@@ -0,0 +1,7 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * (c) Copyright 2019 Joel Sherrill <joel@rtems.org>
+ */
+
+#include "../../fenv/fenv_stub.c"

newlib/libm/machine/powerpc/feupdateenv.c

@@ -0,0 +1,7 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * (c) Copyright 2019 Joel Sherrill <joel@rtems.org>
+ */
+
+#include "../../fenv/fenv_stub.c"