* gas/config/tc-arm.c (arm_ext_v6z): Remove.
(arm_ext_sec): New variable. (do_t_smc): In Thumb state SMC requires v7-A. (insns): Make SMC depend on Security Extensions. (arm_cpus): All -mcpu=cortex-a* options have the Security Extensions. (arm_extensions): Add 'sec' extension. (cpu_arch_ver): Reorder. (aeabi_set_public_attributes): Emit Tag_Virtualization_use as appropriate. * gas/doc/c-arm.texi: Document Security Extensions. * gas/testsuite/gas/arm/attr-march-all.d: Update for Security Extensions.. * gas/testsuite/gas/arm/attr-march-armv6k+sec.d: New test. * gas/testsuite/gas/arm/attr-march-armv6z.d: Update for Security Extensions. * gas/testsuite/gas/arm/attr-march-armv6zk.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6zkt2.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv6zt2.d: Likewise. * gas/testsuite/gas/arm/attr-march-armv7-a+sec.d: New test. * gas/testsuite/gas/arm/attr-mcpu.d: Update for Security Extensions. * gas/testsuite/gas/arm/thumb32.d: Likewise. * gas/testsuite/gas/arm/thumb32.s: Likewise. * include/opcode/arm.h (ARM_EXT_V6Z): Remove. (ARM_EXT_SEC): New define. (ARM_AEXT_V6Z): Use Security Extensions. (ARM_AEXT_V6ZK): Likeiwse. (ARM_AEXT_V6ZT2): Likewise. (ARM_AEXT_V6ZKT2): Likewise. (ARM_AEXT_V7_ARM): Base v7 does not have Security Extensions. (ARM_ARCH_V7A_SEC): New define. (ARM_ARCH_V7A_MP): Rename... (ARM_ARCH_V7A_MP_SEC): ...to this and add Security Extensions. * ld/testsuite/ld-arm/attr-merge-6.attr: Update for Security Extensions. * ld/testsuite/ld-arm/attr-merge-7.attr: Likewise. * opcodes/arm-dis.c (arm_opcodes): SMC implies Security Extensions. (thumb32_opcodes): Likewise.
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@ -1,3 +1,16 @@
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2010-09-23 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
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* arm.h (ARM_EXT_V6Z): Remove.
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(ARM_EXT_SEC): New define.
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(ARM_AEXT_V6Z): Use Security Extensions.
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(ARM_AEXT_V6ZK): Likeiwse.
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(ARM_AEXT_V6ZT2): Likewise.
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(ARM_AEXT_V6ZKT2): Likewise.
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(ARM_AEXT_V7_ARM): Base v7 does not have Security Extensions.
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(ARM_ARCH_V7A_SEC): New define.
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(ARM_ARCH_V7A_MP): Rename...
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(ARM_ARCH_V7A_MP_SEC): ...to this and add Security Extensions.
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2010-09-09 Jakub Jelinek <jakub@redhat.com>
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2010-09-09 Jakub Jelinek <jakub@redhat.com>
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* dwarf2.h (DW_OP_GNU_implicit_pointer): New.
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* dwarf2.h (DW_OP_GNU_implicit_pointer): New.
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@ -33,7 +33,7 @@
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#define ARM_EXT_V5J 0x00000800 /* Jazelle extension. */
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#define ARM_EXT_V5J 0x00000800 /* Jazelle extension. */
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#define ARM_EXT_V6 0x00001000 /* ARM V6. */
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#define ARM_EXT_V6 0x00001000 /* ARM V6. */
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#define ARM_EXT_V6K 0x00002000 /* ARM V6K. */
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#define ARM_EXT_V6K 0x00002000 /* ARM V6K. */
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#define ARM_EXT_V6Z 0x00004000 /* ARM V6Z. */
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/* 0x00004000 Was ARM V6Z. */
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#define ARM_EXT_V6T2 0x00008000 /* Thumb-2. */
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#define ARM_EXT_V6T2 0x00008000 /* Thumb-2. */
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#define ARM_EXT_DIV 0x00010000 /* Integer division. */
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#define ARM_EXT_DIV 0x00010000 /* Integer division. */
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/* The 'M' in Arm V7M stands for Microcontroller.
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/* The 'M' in Arm V7M stands for Microcontroller.
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@ -50,6 +50,7 @@
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#define ARM_EXT_V6_DSP 0x04000000 /* ARM v6 (DSP-related),
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#define ARM_EXT_V6_DSP 0x04000000 /* ARM v6 (DSP-related),
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not in v7-M. */
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not in v7-M. */
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#define ARM_EXT_MP 0x08000000 /* Multiprocessing Extensions. */
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#define ARM_EXT_MP 0x08000000 /* Multiprocessing Extensions. */
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#define ARM_EXT_SEC 0x10000000 /* Security extensions. */
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/* Co-processor space extensions. */
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/* Co-processor space extensions. */
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#define ARM_CEXT_XSCALE 0x00000001 /* Allow MIA etc. */
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#define ARM_CEXT_XSCALE 0x00000001 /* Allow MIA etc. */
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@ -96,15 +97,15 @@
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#define ARM_AEXT_V5TEJ (ARM_AEXT_V5TE | ARM_EXT_V5J)
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#define ARM_AEXT_V5TEJ (ARM_AEXT_V5TE | ARM_EXT_V5J)
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#define ARM_AEXT_V6 (ARM_AEXT_V5TEJ | ARM_EXT_V6)
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#define ARM_AEXT_V6 (ARM_AEXT_V5TEJ | ARM_EXT_V6)
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#define ARM_AEXT_V6K (ARM_AEXT_V6 | ARM_EXT_V6K)
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#define ARM_AEXT_V6K (ARM_AEXT_V6 | ARM_EXT_V6K)
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#define ARM_AEXT_V6Z (ARM_AEXT_V6 | ARM_EXT_V6Z)
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#define ARM_AEXT_V6Z (ARM_AEXT_V6K | ARM_EXT_SEC)
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#define ARM_AEXT_V6ZK (ARM_AEXT_V6 | ARM_EXT_V6K | ARM_EXT_V6Z)
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#define ARM_AEXT_V6ZK (ARM_AEXT_V6K | ARM_EXT_SEC)
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#define ARM_AEXT_V6T2 (ARM_AEXT_V6 \
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#define ARM_AEXT_V6T2 (ARM_AEXT_V6 \
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| ARM_EXT_V6T2 | ARM_EXT_V6_NOTM | ARM_EXT_THUMB_MSR \
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| ARM_EXT_V6T2 | ARM_EXT_V6_NOTM | ARM_EXT_THUMB_MSR \
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| ARM_EXT_V6_DSP )
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| ARM_EXT_V6_DSP )
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#define ARM_AEXT_V6KT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K)
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#define ARM_AEXT_V6KT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K)
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#define ARM_AEXT_V6ZT2 (ARM_AEXT_V6T2 | ARM_EXT_V6Z)
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#define ARM_AEXT_V6ZT2 (ARM_AEXT_V6T2 | ARM_EXT_SEC)
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#define ARM_AEXT_V6ZKT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K | ARM_EXT_V6Z)
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#define ARM_AEXT_V6ZKT2 (ARM_AEXT_V6T2 | ARM_EXT_V6K | ARM_EXT_SEC)
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#define ARM_AEXT_V7_ARM (ARM_AEXT_V6ZKT2 | ARM_EXT_V7 | ARM_EXT_BARRIER)
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#define ARM_AEXT_V7_ARM (ARM_AEXT_V6KT2 | ARM_EXT_V7 | ARM_EXT_BARRIER)
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#define ARM_AEXT_V7A (ARM_AEXT_V7_ARM | ARM_EXT_V7A)
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#define ARM_AEXT_V7A (ARM_AEXT_V7_ARM | ARM_EXT_V7A)
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#define ARM_AEXT_V7R (ARM_AEXT_V7_ARM | ARM_EXT_V7R | ARM_EXT_DIV)
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#define ARM_AEXT_V7R (ARM_AEXT_V7_ARM | ARM_EXT_V7R | ARM_EXT_DIV)
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#define ARM_AEXT_NOTM \
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#define ARM_AEXT_NOTM \
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@ -210,7 +211,12 @@
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#define ARM_ANY ARM_FEATURE (-1, 0) /* Any basic core. */
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#define ARM_ANY ARM_FEATURE (-1, 0) /* Any basic core. */
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#define FPU_ANY_HARD ARM_FEATURE (0, FPU_FPA | FPU_VFP_HARD | FPU_MAVERICK)
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#define FPU_ANY_HARD ARM_FEATURE (0, FPU_FPA | FPU_VFP_HARD | FPU_MAVERICK)
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#define ARM_ARCH_THUMB2 ARM_FEATURE (ARM_EXT_V6T2 | ARM_EXT_V7 | ARM_EXT_V7A | ARM_EXT_V7R | ARM_EXT_V7M | ARM_EXT_DIV, 0)
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#define ARM_ARCH_THUMB2 ARM_FEATURE (ARM_EXT_V6T2 | ARM_EXT_V7 | ARM_EXT_V7A | ARM_EXT_V7R | ARM_EXT_V7M | ARM_EXT_DIV, 0)
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#define ARM_ARCH_V7A_MP ARM_FEATURE (ARM_AEXT_V7A | ARM_EXT_MP, 0)
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/* v7-a+sec. */
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#define ARM_ARCH_V7A_SEC ARM_FEATURE (ARM_AEXT_V7A | ARM_EXT_SEC, 0)
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/* v7-a+mp+sec. */
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#define ARM_ARCH_V7A_MP_SEC \
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ARM_FEATURE (ARM_AEXT_V7A | ARM_EXT_MP | ARM_EXT_SEC, \
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0)
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/* There are too many feature bits to fit in a single word, so use a
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/* There are too many feature bits to fit in a single word, so use a
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structure. For simplicity we put all core features in one word and
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structure. For simplicity we put all core features in one word and
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