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include/opcode/

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* ppc.h (struct powerpc_operand): Replace "bits" with "bitm".
	(num_powerpc_operands): Declare.
	(PPC_OPERAND_SIGNED et al): Redefine as hex.
	(PPC_OPERAND_PLUS1): Define.
opcodes/
	* ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand
	change.
	* ppc-opc.c (powerpc_operands): Replace bit count with bit mask
	in all entries.  Add PPC_OPERAND_SIGNED to DE entry.  Remove
	references to following deleted functions.
	(insert_bd, extract_bd, insert_dq, extract_dq): Delete.
	(insert_ds, extract_ds, insert_de, extract_de): Delete.
	(insert_des, extract_des, insert_li, extract_li): Delete.
	(insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete.
	(insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete.
	(num_powerpc_operands): New constant.
	(XSPRG_MASK): Remove entire SPRG field.
	(powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK.
gas/
	* messages.c (as_internal_value_out_of_range): Extend to report
	errors for values with invalid low bits set.
	* config/tc-ppc.c (ppc_setup_opcodes): Check powerpc_operands bitm
	fields.  Check that operands and opcode fields are disjoint.
	(ppc_insert_operand): Check operands using mask rather than bit
	count.   Check low bits too.  Handle PPC_OPERAND_PLUS1.  Adjust
	insertion code.
	(md_apply_fix): Adjust for struct powerpc_operand change.
This commit is contained in:
Alan Modra 2007-04-20 12:25:12 +00:00
parent c84ece703d
commit d8507ced8b
2 changed files with 40 additions and 29 deletions
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7
include/opcode/ChangeLog
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@ -1,3 +1,10 @@
2007-04-20 Alan Modra <amodra@bigpond.net.au>
* ppc.h (struct powerpc_operand): Replace "bits" with "bitm".
(num_powerpc_operands): Declare.
(PPC_OPERAND_SIGNED et al): Redefine as hex.
(PPC_OPERAND_PLUS1): Define.
2007-03-21 H.J. Lu <hongjiu.lu@intel.com> 2007-03-21 H.J. Lu <hongjiu.lu@intel.com>
* i386.h (REX_MODE64): Renamed to ... * i386.h (REX_MODE64): Renamed to ...

62
include/opcode/ppc.h
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@ -1,6 +1,6 @@
/* ppc.h -- Header file for PowerPC opcode table /* ppc.h -- Header file for PowerPC opcode table
Copyright 1994, 1995, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 Copyright 1994, 1995, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006,
Free Software Foundation, Inc. 2007 Free Software Foundation, Inc.
Written by Ian Lance Taylor, Cygnus Support Written by Ian Lance Taylor, Cygnus Support
This file is part of GDB, GAS, and the GNU binutils. This file is part of GDB, GAS, and the GNU binutils.
@ -153,20 +153,21 @@ extern const int powerpc_num_opcodes;
struct powerpc_operand struct powerpc_operand
{ {
/* The number of bits in the operand. */ /* A bitmask of bits in the operand. */
int bits; unsigned int bitm;
/* How far the operand is left shifted in the instruction. */ /* How far the operand is left shifted in the instruction.
-1 to indicate that BITM and SHIFT cannot be used to determine
where the operand goes in the insn. */
int shift; int shift;
/* Insertion function. This is used by the assembler. To insert an /* Insertion function. This is used by the assembler. To insert an
operand value into an instruction, check this field. operand value into an instruction, check this field.
If it is NULL, execute If it is NULL, execute
i |= (op & ((1 << o->bits) - 1)) << o->shift; i |= (op & o->bitm) << o->shift;
(i is the instruction which we are filling in, o is a pointer to (i is the instruction which we are filling in, o is a pointer to
this structure, and op is the opcode value; this assumes twos this structure, and op is the operand value).
complement arithmetic).
If this field is not NULL, then simply call it with the If this field is not NULL, then simply call it with the
instruction and the operand value. It will return the new value instruction and the operand value. It will return the new value
@ -182,12 +183,11 @@ struct powerpc_operand
extract this operand type from an instruction, check this field. extract this operand type from an instruction, check this field.
If it is NULL, compute If it is NULL, compute
op = ((i) >> o->shift) & ((1 << o->bits) - 1); op = (i >> o->shift) & o->bitm;
if ((o->flags & PPC_OPERAND_SIGNED) != 0 if ((o->flags & PPC_OPERAND_SIGNED) != 0)
&& (op & (1 << (o->bits - 1))) != 0) sign_extend (op);
op -= 1 << o->bits;
(i is the instruction, o is a pointer to this structure, and op (i is the instruction, o is a pointer to this structure, and op
is the result; this assumes twos complement arithmetic). is the result).
If this field is not NULL, then simply call it with the If this field is not NULL, then simply call it with the
instruction value. It will return the value of the operand. If instruction value. It will return the value of the operand. If
@ -205,17 +205,18 @@ struct powerpc_operand
the operands field of the powerpc_opcodes table. */ the operands field of the powerpc_opcodes table. */
extern const struct powerpc_operand powerpc_operands[]; extern const struct powerpc_operand powerpc_operands[];
extern const unsigned int num_powerpc_operands;
/* Values defined for the flags field of a struct powerpc_operand. */ /* Values defined for the flags field of a struct powerpc_operand. */
/* This operand takes signed values. */ /* This operand takes signed values. */
#define PPC_OPERAND_SIGNED (01) #define PPC_OPERAND_SIGNED (0x1)
/* This operand takes signed values, but also accepts a full positive /* This operand takes signed values, but also accepts a full positive
range of values when running in 32 bit mode. That is, if bits is range of values when running in 32 bit mode. That is, if bits is
16, it takes any value from -0x8000 to 0xffff. In 64 bit mode, 16, it takes any value from -0x8000 to 0xffff. In 64 bit mode,
this flag is ignored. */ this flag is ignored. */
#define PPC_OPERAND_SIGNOPT (02) #define PPC_OPERAND_SIGNOPT (0x2)
/* This operand does not actually exist in the assembler input. This /* This operand does not actually exist in the assembler input. This
is used to support extended mnemonics such as mr, for which two is used to support extended mnemonics such as mr, for which two
@ -223,14 +224,14 @@ extern const struct powerpc_operand powerpc_operands[];
insert function with any op value. The disassembler should call insert function with any op value. The disassembler should call
the extract function, ignore the return value, and check the value the extract function, ignore the return value, and check the value
placed in the valid argument. */ placed in the valid argument. */
#define PPC_OPERAND_FAKE (04) #define PPC_OPERAND_FAKE (0x4)
/* The next operand should be wrapped in parentheses rather than /* The next operand should be wrapped in parentheses rather than
separated from this one by a comma. This is used for the load and separated from this one by a comma. This is used for the load and
store instructions which want their operands to look like store instructions which want their operands to look like
reg,displacement(reg) reg,displacement(reg)
*/ */
#define PPC_OPERAND_PARENS (010) #define PPC_OPERAND_PARENS (0x8)
/* This operand may use the symbolic names for the CR fields, which /* This operand may use the symbolic names for the CR fields, which
are are
@ -239,26 +240,26 @@ extern const struct powerpc_operand powerpc_operands[];
cr4 4 cr5 5 cr6 6 cr7 7 cr4 4 cr5 5 cr6 6 cr7 7
These may be combined arithmetically, as in cr2*4+gt. These are These may be combined arithmetically, as in cr2*4+gt. These are
only supported on the PowerPC, not the POWER. */ only supported on the PowerPC, not the POWER. */
#define PPC_OPERAND_CR (020) #define PPC_OPERAND_CR (0x10)
/* This operand names a register. The disassembler uses this to print /* This operand names a register. The disassembler uses this to print
register names with a leading 'r'. */ register names with a leading 'r'. */
#define PPC_OPERAND_GPR (040) #define PPC_OPERAND_GPR (0x20)
/* Like PPC_OPERAND_GPR, but don't print a leading 'r' for r0. */ /* Like PPC_OPERAND_GPR, but don't print a leading 'r' for r0. */
#define PPC_OPERAND_GPR_0 (0100) #define PPC_OPERAND_GPR_0 (0x40)
/* This operand names a floating point register. The disassembler /* This operand names a floating point register. The disassembler
prints these with a leading 'f'. */ prints these with a leading 'f'. */
#define PPC_OPERAND_FPR (0200) #define PPC_OPERAND_FPR (0x80)
/* This operand is a relative branch displacement. The disassembler /* This operand is a relative branch displacement. The disassembler
prints these symbolically if possible. */ prints these symbolically if possible. */
#define PPC_OPERAND_RELATIVE (0400) #define PPC_OPERAND_RELATIVE (0x100)
/* This operand is an absolute branch address. The disassembler /* This operand is an absolute branch address. The disassembler
prints these symbolically if possible. */ prints these symbolically if possible. */
#define PPC_OPERAND_ABSOLUTE (01000) #define PPC_OPERAND_ABSOLUTE (0x200)
/* This operand is optional, and is zero if omitted. This is used for /* This operand is optional, and is zero if omitted. This is used for
example, in the optional BF field in the comparison instructions. The example, in the optional BF field in the comparison instructions. The
@ -266,7 +267,7 @@ extern const struct powerpc_operand powerpc_operands[];
and the number of operands remaining for the opcode, and decide and the number of operands remaining for the opcode, and decide
whether this operand is present or not. The disassembler should whether this operand is present or not. The disassembler should
print this operand out only if it is not zero. */ print this operand out only if it is not zero. */
#define PPC_OPERAND_OPTIONAL (02000) #define PPC_OPERAND_OPTIONAL (0x400)
/* This flag is only used with PPC_OPERAND_OPTIONAL. If this operand /* This flag is only used with PPC_OPERAND_OPTIONAL. If this operand
is omitted, then for the next operand use this operand value plus is omitted, then for the next operand use this operand value plus
@ -274,24 +275,27 @@ extern const struct powerpc_operand powerpc_operands[];
hack is needed because the Power rotate instructions can take hack is needed because the Power rotate instructions can take
either 4 or 5 operands. The disassembler should print this operand either 4 or 5 operands. The disassembler should print this operand
out regardless of the PPC_OPERAND_OPTIONAL field. */ out regardless of the PPC_OPERAND_OPTIONAL field. */
#define PPC_OPERAND_NEXT (04000) #define PPC_OPERAND_NEXT (0x800)
/* This operand should be regarded as a negative number for the /* This operand should be regarded as a negative number for the
purposes of overflow checking (i.e., the normal most negative purposes of overflow checking (i.e., the normal most negative
number is disallowed and one more than the normal most positive number is disallowed and one more than the normal most positive
number is allowed). This flag will only be set for a signed number is allowed). This flag will only be set for a signed
operand. */ operand. */
#define PPC_OPERAND_NEGATIVE (010000) #define PPC_OPERAND_NEGATIVE (0x1000)
/* This operand names a vector unit register. The disassembler /* This operand names a vector unit register. The disassembler
prints these with a leading 'v'. */ prints these with a leading 'v'. */
#define PPC_OPERAND_VR (020000) #define PPC_OPERAND_VR (0x2000)
/* This operand is for the DS field in a DS form instruction. */ /* This operand is for the DS field in a DS form instruction. */
#define PPC_OPERAND_DS (040000) #define PPC_OPERAND_DS (0x4000)
/* This operand is for the DQ field in a DQ form instruction. */ /* This operand is for the DQ field in a DQ form instruction. */
#define PPC_OPERAND_DQ (0100000) #define PPC_OPERAND_DQ (0x8000)
/* Valid range of operand is 1..n rather than 0..n-1. */
#define PPC_OPERAND_PLUS1 (0x10000)
/* The POWER and PowerPC assemblers use a few macros. We keep them /* The POWER and PowerPC assemblers use a few macros. We keep them
with the operands table for simplicity. The macro table is an with the operands table for simplicity. The macro table is an