gas/
2004-11-25 Jan Beulich <jbeulich@novell.com> * config/tc-i386.c (optimize_imm): Adjust immediates to only those permissible for the selected instruction suffix. (process_suffix): For DefaultSize instructions, suppressing the guessing of a 'q' suffix if the instruction doesn't support it is pointless, because only an 'l' suffix can be guessed in this place. gas/testsuite/ 2004-11-25 Jan Beulich <jbeulich@novell.com> * gas/i386/x86-64-inval.[sl]: Remove sahf/lahf. include/opcode/ 2004-11-25 Jan Beulich <jbeulich@novell.com> * i386.h: CpuNo64 mov can't reasonably have a 'q' suffix. Moves to/from test registers are illegal in 64-bit mode. Add missing NoRex64 to sidt. fxsave/fxrstor now allow for a 'q' suffix (previously one had to explicitly encode a rex64 prefix). Re-enable lahf/sahf in 64-bit mode as at least some Athlon64/Opteron steppings support it there. Add cmpxchg16b as per Intel's 64-bit documentation.
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@@ -1,4 +1,13 @@
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2004-11-23 Jan Beulich <jbeulich@novell.com>
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2004-11-25 Jan Beulich <jbeulich@novell.com>
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* i386.h: CpuNo64 mov can't reasonably have a 'q' suffix. Moves
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to/from test registers are illegal in 64-bit mode. Add missing
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NoRex64 to sidt. fxsave/fxrstor now allow for a 'q' suffix
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(previously one had to explicitly encode a rex64 prefix). Re-enable
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lahf/sahf in 64-bit mode as at least some Athlon64/Opteron steppings
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support it there. Add cmpxchg16b as per Intel's 64-bit documentation.
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2004-11-23 Jan Beulich <jbeulich@novell.com>
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* i386.h (i386_optab): paddq and psubq, even in their MMX form, are
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available only with SSE2. Change the MMX additions introduced by SSE
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@@ -35,7 +44,7 @@
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(cris_imm_oprnd_size_type): New members SIZE_FIELD_SIGNED and
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SIZE_FIELD_UNSIGNED.
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2004-11-04 Jan Beulich <jbeulich@novell.com>
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2004-11-04 Jan Beulich <jbeulich@novell.com>
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* i386.h (sldx_Suf): Remove.
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(FP, l_FP, sl_FP, x_FP): Don't imply IgnoreSize.
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